BSS110 [NXP]
P-channel enhancement mode vertical D-MOS transistor; P沟道增强型垂直的D- MOS晶体管
| 型号： | BSS110 |
| 厂家： | 
NXP |
| 描述： | P-channel enhancement mode vertical D-MOS transistor |
| 文件： | 总9页 (文件大小：79K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DISCRETE SEMICONDUCTORS
DATA SHEET
BSS110
P-channel enhancement mode
vertical D-MOS transistor
1995 Apr 07
Product specification
File under Discrete Semiconductors, SC07
Philips Semiconductors
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSS110
FEATURES
• Low threshold voltage
• Direct interface to C-MOS, TTL, etc.
• High speed switching
d
• No secondary breakdown.
handbook, halfpage
1
2
3
APPLICATIONS
g
• Intended for use as a Line current interruptor in
telephone sets and for applications in relay, high speed
and line transformer drivers.
MAM144
s
DESCRIPTION
P-channel enhancement mode vertical D-MOS transistor
in a TO-92 variant package.
Fig.1 Simplified outline and symbol.
PINNING - TO-92 variant
PIN
1
SYMBOL
DESCRIPTION
source
CAUTION
s
g
d
The device is supplied in an antistatic package. The
gate-source input must be protected against static
discharge during transport or handling.
2
gate
3
drain
QUICK REFERENCE DATA
SYMBOL
VDS
PARAMETER
drain-source voltage (DC)
gate-source voltage (DC)
gate-source threshold voltage
drain current (DC)
CONDITIONS
MIN.
MAX.
−50
UNIT
−
−
V
V
V
VGSO
VGSth
ID
open drain
±20
−2
ID = −1 mA; VDS = VGS
−0.8
−
−
−
−170
10
mA
Ω
RDSon
Ptot
drain-source on-state resistance
total power dissipation
ID = −170 mA; VGS = −10 V
up to Tamb = 25 °C
830
mW
1995 Apr 07
2
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSS110
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VDS
VGSO
ID
PARAMETER
CONDITIONS
MIN.
MAX.
−50
UNIT
drain-source voltage (DC)
gate-source voltage (DC)
drain current (DC)
−
−
−
−
−
V
V
open drain
±20
−170
−520
830
mA
mA
mW
°C
IDM
Ptot
Tstg
Tj
peak drain current
total power dissipation
storage temperature
up to Tamb = 25 °C; note 1
−65
+150
150
operating junction temperature
−
°C
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
thermal resistance from junction to ambient note 1
CONDITIONS
VALUE
150
UNIT
Rth j-a
K/W
Note to the “Limiting values” and “Thermal characteristics”
1. Device mounted on a printed-circuit board, maximum lead length 4 mm.
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
V(BR)DSS
VGSth
PARAMETER
CONDITIONS
MIN.
−50
TYP. MAX. UNIT
drain-source breakdown voltage VGS = 0; ID = −10 µA
−
−
V
gate-source threshold voltage
drain-source leakage current
VDS = VGS; ID = −1 mA
VGS = 0; VDS = −40 V
−0.8
−
−
−2
V
IDSS
−
−100
−10
−60
±10
10
nA
µA
µA
nA
Ω
VGS = 0; VDS = −50 V
−
−
VGS = 0; VDS = −50 V; Tj = 125 °C
VDS = 0; VGS = ±20 V
−
−
IGSS
RDSon
yfs
gate leakage current
−
−
drain-source on-state resistance VGS = −10 V; ID = −170 mA
−
−
forward transfer admittance
input capacitance
VDS = −25 V; ID = −170 mA
50
−
−
−
mS
pF
pF
pF
Ciss
VGS = 0; VDS = −25 V; f = 1 MHz
VGS = 0; VDS = −25 V; f = 1 MHz
VGS = 0; VDS = −25 V; f = 1 MHz
25
15
3.5
45
Coss
Crss
output capacitance
−
25
reverse transfer capacitance
−
12
Switching times (see Figs 2 and 3)
ton
turn-on time
VGS = 0 to −10 V; VDD = −40 V;
ID = −200 mA
−
−
3
7
−
−
ns
ns
toff
turn-off time
VGS = −10 to 0 V; VDD = −40 V;
ID = −200 mA
1995 Apr 07
3
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSS110
V
= 40 V
handbook, halfpage
10 %
handbook, halfpage
DD
INPUT
90 %
I
D
0
10 %
10 V
OUTPUT
50 Ω
90 %
MLD189
t
t
on
off
MBB690
Fig.2 Switching time test circuit.
Fig.3 Input and output waveforms.
MLD190
MLD193
3
1.0
10
handbook, halfpage
handbook, halfpage
t
=
p
P
tot
(W)
(1)
10 ms
I
D
0.8
(mA)
100
ms
2
10
1 s
0.6
0.4
0.2
DC
t
p
P
=
δ
10
T
t
t
p
T
0
0
1
1
2
50
100
150
T
200
( C)
10
10
o
V
(V)
DS
amb
δ = 0.01.
Tamb = 25 °C.
(1) RDSon limitation.
Fig.4 Power derating curve.
Fig.5 DC SOAR.
1995 Apr 07
4
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSS110
MLD191
MLD197
80
600
handbook, halfpage
handbook, halfpage
V
=
GS
10 V
7.5 V
C
6 V
I
D
(pF)
(mA)
60
40
400
5 V
4 V
C
iss
200
20
0
C
oss
3 V
C
2.5 V
rss
V
0
0
0
10
20
30
2
4
6
8
10
12
(V)
DS
V
(V)
DS
VGS = 0.
Tj = 25 °C.
f = 1 MHz.
Tj = 25 °C.
Fig.6 Capacitance as a function of drain source
voltage; typical values.
Fig.7 Typical output characteristics.
MLD198
MLD196
60
600
handbook, halfpage
handbook, halfpage
V
=
GS
2.5 V
R
3 V 4 V 5 V
I
DSon
(Ω)
D
(mA)
40
400
20
200
7.5 V
10 V
0
1
0
3
2
0
2
4
6
8
10
(V)
10
10
10
I
(mA)
D
V
GS
Tj = 25 °C.
VDS = −10 V.
Tj = 25 °C.
Fig.9 Drain-source on-state resistance as a
function of drain current; typical values.
Fig.8 Typical transfer characteristics.
1995 Apr 07
5
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSS110
MLD195
MLD194
1.2
1.8
handbook, halfpage
handbook, halfpage
(1)
k
k
(2)
1.0
1.4
0.8
0.6
1.0
0.6
50
50
0
50
100
150
0
50
100
150
o
o
T
( C)
T
( C)
j
j
RDSon at Tj
-----------------------------------------
RDSon at 25 °C
k =
VGSth at Tj
k =
--------------------------------------
VGSth at 25°C
(1) ID = −170 mA; VGS = −10 V.
(2) ID = −20 mA; VGS = −2.4 V.
ID = −1 mA; VDS = VGS
.
Fig.10 Temperature coefficient of gate-source
threshold voltage.
Fig.11 Temperature coefficient of drain-source
on-state resistance.
MLD192
3
10
R
th j-a
(K/W)
δ =
0.75
2
10
0.5
0.2
0.1
10
0.05
0.02
0.01
t
p
P
=
δ
T
1
1
0
t
t
p
T
10
6
5
4
3
2
1
2
3
10
10
10
10
10
10
1
10
10
10
t
(s)
p
Tamb = 25 °C.
Fig.12 Thermal resistance from junction to ambient as a function of pulse time; typical values.
6
1995 Apr 07
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSS110
PACKAGE OUTLINE
0.40
min
4.2 max
1.6
5.2 max
12.7 min
0.48
0.40
1
2
4.8
max
2.54
3
0.66
0.56
(1)
MBC015 - 1
2.5 max
Dimensions in mm.
(1) Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
Fig.13 TO-92 variant.
1995 Apr 07
7
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSS110
DEFINITIONS
Data Sheet Status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1995 Apr 07
8
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© Philips Electronics N.V. 1996
SCA50
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Date of release: 1996 Jul 17
Document order number: 9397 750 00971
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