BT148-400R [NXP]

Thyristors logic level; 晶闸管逻辑电平
BT148-400R
型号: BT148-400R
厂家: NXP    NXP
描述:

Thyristors logic level
晶闸管逻辑电平

触发装置 可控硅整流器
文件: 总6页 (文件大小:47K)
中文:  中文翻译
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Philips Semiconductors  
Product specification  
Thyristors  
logic level  
BT148 series  
GENERAL DESCRIPTION  
QUICK REFERENCE DATA  
Glass passivated, sensitive gate  
thyristors in a plastic envelope,  
intended for use in general purpose  
SYMBOL PARAMETER  
MAX. MAX. MAX. UNIT  
BT148- 400R 500R 600R  
switching  
and  
phase  
control  
VDRM  
VRRM  
IT(AV)  
,
Repetitive peak off-state  
400  
500  
600  
V
applications. These devices are  
intended to be interfaced directly to  
microcontrollers, logic integrated  
circuits and other low power gate  
trigger circuits.  
voltages  
Average on-state current  
RMS on-state current  
Non-repetitive peak on-state  
current  
2.5  
4
35  
2.5  
4
35  
2.5  
4
35  
A
A
A
IT(RMS)  
ITSM  
PINNING - SOT82  
PIN CONFIGURATION  
SYMBOL  
PIN  
1
DESCRIPTION  
cathode  
a
k
2
anode  
gate  
3
g
2
3
1
tab anode  
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134).  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
-400R -500R -600R  
VDRM, VRRM Repetitive peak off-state  
voltages  
-
4001  
5001  
6001  
V
IT(AV)  
IT(RMS)  
ITSM  
Average on-state current half sine wave; Tmb 113 ˚C  
-
-
2.5  
4
A
A
RMS on-state current  
Non-repetitive peak  
on-state current  
all conduction angles  
half sine wave; Tj = 25 ˚C prior to  
surge  
t = 10 ms  
-
-
-
-
35  
38  
6.1  
50  
A
A
t = 8.3 ms  
t = 10 ms  
ITM = 10 A; IG = 50 mA;  
dIG/dt = 50 mA/µs  
I2t  
dIT/dt  
I2t for fusing  
Repetitive rate of rise of  
on-state current after  
triggering  
A2s  
A/µs  
IGM  
Peak gate current  
Peak gate voltage  
Peak reverse gate voltage  
Peak gate power  
Average gate power  
Storage temperature  
Operating junction  
temperature  
-
2
5
A
V
V
W
W
˚C  
˚C  
VGM  
VRGM  
PGM  
PG(AV)  
Tstg  
-
-
5
-
-
5
over any 20 ms period  
0.5  
150  
1252  
-40  
-
Tj  
1 Although not recommended, off-state voltages up to 800V may be applied without damage, but the thyristor may  
switch to the on-state. The rate of rise of current should not exceed 15 A/µs.  
2 Note: Operation above 110˚C may require the use of a gate to cathode resistor of 1kor less.  
October 1997  
1
Rev 1.300  
Philips Semiconductors  
Product specification  
Thyristors  
logic level  
BT148 series  
THERMAL RESISTANCES  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
Rth j-mb  
Thermal resistance  
junction to mounting base  
Thermal resistance  
junction to ambient  
-
-
2.5  
K/W  
Rth j-a  
in free air  
-
95  
-
K/W  
STATIC CHARACTERISTICS  
Tj = 25 ˚C unless otherwise stated  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
IGT  
IL  
Gate trigger current  
Latching current  
Holding current  
VD = 12 V; IT = 0.1 A  
VD = 12 V; IGT = 0.1 A  
VD = 12 V; IGT = 0.1 A  
IT = 5 A  
-
15  
0.17  
0.10  
1.23  
0.4  
200  
10  
6
µA  
mA  
mA  
V
-
IH  
-
-
-
VT  
VGT  
On-state voltage  
Gate trigger voltage  
1.8  
1.5  
-
VD = 12 V; IT = 0.1 A  
VD = VDRM(max); IT = 0.1 A; Tj = 110 ˚C  
V
0.1  
-
0.2  
V
mA  
ID, IR  
Off-state leakage current VD = VDRM(max); VR = VRRM(max); Tj = 125 ˚C  
0.1  
0.5  
DYNAMIC CHARACTERISTICS  
Tj = 25 ˚C unless otherwise stated  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
dVD/dt  
Critical rate of rise of  
off-state voltage  
Gate controlled turn-on  
time  
Circuit commutated  
turn-off time  
VDM = 67% VDRM(max); Tj = 125 ˚C;  
exponential waveform; RGK = 100 Ω  
ITM = 10 A; VD = VDRM(max); IG = 5 mA;  
dIG/dt = 0.2 A/µs  
VD = 67% VDRM(max); Tj = 125 ˚C; ITM = 8 A;  
VR = 10 V; dITM/dt = 10 A/µs;  
dVD/dt = 2 V/µs; RGK = 1 kΩ  
-
-
-
50  
-
-
-
V/µs  
tgt  
tq  
2
µs  
100  
µs  
October 1997  
2
Rev 1.300  
Philips Semiconductors  
Product specification  
Thyristors  
logic level  
BT148 series  
ITSM / A  
Tmb(max) / C  
a = 1.57  
Ptot / W  
6
110  
40  
30  
20  
10  
0
conduction form  
angle  
factor  
a
4
2.8  
2.2  
1.9  
1.57  
degrees  
112.5  
115  
I
5
4
3
2
1
0
TSM  
I
30  
60  
T
1.9  
90  
120  
180  
time  
T
Tj initial = 25 C max  
2.2  
2.8  
117.5  
4
120  
122.5  
125  
0
0.5  
1
1.5  
IF(AV) / A  
2
2.5  
3
1000  
1
10  
100  
Number of half cycles at 50Hz  
Fig.1. Maximum on-state dissipation, Ptot, versus  
average on-state current, IT(AV), where  
Fig.4. Maximum permissible non-repetitive peak  
on-state current ITSM, versus number of cycles, for  
sinusoidal currents, f = 50 Hz.  
a = form factor = IT(RMS)/ IT(AV)  
.
IT(RMS) / A  
ITSM / A  
1000  
100  
10  
12  
10  
8
dIT/dt limit  
6
I
4
TSM  
time  
I
T
T
2
Tj initial = 25 C max  
0
10ms  
10us  
100us  
1ms  
0.01  
0.1  
surge duration / s  
1
10  
T / s  
Fig.2. Maximum permissible non-repetitive peak  
on-state current ITSM, versus pulse width tp, for  
sinusoidal currents, tp 10ms.  
Fig.5. Maximum permissible repetitive rms on-state  
current IT(RMS), versus surge duration, for sinusoidal  
currents, f = 50 Hz; Tmb 113˚C.  
VGT(Tj)  
IT(RMS) / A  
5
4
3
2
1
0
VGT(25 C)  
1.6  
1.4  
1.2  
1
113 C  
0.8  
0.6  
0.4  
-50  
0
50  
Tmb / C  
100  
150  
-50  
0
50  
100  
150  
Tj / C  
Fig.3. Maximum permissible rms current IT(RMS)  
versus mounting base temperature Tmb.  
,
Fig.6. Normalised gate trigger voltage  
VGT(Tj)/ VGT(25˚C), versus junction temperature Tj.  
October 1997  
3
Rev 1.300  
Philips Semiconductors  
Product specification  
Thyristors  
logic level  
BT148 series  
IGT(Tj)  
IGT(25 C)  
IT / A  
12  
10  
8
Tj = 125 C  
Tj = 25 C  
3
2.5  
2
Vo = 1.26 V  
Rs = 0.099 ohms  
typ  
max  
6
1.5  
1
4
2
0.5  
0
0
0
0.5  
1
1.5  
2
2.5  
3
-50  
0
50  
Tj / C  
100  
150  
VT / V  
Fig.7. Normalised gate trigger current  
IGT(Tj)/ IGT(25˚C), versus junction temperature Tj.  
Fig.10. Typical and maximum on-state characteristic.  
IL(Tj)  
IL(25 C)  
Zth j-mb (K/W)  
10  
1
3
2.5  
2
1.5  
1
t
P
D
0.1  
0.01  
p
t
0.5  
0
10us  
0.1ms  
1ms  
10ms  
tp / s  
0.1s  
1s  
10s  
-50  
0
50  
Tj / C  
100  
150  
Fig.8. Normalised latching current IL(Tj)/ IL(25˚C),  
versus junction temperature Tj.  
Fig.11. Transient thermal impedance Zth j-mb, versus  
pulse width tp.  
IH(Tj)  
IH(25 C)  
dVD/dt (V/us)  
1000  
3
2.5  
2
RGK = 100 ohms  
100  
1.5  
1
10  
0.5  
0
1
-50  
0
50  
Tj / C  
100  
150  
0
50  
100  
150  
Tj / C  
Fig.9. Normalised holding current IH(Tj)/ IH(25˚C),  
versus junction temperature Tj.  
Fig.12. Typical, critical rate of rise of off-state voltage,  
dVD/dt versus junction temperature Tj.  
October 1997  
4
Rev 1.300  
Philips Semiconductors  
Product specification  
Thyristors  
logic level  
BT148 series  
MECHANICAL DATA  
Dimensions in mm  
Net Mass: 0.8 g  
2.8  
2.3  
mounting  
base  
7.8  
max  
3.75  
3.1  
2.5  
11.1  
max  
1)  
2.54  
max  
1.2  
15.3  
min  
2
3
1
0.5  
4.58  
2.29  
0.88  
max  
1) Lead dimensions within this  
zone uncontrolled.  
Fig.13. SOT82; pin 2 connected to mounting base.  
Notes  
1. Refer to mounting instructions for SOT82 envelopes.  
2. Epoxy meets UL94 V0 at 1/8".  
October 1997  
5
Rev 1.300  
Philips Semiconductors  
Product specification  
Thyristors  
logic level  
BT148 series  
DEFINITIONS  
Data sheet status  
Objective specification  
This data sheet contains target or goal specifications for product development.  
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.  
Product specification  
This data sheet contains final product specifications.  
Limiting values  
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and  
operation of the device at these or at any other conditions above those given in the Characteristics sections of  
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
Philips Electronics N.V. 1997  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the  
copyright owner.  
The information presented in this document does not form part of any quotation or contract, it is believed to be  
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any  
consequence of its use. Publication thereof does not convey nor imply any license under patent or other  
industrial or intellectual property rights.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices or systems where malfunction of these  
products can be reasonably expected to result in personal injury. Philips customers using or selling these products  
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting  
from such improper use or sale.  
October 1997  
6
Rev 1.300  

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