BT258S-800R118 [NXP]
Thyristors logic level; 晶闸管逻辑电平
| 型号： | BT258S-800R118 |
| 厂家： | 
NXP |
| 描述： | Thyristors logic level |
| 文件： | 总8页 (文件大小：131K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DISCRETE SEMICONDUCTORS
DATA SHEET
BT258S-800R
Thyristors
logic level
Product specification
October 2002
NXP Semiconductors
Product specification
Thyristors
logic level
BT258S-800R
GENERAL DESCRIPTION
QUICK REFERENCE DATA
Passivated,sensitivegatethyristorin
a plastic envelope, suitable for
surface mounting, intended for use in
general purpose switching and
phase control applications. These
devices are intended to be interfaced
directly to microcontrollers, logic
integrated circuits and other low
power gate trigger circuits.
SYMBOL
PARAMETER
MAX. UNIT
VDRM, VRRM
IT(AV)
IT(RMS)
Repetitive peak off-state voltages
800
V
Average on-state current
RMS on-state current
Non-repetitive peak on-state current
5
8
75
A
A
A
ITSM
PINNING - SOT428
PIN CONFIGURATION
SYMBOL
PIN
NUMBER
tab
a
k
1
2
cathode
anode
gate
3
2
g
1
3
tab
anode
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDRM, VRRM Repetitive peak off-state
voltages
-
800
V
IT(AV)
IT(RMS)
ITSM
Average on-state current half sine wave; Tmb ≤ 111 ˚C
-
-
5
8
A
A
RMS on-state current
Non-repetitive peak
on-state current
all conduction angles
half sine wave; Tj = 25 ˚C prior to
surge
t = 10 ms
t = 8.3 ms
t = 10 ms
ITM = 10 A; IG = 50 mA;
dIG/dt = 50 mA/µs
-
-
-
-
75
82
28
50
A
A
I2t
dIT/dt
I2t for fusing
Repetitive rate of rise of
on-state current after
triggering
A2s
A/µs
IGM
Peak gate current
Peak reverse gate voltage
Peak gate power
Average gate power
Storage temperature
Operating junction
temperature
-
-
-
-
2
5
5
0.5
150
1251
A
V
W
W
˚C
˚C
VRGM
PGM
PG(AV)
Tstg
over any 20 ms period
-40
-
Tj
1 Note: Operation above 110˚C may require the use of a gate to cathode resistor of 1kΩ or less.
October 2002
1
Rev 2.000
NXP Semiconductors
Product specification
Thyristors
logic level
BT258S-800R
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Rth j-mb
Rth j-a
Thermal resistance
junction to mounting base
Thermal resistance
junction to ambient
-
-
-
2.0
-
K/W
K/W
pcb (FR4) mounted; footprint as in Fig.14
75
STATIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise stated
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
IGT
IL
IH
VT
Gate trigger current
Latching current
Holding current
VD = 12 V; IT = 0.1 A
VD = 12 V; IGT = 0.1 A
VD = 12 V; IGT = 0.1 A
IT = 16 A
-
-
-
-
50
0.4
0.3
1.3
0.4
0.2
0.1
200
10
6
1.6
1.5
-
µA
mA
mA
V
V
V
mA
On-state voltage
Gate trigger voltage
VGT
VD = 12 V; IT = 0.1 A
VD = VDRM(max); IT = 0.1 A; Tj = 110 ˚C
Off-state leakage current VD = VDRM(max); VR = VRRM(max); Tj = 125 ˚C
-
0.1
-
ID, IR
0.5
DYNAMIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise stated
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
dVD/dt
Critical rate of rise of
off-state voltage
Gate controlled turn-on
time
Circuit commutated
turn-off time
VDM = 67% VDRM(max); Tj = 125 ˚C;
exponential waveform; RGK = 100 Ω
ITM = 10 A; VD = VDRM(max); IG = 5 mA;
dIG/dt = 0.2 A/µs
VD = 67% VDRM(max); Tj = 125 ˚C;
ITM = 12 A; VR = 24 V; dITM/dt = 10 A/µs;
dVD/dt = 2 V/µs; RGK = 1 kΩ
50
-
100
2
-
-
-
V/µs
µs
tgt
tq
-
100
µs
October 2002
2
Rev 2.000
NXP Semiconductors
Product specification
Thyristors
logic level
BT258S-800R
P
(W)
T
(˚C)
109
tot
ITSM / A
mb(max)
80
70
60
50
40
30
20
10
0
8
6
4
2
0
a = 1.57
conduction form
factor
(a)
I
angle
degrees
TSM
I
111
113
115
117
119
121
123
125
T
1.9
60
2.8
2.2
1.9
1.57
2.2
time
Tj initial = 25 C max
T
90
120
180
2.8
4
1
10 100
Number of half cycles at 50Hz
1000
0
6
4
2
I
(A)
T(AV)
Fig.1. Maximum on-state dissipation, Ptot, versus
average on-state current, IT(AV), where
a = form factor = IT(RMS)/ IT(AV)
Fig.4. Maximum permissible non-repetitive peak
on-state current ITSM, versus number of cycles, for
sinusoidal currents, f = 50 Hz.
.
ITSM / A
IT(RMS) / A
24
1000
100
10
20
16
12
8
dI T/dt limit
I
TSM
time
I
T
T
4
Tj initial = 25 C max
0
0.01
10ms
10us
100us
1ms
0.1
surge duration / s
1
10
T / s
Fig.2. Maximum permissible non-repetitive peak
on-state current ITSM, versus pulse width tp, for
sinusoidal currents, tp ≤ 10ms.
Fig.5. Maximum permissible repetitive rms on-state
current IT(RMS), versus surge duration, for sinusoidal
currents, f = 50 Hz; Tmb ≤ 111˚C.
IT(RMS) / A
VGT(Tj)
VGT(25 C)
9
8
7
6
5
4
3
2
1
0
1.6
111 C
1.4
1.2
1
0.8
0.6
0.4
-50
0
50
Tmb / C
100
150
-50
0
50
Tj / C
100
150
Fig.3. Maximum permissible rms current IT(RMS)
versus mounting base temperature Tmb.
,
Fig.6. Normalised gate trigger voltage
VGT(Tj)/ VGT(25˚C), versus junction temperature Tj.
October 2002
3
Rev 2.000
NXP Semiconductors
Product specification
Thyristors
logic level
BT258S-800R
IGT(Tj)
IGT(25 C)
3
I
/ A
T
30
20
10
0
T = 125 °C
j
T = 25 °C
j
2.5
2
1.5
1
typ
max
Vo = 1 V
Rs = 0.04 Ω
0.5
0
0
0.5
1
1.5
2
-50
0
50
Tj / C
100
150
V
T
/ V
Fig.7. Normalised gate trigger current
IGT(Tj)/ IGT(25˚C), versus junction temperature Tj.
Fig.10. Typical and maximum on-state characteristic.
Zth j-mb (K/W)
10
IL(Tj)
IL(25 C)
3
2.5
2
1
1.5
1
t
P
D
0.1
p
t
0.5
0.01
10us
0
0.1ms
1ms
10ms
tp / s
0.1s
1s
10s
-50
0
50
Tj / C
100
150
Fig.8. Normalised latching current IL(Tj)/ IL(25˚C),
versus junction temperature Tj.
Fig.11. Transient thermal impedance Zth j-mb, versus
pulse width tp.
dVD/dt (V/us)
1000
IH(Tj)
IH(25 C)
3
RGK = 100 ohms
2.5
2
100
1.5
1
10
0.5
0
1
-50
0
50
Tj / C
100
150
0
50
100
150
Tj / C
Fig.9. Normalised holding current IH(Tj)/ IH(25˚C),
versus junction temperature Tj.
Fig.12. Typical, critical rate of rise of off-state voltage,
dVD/dt versus junction temperature Tj.
October 2002
4
Rev 2.000
NXP Semiconductors
Product specification
Thyristors
logic level
BT258S-800R
MECHANICAL DATA
Dimensions in mm
Net Mass: 1.1 g
seating plane
2.38 max
0.93 max
1.1
5.4
6.73 max
tab
4 min
4.6
6.22 max
0.5 min
10.4 max
0.5
2
0.3
0.5
3
1
0.8 max
(x2)
2.285 (x2)
Fig.13. SOT428 : centre pin connected to tab.
MOUNTING INSTRUCTIONS
Dimensions in mm
7.0
7.0
2.15
2.5
1.5
4.57
Fig.14. SOT428 : minimum pad sizes for surface mounting.
Notes
1. Plastic meets UL94 V0 at 1/8".
October 2002
5
Rev 2.000
NXP Semiconductors
Legal information
DATA SHEET STATUS
DOCUMENT
STATUS(1)
PRODUCT
STATUS(2)
DEFINITION
Objective data sheet
Development
This document contains data from the objective specification for product
development.
Preliminary data sheet
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Qualification
Production
This document contains data from the preliminary specification.
This document contains the product specification.
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and may differ in case of multiple devices. The latest product status information is available on the Internet at
URL http://www.nxp.com.
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