BUK210-50Y [NXP]

PowerMOS transistor TOPFET high side switch; 功率MOS晶体管TOPFET高边开关
BUK210-50Y
型号: BUK210-50Y
厂家: NXP    NXP
描述:

PowerMOS transistor TOPFET high side switch
功率MOS晶体管TOPFET高边开关

晶体 开关 晶体管
文件: 总13页 (文件大小:198K)
中文:  中文翻译
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Philips Semiconductors  
Product specification  
PowerMOS transistor  
TOPFET high side switch  
BUK210-50Y  
DESCRIPTION  
QUICK REFERENCE DATA  
Monolithic single channel high side  
protected power switch in  
TOPFET2 technology assembled in  
a 5 pin plastic package.  
SYMBOL  
PARAMETER  
MIN.  
UNIT  
IL  
Nominal load current (ISO)  
9
A
APPLICATIONS  
SYMBOL  
PARAMETER  
MAX.  
UNIT  
General controller for driving  
lamps, motors, solenoids, heaters.  
VBG  
IL  
Continuous off-state supply voltage  
Continuous load current  
50  
20  
150  
38  
V
A
˚C  
m  
Tj  
Continuous junction temperature  
RON  
On-state resistance  
Tj = 25˚C  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Vertical power TrenchMOS  
Low on-state resistance  
CMOS logic compatible  
Very low quiescent current  
Overtemperature protection  
Load current limiting  
BATT  
STATUS  
POWER  
Latched overload and  
short circuit protection  
Overvoltage and undervoltage  
shutdown with hysteresis  
On-state open circuit load  
detection  
Diagnostic status indication  
Voltage clamping for turn off  
of inductive loads  
MOSFET  
INPUT  
CONTROL &  
PROTECTION  
CIRCUITS  
ESD protection on all pins  
Reverse battery, overvoltage  
and transient protection  
LOAD  
GROUND  
RG  
Fig.1. Elements of the TOPFET HSS with internal ground resistor.  
PINNING - SOT263B-01  
PIN CONFIGURATION  
SYMBOL  
PIN  
1
DESCRIPTION  
mb  
mb  
D
S
Input  
Flag  
TOPFET  
2
P
F
I
P
3
Drain  
4
Protection supply  
Source  
1 2 3 4 5  
Front view  
MBL267  
5
Fig. 2.  
Fig. 3.  
tab Drain  
November 2002  
1
Rev 2.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
TOPFET high side switch  
BUK210-50Y  
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134)  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
VBG  
Continuous supply voltage  
0
50  
V
IL  
Continuous load current  
Total power dissipation  
Storage temperature  
Tmb 95˚C  
Tmb 25˚C  
-
-
20  
67  
A
PD  
Tstg  
Tj  
W
˚C  
˚C  
-55  
-
175  
150  
Continuous junction temperature1  
Tsold  
Lead temperature  
during soldering  
-
260  
˚C  
Reverse battery voltages2  
Continuous reverse voltage  
Peak reverse voltage  
-VBG  
-VBG  
-
-
16  
32  
V
V
Application information  
RI, RS  
External resistors3  
to limit input, status currents  
3.2  
-
kΩ  
Input and status  
II, IS  
II, IS  
Continuous currents  
-5  
5
mA  
mA  
Repetitive peak currents  
Inductive load clamping  
Non-repetitive clamping energy  
δ ≤ 0.1, tp = 300 µs  
-50  
50  
IL = 10 A, VBG = 16 V  
Tj = 150˚C prior to turn-off  
EBL  
-
150  
mJ  
ESD LIMITING VALUE  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
VC  
Electrostatic discharge capacitor  
voltage  
Human body model;  
C = 250 pF; R = 1.5 kΩ  
-
2
kV  
THERMAL CHARACTERISTICS  
SYMBOL PARAMETER  
Thermal resistance4  
CONDITIONS  
MIN. TYP. MAX. UNIT  
Rth j-mb  
Rth j-a  
Junction to mounting base  
Junction to ambient  
-
-
-
1.52  
60  
1.86  
75  
K/W  
K/W  
in free air  
1 For normal continuous operation. A higher Tj is allowed as an overload condition but at the threshold Tj(TO) the over temperature trip operates  
to protect the switch.  
2 Reverse battery voltage is allowed only with external resistors to limit the input and status currents to a safe value. The connected load must  
limit the reverse load current. The internal ground resistor limits the reverse battery ground current. Power is dissipated and the Tj  
rating must be observed.  
3 To limit currents during reverse battery and transient overvoltages (positive or negative).  
4 Of the output power MOS transistor.  
November 2002  
2
Rev 2.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
TOPFET high side switch  
BUK210-50Y  
STATIC CHARACTERISTICS  
Limits are at -40˚C Tmb 150˚C and typicals at Tmb = 25 ˚C unless otherwise stated.  
SYMBOL PARAMETER  
Clamping voltages  
Battery to ground  
CONDITIONS  
MIN. TYP. MAX. UNIT  
VBG  
VBL  
IG = 1 mA  
50  
50  
18  
20  
55  
55  
23  
25  
65  
65  
28  
30  
V
V
V
V
Battery to load  
IL = IG = 1 mA  
IL = 10 mA  
-VLG  
-VLG  
Negative load to ground  
Negative load voltage1  
IL = 10 A; tp = 300 µs  
Supply voltage  
battery to ground  
VBG  
Operating range2  
5.5  
-
35  
V
Currents  
Quiescent current3  
9 V VBG 16 V  
VLG = 0 V  
IB  
IL  
-
-
-
0.1  
-
20  
2
µA  
µA  
µA  
µA  
mA  
A
Tmb = 25˚C  
Tmb = 25˚C  
Tmb = 85˚C  
Off-state load current4  
VBL = VBG  
-
20  
1
-
0.1  
2
IG  
IL  
Operating current5  
Nominal load current6  
IL = 0 A  
-
4
VBL = 0.5 V  
9
-
-
Resistances  
VBG  
IL  
tp7  
Tmb  
RON  
RON  
On-state resistance  
9 to 35 V 10 A 300 µs  
25˚C  
150˚C  
25˚C  
-
-
-
-
28  
-
38  
70  
48  
88  
mΩ  
mΩ  
mΩ  
mΩ  
On-state resistance  
6 V  
10 A 300 µs  
36  
-
150˚C  
RG  
Internal ground resistance  
IG = 10 mA  
95  
150  
190  
1 For a high side switch, the load pin voltage goes negative with respect to ground during the turn-off of an inductive load.  
2 On-state resistance is increased if the supply voltage is less than 9 V.  
3 This is the continuous current drawn from the supply when the input is low and includes leakage current to the load.  
4 The measured current is in the load pin only.  
5 This is the continuous current drawn from the supply with no load connected, but with the input high.  
6 Defined as in ISO 10483-1. For comparison purposes only. This parameter will not be characterised for automotive PPAP.  
7 The supply and input voltage for the RON tests are continuous. The specified pulse duration tp refers only to the applied load current.  
November 2002  
3
Rev 2.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
TOPFET high side switch  
BUK210-50Y  
INPUT CHARACTERISTICS  
9 V VBG 16 V. Limits are at -40˚C Tmb 150˚C and typicals at Tmb = 25 ˚C unless otherwise stated.  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
II  
Input current  
VIG = 5 V  
20  
5.5  
-
90  
7
160  
µA  
V
VIG  
Input clamping voltage  
Input turn-on threshold voltage  
Input turn-off threshold voltage  
Input turn-on hysteresis  
Input turn-on current  
II = 200 µA  
8.5  
VIG(ON)  
VIG(OFF)  
VIG  
II(ON)  
II(OFF)  
2.4  
2.1  
0.3  
-
3
V
1.5  
-
-
V
-
100  
-
V
VIG = 3 V  
-
µA  
µA  
Input turn-off current  
VIG = 1.5 V  
10  
-
STATUS CHARACTERISTICS  
The status output is an open drain transistor, and requires an external pull-up circuit to indicate a logic high.  
Limits are at -40˚C Tmb 150˚C and typicals at Tmb = 25 ˚C unless otherwise stated. Refer to TRUTH TABLE.  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
VSG  
VSG  
Status clamping voltage  
IS = 100 µA  
IS = 100 µA  
5.5  
7
-
8.5  
1
V
V
V
Status low voltage  
-
-
Tmb = 25˚C  
Tmb = 25˚C  
0.7  
0.8  
IS  
IS  
Status leakage current  
VSG = 5 V  
VSG = 5 V  
-
-
-
0.1  
7
15  
1
µA  
µA  
mA  
Status saturation current1  
2
12  
Application information  
RS  
External pull-up resistor  
-
47  
-
kΩ  
OPEN CIRCUIT DETECTION CHARACTERISTICS  
An open circuit load can be detected in the on-state. Refer to TRUTH TABLE.  
Limits are at -40˚C Tmb 150˚C and typical is at Tmb = 25 ˚C.  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
Open circuit detection  
9 V VBG 35 V  
IL(TO)  
Low current detect threshold  
Hysteresis  
0.24  
0.4  
-
1.6  
1.2  
A
A
Tj = 25˚C  
0.8  
IL(TO)  
-
0.16  
-
A
1 In a fault condition with the pull-up resistor short circuited while the status transistor is conducting. This condition should be avoided in order to  
prevent possible interference with normal operation of the device.  
November 2002  
4
Rev 2.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
TOPFET high side switch  
BUK210-50Y  
UNDERVOLTAGE & OVERVOLTAGE CHARACTERISTICS  
Limits are at -40˚C Tmb 150˚C and typicals at Tmb = 25 ˚C. Refer to TRUTH TABLE.  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
Undervoltage  
VBG(UV)  
Low supply threshold voltage1  
2
-
4.2  
0.5  
5.5  
-
V
V
VBG(UV)  
Hysteresis  
Overvoltage  
VBG(OV)  
High supply threshold voltage2  
Hysteresis  
40  
-
45  
1
50  
-
V
V
VBG(OV)  
TRUTH TABLE  
ABNORMAL CONDITIONS  
DETECTED  
LOAD  
OUTPUT  
OT  
INPUT  
SUPPLY  
LOAD  
STATUS  
DESCRIPTION  
UV  
OV  
X
0
LC  
X
0
SC  
X
0
L
X
0
0
1
0
0
0
X
0
0
X
0
X
1
OFF  
ON  
H
H
L
off  
H
H
H
H
H
H
on & normal  
0
1
0
ON  
on & low current detect  
supply undervoltage lockout  
supply overvoltage shutdown  
SC tripped  
0
X
X
0
X
0
OFF  
OFF  
OFF  
OFF  
H
H
L
1
0
1
0
0
0
L
OT shutdown3  
KEY TO ABBREVIATIONS  
L
H
X
0
logic low  
UV undervoltage  
OV overvoltage  
logic high  
dont care  
condition not present  
condition present  
LC low current or open circuit load  
SC short circuit  
1
OT overtemperature  
1 Undervoltage sensor causes the device to switch off and reset.  
2 Overvoltage sensor causes the device to switch off to protect its load.  
3 The status will continue to indicate OT (even if the input goes low) until the device cools below the reset threshold. Refer to OVERLOAD  
PROTECTION CHARACTERISTICS.  
November 2002  
5
Rev 2.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
TOPFET high side switch  
BUK210-50Y  
OVERLOAD PROTECTION CHARACTERISTICS  
5.5 V VBG 35 V, limits are at -40˚C Tmb 150˚C and typicals at Tmb = 25 ˚C unless otherwise stated.  
Refer to TRUTH TABLE.  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
Overload protection  
VBL = VBG  
IL(lim)  
Load current limiting  
VBG 9 V  
34  
45  
64  
A
Short circuit load protection  
VBL(TO)  
td sc  
Battery load threshold voltage1  
VBG = 16 V  
VBG = 35 V  
8
15  
-
10  
20  
12  
25  
V
V
Response time2  
VBL > VBL(TO)  
180  
250  
µs  
Overtemperature protection  
Tj(TO)  
Threshold junction  
temperature3  
150  
-
170  
10  
190  
-
˚C  
˚C  
Tj(TO)  
Hysteresis  
SWITCHING CHARACTERISTICS  
Tmb = 25 ˚C, VBG = 13 V, for resistive load RL = 13 .  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
During turn-on  
from input going high  
to 10% VL  
td on  
Delay time  
-
-
40  
60  
1
µs  
V/µs  
dV/dton  
Rate of rise of load voltage  
30% to 70% VL  
0.35  
t on  
Total switching time  
to 90% VL  
-
140  
200  
µs  
During turn-off  
from input going low  
to 90% VL  
td off  
Delay time  
-
-
-
55  
0.6  
85  
80  
1
µs  
V/µs  
µs  
dV/dtoff  
t off  
Rate of fall of load voltage  
Total switching time  
70% to 30% VL  
to 10% VL  
120  
CAPACITANCES  
Tmb = 25 ˚C; f = 1 MHz; VIG = 0 V. designed in parameters.  
SYMBOL PARAMETER  
CONDITIONS  
VBG = 13 V  
VBL = 13 V  
VSG = 5 V  
MIN. TYP. MAX. UNIT  
Cig  
Cbl  
Csg  
Input capacitance  
Output capacitance  
Status capacitance  
-
-
-
15  
250  
11  
20  
350  
15  
pF  
pF  
pF  
1 The battery to load threshold voltage for short circuit protection is proportional to the battery supply voltage. After short circuit protection has  
operated, the input voltage must be toggled low for the switch to resume normal operation.  
2 Measured from when the input goes high.  
3 After cooling below the reset temperature the switch will resume normal operation.  
November 2002  
6
Rev 2.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
TOPFET high side switch  
BUK210-50Y  
I
BG(ON) / mA  
BUK210-50Y  
CLAMPING  
5
4
3
2
1
0
VBL  
IL  
UNDERVOLTAGE  
SHUTDOWN  
IB  
II  
B
OVERVOLTAGE  
SHUTDOWN  
I
TOPFET  
HSS  
VBG  
L
IS  
S
OPERATING VIG = 5 V  
VLG  
G
VSG  
VIG  
RS  
IG  
QUIESCENT VIG = 0 V  
0
10  
20  
30  
V
40  
BG / V  
50  
60  
70  
Fig.4. High side switch measurements schematic.  
(current and voltage conventions)  
Fig.7. Typical supply characteristics, 25 ˚C.  
IG = f(VBG); parameter VIG  
RON / mOhm  
BUK210-50Y  
R
ON / mOhm  
BUK210-50Y  
40  
38  
36  
34  
32  
30  
28  
26  
24  
22  
20  
80  
60  
40  
20  
0
RON max  
.
typ  
VBG = 6 V  
9 V =< VBG =< 35 V  
1
10  
VBG / V  
100  
-50  
0
50  
Tj  
100  
150  
200  
/
OC  
Fig.5. Typical on-state resistance, tp = 300 µs.  
Fig.8. Typical on-state resistance,Tj = 25 ˚C.  
RON = f(VBG); condition IL = 10 A; tp = 300 µs  
RON = f(Tj); parameter VBG; condition IL = 10 A  
IL / A  
BUK210-50Y  
IG / mA  
BUK210-50Y  
50  
40  
30  
20  
10  
0
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
lL = 0 A  
VBG / V  
> = 8  
7
6
9 V <= VBG <= 35 V  
5
lL > IL(TO)  
typ.  
VBG = 50 V  
0
1
2
-50  
0
50  
100  
150  
200  
Tj / O  
C
VBL / V  
Fig.6. Typical on-state characteristics, Tj = 25 ˚C.  
Fig.9. Typical operating supply current.  
IG = f(Tj); parameters IL, VBG; condition VIG = 5 V  
IL = f(Tj); parameter VBG; tp = 250 µs  
November 2002  
7
Rev 2.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
TOPFET high side switch  
BUK210-50Y  
BUK210-50Y  
max.  
I
B / A  
IL(OC) / A  
BUK210-50Y  
100E-6  
10E-6  
1E-6  
1.6  
1.2  
0.8  
0.4  
0.0  
typ.  
100E-9  
10E-9  
1E-9  
max.  
typ.  
min.  
100E-12  
-50  
0
50  
100  
150  
200  
-50  
0
50  
100  
150  
200  
Tj / O  
C
Tj / O  
C
Fig.10. Typical supply quiescent current.  
IB = f(Tj); condition VBG = 16 V, VIG = 0 V, VLG = 0 V  
Fig.13. Low load current detection threshold.  
IL(OC) = f(Tj); conditions VIG = 5 V; VBG 9 V  
BUK210-50Y  
IL / A  
BUK210-50Y  
max.  
V
BG(UV) / V  
100E-6  
10E-6  
1E-6  
5.5  
4.5  
3.5  
2.5  
typ.  
typ.  
100E-9  
10E-9  
1E-9  
on  
off  
00E-12  
10E-12  
-50  
0
50  
100  
150  
200  
-50  
0
50  
100  
150  
200  
Tj / O  
C
Tj / O  
C
Fig.11. Typical off-state leakage current.  
IL = f(Tj); conditions VBL = 16 V = VBG, VIG = 0 V.  
Fig.14. Supply undervoltage thresholds.  
VBG(UV) = f(Tj); conditions VIG = 5 V; VBL 2 V  
VBG(OV) / V  
BUK210-50Y  
IS / A  
BUK210-50Y  
max.  
55  
50  
45  
40  
35  
100E-6  
10E-6  
1E-6  
max.  
on  
typ.  
100E-9  
10E-9  
1E-9  
off  
min.  
-50  
0
50  
100  
150  
200  
-50  
0
50  
100  
150  
200  
Tj / O  
C
Tj / O  
C
Fig.12. Status leakage current.  
IS = f(Tj); conditions VSG = 5 V, VIG = VBG = 0 V  
Fig.15. Supply overvoltage thresholds.  
VBG(OV) = f(Tj); conditions VIG = 5 V; IL = 100 mA  
November 2002  
8
Rev 2.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
TOPFET high side switch  
BUK210-50Y  
VSG(LOW) / V  
IS / mA  
BUK210-50Y  
BUK210-50Y  
8
6
4
2
0
1
0.5  
0
0
1
2
3
4
5
-50  
0
50  
100  
150  
200  
Tj / O  
C
VSG / V  
Fig.16. Typical status low characteristic.  
VSG = f(Tj); conditions VBG 9 V, IS = 100 µA  
Fig.19. Typical status low characteristic, Tj = 25 ˚C.  
IS = f(VSG); conditions VIG = 5V, VBG = 13V,IL = 0A  
VSG / V  
BUK210-50Y  
5
VIG / V  
BUK210-50Y  
7.50  
7.40  
7.30  
7.20  
7.10  
7.00  
6.90  
6.80  
6.70  
6.60  
6.50  
3.00  
2.50  
2.00  
1.50  
1.00  
VIG / V =  
0
VIG(ON)  
VIG(OFF)  
-50  
0
50  
100  
150  
200  
Tj / O  
C
-50  
0
50  
100  
150  
200  
Tj / O  
C
Fig.17. Typical threshold voltage characteristic.  
Fig.20. Typical status clamping voltage.  
VSG = f(Tj); condition IS = 100µA, VBG = 13V  
VIG = f(Tj); condition 9V VBG 16V  
BUK210-50Y  
IS / mA  
VIG / V  
BUK210-50Y  
20  
15  
10  
5
7.50  
7.40  
7.30  
7.20  
7.10  
7.00  
6.90  
6.80  
6.70  
6.60  
6.50  
0
0
2
4
6
8
10  
Tj / O  
C
-50  
0
50  
100  
150  
200  
VSG / V  
Fig.18. Typical input clamping voltage.  
VIG = f(Tj); condition II = 200µA, VBG = 13V  
Fig.21. Typical status characteristic, Tj = 25 ˚C.  
IS = f(VSG); conditions VIG = VBG = 0V  
November 2002  
9
Rev 2.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
TOPFET high side switch  
BUK210-50Y  
VLG / V  
VBG / V  
65  
BUK210-50Y  
BUK210-50Y  
200 mA  
-10  
-15  
-20  
-25  
-30  
IG  
=
60  
55  
50  
1 mA  
IL  
=
10 mA  
10 A  
-50  
0
50  
100  
150  
200  
-50  
0
50  
100  
150  
200  
Tj / O  
C
Tj / O  
C
Fig.22. Typical battery to ground clamping voltage.  
VBG = f(Tj); parameter IG  
Fig.25. Typical negative load clamping voltage.  
VLG = f(Tj); parameter IL; condition VIG = = 0V  
VBL / V  
IL / A  
BUK210-50Y  
BUK210-50Y  
65  
60  
0
-5  
-10  
-15  
-20  
-25  
-30  
-35  
-40  
-45  
-50  
IL  
=
600 mA  
1 mA  
55  
50  
-1.1 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0  
VBL / V  
-50  
0
50  
100  
150  
200  
Tj / O  
C
Fig.23. Typical battery to load clamping voltage.  
VBL = f(Tj); parameter IL; condition IG = 10mA  
Fig.26. Typical reverse diode characteristic.  
IL = f(VBL); conditions VIG = 0 V, Tj = 25 ˚C  
IL / A  
IL / A  
BUK210-50Y  
BUK210-50Y  
10  
50  
45  
40  
35  
30  
25  
20  
15  
10  
5
current limiting  
VBL(TO) typ.  
Short circuit trip = 150us  
5
0
0
-30  
-25  
-20  
-15  
-10  
0
2
4
6
8
10  
12  
14  
16  
18  
20  
VLG / V  
VBL / V  
Fig.24. Typical negative load clamping.  
IL = f(VLG); conditions VIG = = 0V, Tj = 25˚C  
Fig.27. Typical overload characteristic, Tmb = 25 ˚C.  
IL = f(VBL); condition VBG = 16 V; parameter tp  
November 2002  
10  
Rev 2.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
TOPFET high side switch  
BUK210-50Y  
IL(lim) / A  
BUK210-50Y  
V
/ V  
BUK215-50Y  
max.  
BL(TO)  
35  
30  
25  
20  
15  
10  
5
50  
45  
40  
35  
30  
typ. 25˚C  
min.  
0
0
10  
20  
30  
40  
50  
Tj / O  
C
-50  
0
50  
100  
150  
200  
V
BG  
/ V  
Fig.28. Short circuit load threshold voltage.  
VBL(TO) = f(VBG); conditions -40˚C Tmb 150˚C  
Fig.31. Typical overload current, VBL = 8V.  
IL = f(Tj); parameter VBG = 13V;tp = 300 µs  
CBL  
BUK210-50Y  
VBL(TO) / V  
BUK210-50Y  
10 nF  
12.0  
11.8  
11.6  
11.4  
11.2  
11.0  
10.8  
10.6  
10.4  
10.2  
10.0  
1nF  
100pF  
-50  
0
50  
100  
150  
200  
0
10  
20  
30  
40  
50  
Tj / O  
C
VBL / V  
Fig.29. Typical output capacitance. Tmb = 25 ˚C  
Cbl = f(VBL); conditions f = 1 MHz, VIG = 0 V  
Fig.32. Typical short circuit load threshold voltage.  
VBL(TO) = f(Tj); condition VBG = 16 V  
BUK210-50Y  
Zth j-mb ( K / W )  
IG / mA  
BUK210-50Y  
1e+01  
1e+00  
1e-01  
1e-02  
1e-03  
0
-50  
D =  
0.5  
0.2  
0.1  
0.05  
-100  
-150  
-200  
0.02  
t
T
p
tp  
P
D =  
D
0
t
T
-20  
-15  
-10  
VBG / V  
-5  
0
1e-07  
1e-05  
1e-03  
t / s  
1e-01  
1e+02  
Fig.30. Typical reverse battery characteristic.  
IG = f(VBG); conditions IL = 0 A, Tj = 25 ˚C  
Fig.33. Transient thermal impedance.  
Zth j-mb = f(t); parameter D = tp/T  
November 2002  
11  
Rev 2.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
TOPFET high side switch  
BUK210-50Y  
MECHANICAL DATA  
Plastic single-ended package; heatsink mounted; 1 mounting hole;  
SOT263B-01  
5-lead TO-220 lead form option  
E
p
A
1
A
p  
1
q
D
1
mounting  
base  
D
L
3
R
L
1
L
L
4
m
L
2
R
Q
1
5
e
b
w
M
c
Q
1
Q
2
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(2)  
L
4
(1)  
b
D
A
A
c
D
E
UNIT  
mm  
e
L
L
L
m
p  
p
q
Q
Q
Q
2
R
w
L
1
1
1
2
3
1
1
max.  
4.5 1.39 0.85 0.7 15.8 6.4 10.3  
4.1 1.27 0.70 0.4 15.2 5.9 9.7  
9.8 5.9 5.2 2.4  
9.7 5.3 5.0 1.6  
0.8 3.8 4.3 3.0  
0.6 3.6 4.1 2.7  
1.7  
0.5  
2.0 4.5 8.2 0.5 0.4  
Notes  
1. Terminal dimensions are uncontrolled in this zone.  
2. Positional accuracy of the terminals is controlled in this zone.  
REFERENCES  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
JEDEC  
EIAJ  
5-lead (option)  
TO-220  
01-01-11  
SOT263B-01  
Fig.34. SOT263B package1 leadform 263B-01, pin 3 connected to mounting base.  
1 Refer to mounting instructions for TO220 envelopes. Epoxy meets UL94 VO at 1/8". Net mass: 2 g  
November 2002  
12  
Rev 2.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
TOPFET high side switch  
BUK210-50Y  
DEFINITIONS  
DATA SHEET STATUS  
DATA SHEET  
STATUS1  
PRODUCT  
STATUS2  
DEFINITIONS  
Objective data  
Development  
This data sheet contains data from the objective specification for  
product development. Philips Semiconductors reserves the right to  
change the specification in any manner without notice  
Preliminary data  
Qualification  
This data sheet contains data from the preliminary specification.  
Supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to change the specification without  
notice, in order to improve the design and supply the best possible  
product  
Product data  
Production  
This data sheet contains data from the product specification. Philips  
Semiconductors reserves the right to make changes at any time in  
order to improve the design, manufacturing and supply. Changes will  
be communicated according to the Customer Product/Process  
Change Notification (CPCN) procedure SNW-SQ-650A  
Limiting values  
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and  
operation of the device at these or at any other conditions above those given in the Characteristics sections of  
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
Philips Electronics N.V. 2002  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the  
copyright owner.  
The information presented in this document does not form part of any quotation or contract, it is believed to be  
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any  
consequence of its use. Publication thereof does not convey nor imply any license under patent or other  
industrial or intellectual property rights.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices or systems where malfunction of these  
products can be reasonably expected to result in personal injury. Philips customers using or selling these products  
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting  
from such improper use or sale.  
1 Please consult the most recently issued datasheet before initiating or completing a design.  
2 The product status of the device(s) described in this datasheet may have changed since this datasheet was published. The latest information is  
available on the Internet at URL http://www.semiconductors.philips.com.  
November 2002  
13  
Rev 2.000  

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