BUK655R0-75C,127 [NXP]

N-channel TrenchMOS FET TO-220 3-Pin;
BUK655R0-75C,127
型号: BUK655R0-75C,127
厂家: NXP    NXP
描述:

N-channel TrenchMOS FET TO-220 3-Pin

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中文:  中文翻译
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BUK655R0-75C  
N-channel TrenchMOS FET  
Rev. 02 — 14 October 2010  
Product data sheet  
1. Product profile  
1.1 General description  
Intermediate level gate drive N-channel enhancement mode Field-Effect Transistor (FET)  
in a plastic package using advanced TrenchMOS technology. This product has been  
designed and qualified to the appropriate AEC Q101 standard for use in high performance  
automotive applications.  
1.2 Features and benefits  
„ AEC Q101 compliant  
„ Suitable for thermally demanding  
environments due to 175 °C rating  
„ Suitable for intermediate level gate  
drive sources  
1.3 Applications  
„ 12 V, 24 V and 42 V Automotive  
„ Start-Stop micro-hybrid applications  
„ Transmission control  
systems  
„ Electric and electro-hydraulic power  
„ Ultra high performance power  
steering  
switching  
„ Motors, lamps and solenoid control  
1.4 Quick reference data  
Table 1.  
Symbol  
VDS  
Quick reference data  
Parameter  
Conditions  
Min Typ Max Unit  
drain-source voltage Tj 25 °C; Tj 175 °C  
-
-
-
-
75  
V
A
[1]  
ID  
drain current  
VGS = 10 V; Tmb = 25 °C;  
see Figure 1  
120  
Ptot  
total power  
dissipation  
Tmb = 25 °C; see Figure 2  
-
-
-
263  
5.3  
W
Static characteristics  
RDSon drain-source on-state VGS = 10 V; ID = 25 A;  
resistance Tj = 25 °C; see Figure 11  
4.6  
mΩ  
 
 
 
 
 
BUK655R0-75C  
NXP Semiconductors  
N-channel TrenchMOS FET  
Table 1.  
Symbol  
Avalanche ruggedness  
Quick reference data …continued  
Parameter Conditions  
Min Typ Max Unit  
EDS(AL)S  
non-repetitive  
drain-source  
avalanche energy  
ID = 120 A; Vsup 75 V;  
RGS = 50 ; VGS = 10 V;  
Tj(init) = 25 °C; unclamped  
-
-
329 mJ  
Dynamic characteristics  
QGD gate-drain charge  
ID = 25 A; VDS = 60 V;  
-
46.7  
-
nC  
VGS = 10 V; see Figure 13;  
see Figure 14  
[1] Continuous current is limited by package.  
2. Pinning information  
Table 2.  
Pinning information  
Symbol Description  
Pin  
1
Simplified outline  
Graphic symbol  
G
D
S
D
gate  
mb  
D
S
2
Drain  
source  
3
G
mb  
mounting base; connected to  
drain  
mbb076  
1
2 3  
SOT78A (TO-220AB)  
3. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
BUK655R0-75C  
TO-220AB  
plastic single-ended package; heatsink mounted; 1 mounting  
hole; 3-lead TO-220AB  
SOT78A  
BUK655R0-75C  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 14 October 2010  
2 of 14  
 
 
BUK655R0-75C  
NXP Semiconductors  
N-channel TrenchMOS FET  
4. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Max  
75  
Unit  
V
drain-source voltage  
gate-source voltage  
Tj 25 °C; Tj 175 °C  
-
[1]  
[2]  
[3]  
VGS  
DC  
-16  
16  
V
Pulsed  
-20  
20  
V
ID  
drain current  
Tmb = 25 °C; VGS = 10 V; see Figure 1  
Tmb = 100 °C; VGS = 10 V; see Figure 1  
-
-
-
120  
98  
A
A
IDM  
peak drain current  
Tmb = 25 °C; tp 10 µs; pulsed;  
553  
A
see Figure 3  
Ptot  
Tstg  
Tj  
total power dissipation  
storage temperature  
junction temperature  
Tmb = 25 °C; see Figure 2  
-
263  
175  
175  
W
-55  
-55  
°C  
°C  
Source-drain diode  
[3]  
IS  
source current  
peak source current  
Tmb = 25 °C  
-
-
120  
553  
A
A
ISM  
tp 10 µs; pulsed; Tmb = 25 °C  
Avalanche ruggedness  
EDS(AL)S non-repetitive drain-source  
ID = 120 A; Vsup 75 V; RGS = 50 ;  
VGS = 10 V; Tj(init) = 25 °C; unclamped  
-
-
329  
-
mJ  
J
avalanche energy  
[4][5][6]  
EDS(AL)R  
repetitive drain-source  
avalanche energy  
[1] -16V accumulated duration not to exceed 168 hrs  
[2] Accumulated pulse duration not to exceed 5mins.  
[3] Continuous current is limited by package.  
[4] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.  
[5] Repetitive avalanche rating limited by an average junction temperature of 170 °C.  
[6] Refer to application note AN10273 for further information.  
BUK655R0-75C  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 14 October 2010  
3 of 14  
 
 
 
 
 
 
 
BUK655R0-75C  
NXP Semiconductors  
N-channel TrenchMOS FET  
03aa16  
003aac793  
120  
160  
ID  
(A)  
P
(%)  
der  
120  
(1)  
80  
80  
40  
0
40  
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
T
mb (°C)  
T
mb  
(°C)  
Fig 1. Continuous drain current as a function of  
mounting base temperature  
Fig 2. Normalized total power dissipation as a  
function of mounting base temperature  
003aae426  
104  
ID  
(A)  
103  
Limit RDSon = VDS / ID  
tp =10 μs  
100 μs  
102  
10  
DC  
1 ms  
1
10 ms  
100 ms  
10-1  
10-1  
1
10  
102  
103  
V DS (V)  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage  
BUK655R0-75C  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 14 October 2010  
4 of 14  
BUK655R0-75C  
NXP Semiconductors  
N-channel TrenchMOS FET  
5. Thermal characteristics  
Table 5.  
Symbol  
Rth(j-mb)  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
thermal resistance from junction to  
mounting base  
see Figure 4  
-
-
0.57  
K/W  
Rth(j-a)  
thermal resistance from junction to  
ambient  
vertical in free air  
-
60  
-
K/W  
003aae427  
1
Zth(j-mb)  
(K/W)  
δ = 0.5  
0.2  
0.1  
10-1  
10-2  
10-3  
0.05  
0.02  
tp  
δ =  
P
T
single shot  
t
tp  
T
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
1
tp (s)  
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration  
BUK655R0-75C  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 14 October 2010  
5 of 14  
 
 
BUK655R0-75C  
NXP Semiconductors  
N-channel TrenchMOS FET  
6. Characteristics  
Table 6.  
Symbol  
Characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
V(BR)DSS drain-source breakdown  
ID = 250 µA; VGS = 0 V; Tj = 25 °C  
ID = 250 µA; VGS = 0 V; Tj = -55 °C  
75  
68  
1.8  
-
-
V
V
V
voltage  
-
-
VGS(th)  
gate-source threshold  
voltage  
ID = 1 mA; VDS = VGS; Tj = 25 °C;  
see Figure 9; see Figure 10  
2.3  
2.8  
ID = 1 mA; VDS = VGS; Tj = -55 °C;  
see Figure 10  
-
-
-
3.3  
-
V
V
ID = 2.5 mA; VDS = VGS; Tj = 175 °C;  
see Figure 10  
0.8  
IDSS  
drain leakage current  
gate leakage current  
VDS = 75 V; VGS = 0 V; Tj = 175 °C  
VDS = 75 V; VGS = 0 V; Tj = 25 °C  
VDS = 0 V; VGS = 20 V; Tj = 25 °C  
VDS = 0 V; VGS = -20 V; Tj = 25 °C  
-
-
-
-
-
-
500  
1
µA  
µA  
nA  
nA  
mΩ  
0.02  
2
IGSS  
100  
100  
5.3  
2
RDSon  
drain-source on-state  
resistance  
VGS = 10 V; ID = 25 A; Tj = 25 °C;  
see Figure 11  
4.6  
VGS = 4.5 V; ID = 25 A; Tj = 25 °C;  
see Figure 11  
-
-
-
5.5  
5.2  
-
7.4  
mΩ  
mΩ  
mΩ  
VGS = 5 V; ID = 25 A; Tj = 25 °C;  
6.5  
see Figure 11  
VGS = 10 V; ID = 25 A; Tj = 175 °C;  
see Figure 12; see Figure 11  
13.8  
Dynamic characteristics  
QG(tot)  
total gate charge  
ID = 25 A; VDS = 60 V; VGS = 10 V;  
see Figure 13; see Figure 14  
-
-
177  
100  
-
-
nC  
nC  
ID = 25 A; VDS = 60 V; VGS = 5 V;  
see Figure 13; see Figure 14  
QGS  
QGD  
Ciss  
Coss  
Crss  
td(on)  
tr  
gate-source charge  
gate-drain charge  
input capacitance  
output capacitance  
reverse transfer capacitance  
turn-on delay time  
rise time  
ID = 25 A; VDS = 60 V; VGS = 10 V;  
see Figure 13; see Figure 14  
-
-
-
-
-
-
-
-
-
-
21.8  
46.7  
-
-
nC  
nC  
VGS = 0 V; VDS = 25 V; f = 1 MHz;  
Tj = 25 °C; see Figure 15  
8500 11400 pF  
650  
421  
32.6  
65  
780  
pF  
pF  
ns  
ns  
ns  
ns  
nH  
580  
VDS = 55 V; RL = 2.2 ; VGS = 10 V;  
RG(ext) = 10 Ω  
-
-
-
-
-
td(off)  
tf  
turn-off delay time  
fall time  
365  
141  
4.5  
LD  
internal drain inductance  
from drain lead 6 mm from package to  
centre of die ; Tj = 25 °C  
LS  
internal source inductance  
from source lead to source bond pad ;  
Tj = 25 °C  
-
7.5  
-
nH  
BUK655R0-75C  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 14 October 2010  
6 of 14  
 
BUK655R0-75C  
NXP Semiconductors  
N-channel TrenchMOS FET  
Table 6.  
Symbol  
Characteristics …continued  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Source-drain diode  
VSD  
source-drain voltage  
IS = 25 A; VGS = 0 V; Tj = 25 °C;  
see Figure 16  
-
0.85  
1.2  
V
trr  
reverse recovery time  
recovered charge  
IS = 20 A; dIS/dt = -100 A/µs;  
VGS = 0 V; VDS = 25 V  
-
-
62  
-
-
ns  
Qr  
153  
nC  
003aae430  
003aae756  
250  
gfs  
(S)  
200  
200  
6.0 5.0  
VGS (V) = 10.0  
4.5  
ID  
(A)  
150  
150  
100  
50  
4.0  
3.8  
100  
50  
0
3.6  
3.4  
0
0
40  
80  
120  
160  
0
0.5  
1
1.5  
2
ID (A)  
VDS (V)  
Fig 5. Forward transconductance as a function of  
drain current; typical values  
Fig 6. Output characteristics: drain current as a  
function of drain-source voltage; typical values  
003aae758  
003aae759  
20  
200  
ID  
(A)  
160  
RDSon  
(mΩ)  
15  
10  
5
120  
80  
40  
0
Tj = 175 °C  
Tj = 25 °C  
0
0
5
10  
15  
20  
0
2
4
6
V
GS (V)  
VGS (V)  
Fig 7. Drain-source on-state resistance as a function  
of gate-source voltage; typical values  
Fig 8. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values  
BUK655R0-75C  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 14 October 2010  
7 of 14  
BUK655R0-75C  
NXP Semiconductors  
N-channel TrenchMOS FET  
003aad806  
003aae542  
10-1  
ID  
4
VGS(th)  
(V)  
(A)  
10-2  
3
2
1
0
max @1mA  
min  
typ  
max  
10-3  
typ @1mA  
10-4  
10-5  
10-6  
min @2.5mA  
0
1
2
3
4
-60  
0
60  
120  
180  
VGS (V)  
Tj (°C)  
Fig 9. Sub-threshold drain current as a function of  
gate-source voltage  
Fig 10. Gate-source threshold voltage as a function of  
junction temperature  
003aae757  
003aad804  
20  
3
3.8  
4.0  
VGS (V) =  
4.5  
a
RDSon  
(mΩ)  
2.5  
15  
10  
5
2
1.5  
1
5.0  
6.0  
10.0  
0.5  
0
0
0
50  
100  
150  
200  
250  
-60  
0
60  
120  
180  
ID (A)  
Tj (°C)  
Fig 11. Drain-source on-state resistance as a function  
of drain current; typical values  
Fig 12. Normalized drain-source on-state resistance  
factor as a function of junction temperature  
BUK655R0-75C  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 14 October 2010  
8 of 14  
BUK655R0-75C  
NXP Semiconductors  
N-channel TrenchMOS FET  
003aae434  
10  
VGS  
(V)  
V
DS  
I
D
8
6
4
2
0
V
GS(pl)  
14 V  
V
GS(th)  
VDS = 60 V  
V
GS  
Q
Q
GS1  
GS2  
Q
Q
GD  
GS  
Q
G(tot)  
003aaa508  
0
50  
100  
150  
200  
Q
G (nC)  
Fig 13. Gate charge waveform definitions  
Fig 14. Gate-source voltage as a function of gate  
charge; typical values  
003aae431  
003aae435  
105  
160  
IS  
(A)  
C
(pF)  
120  
80  
104  
Ciss  
103  
Coss  
40  
Tj = 175 °C  
Tj = 25 °C  
Crss  
102  
102  
10-2  
0
10-1  
1
10  
0
0.3  
0.6  
0.9  
1.2  
VDS (V)  
VSD (V)  
Fig 15. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values  
Fig 16. Source current as a function of source-drain  
voltage; typical values  
BUK655R0-75C  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 14 October 2010  
9 of 14  
BUK655R0-75C  
NXP Semiconductors  
N-channel TrenchMOS FET  
7. Package outline  
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB  
SOT78A  
E
p
A
A
1
q
mounting  
base  
D
1
D
(1)  
L
L
2
1
Q
b
1
L
1
2
3
b
c
e
e
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
b
L
max.  
(1)  
2
e
A
b
D
E
L
D
1
L
1
A
c
UNIT  
p
q
Q
1
1
4.5  
4.1  
1.39  
1.27  
0.9  
0.6  
1.3  
1.0  
0.7  
0.4  
15.8  
15.2  
6.4  
5.9  
10.3  
9.7  
15.0  
13.5  
3.30  
2.79  
3.8  
3.6  
3.0  
2.7  
2.6  
2.2  
mm  
3.0  
2.54  
Note  
1. Terminals in this zone are not tinned.  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
03-01-22  
05-03-14  
SOT78A  
3-lead TO-220AB  
SC-46  
Fig 17. Package outline SOT78A (TO-220AB)  
BUK655R0-75C  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 14 October 2010  
10 of 14  
 
BUK655R0-75C  
NXP Semiconductors  
N-channel TrenchMOS FET  
8. Revision history  
Table 7.  
Revision history  
Document ID  
Release date  
Data sheet status  
Change notice  
Supersedes  
BUK655R0-75C v.2  
Modifications:  
20101014  
Product data sheet  
-
BUK655R0-75C v.1  
Status changed from objective to product.  
Various changes to content.  
BUK655R0-75C v.1  
20100706  
Objective data sheet  
-
-
BUK655R0-75C  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 14 October 2010  
11 of 14  
 
BUK655R0-75C  
NXP Semiconductors  
N-channel TrenchMOS FET  
9. Legal information  
9.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Definition  
Objective [short] data sheet  
Development  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term 'short data sheet' is explained in section "Definitions".  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product  
status information is available on the Internet at URL http://www.nxp.com.  
Suitability for use in automotive applications — This NXP  
9.2 Definitions  
Semiconductors product has been qualified for use in automotive  
applications. The product is not designed, authorized or warranted to be  
suitable for use in medical, military, aircraft, space or life support equipment,  
nor in applications where failure or malfunction of an NXP Semiconductors  
product can reasonably be expected to result in personal injury, death or  
severe property or environmental damage. NXP Semiconductors accepts no  
liability for inclusion and/or use of NXP Semiconductors products in such  
equipment or applications and therefore such inclusion and/or use is at the  
customer’s own risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
9.3 Disclaimers  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
BUK655R0-75C  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 14 October 2010  
12 of 14  
 
 
 
 
 
 
 
BUK655R0-75C  
NXP Semiconductors  
N-channel TrenchMOS FET  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
9.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,  
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,  
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,  
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,  
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.  
Export control — This document as well as the item(s) described herein may  
be subject to export control regulations. Export might require a prior  
authorization from national authorities.  
HD Radio and HD Radio logo — are trademarks of iBiquity Digital  
Corporation.  
10. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
BUK655R0-75C  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 02 — 14 October 2010  
13 of 14  
 
 
BUK655R0-75C  
NXP Semiconductors  
N-channel TrenchMOS FET  
11. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
1.1  
1.2  
1.3  
1.4  
General description . . . . . . . . . . . . . . . . . . . . . .1  
Features and benefits. . . . . . . . . . . . . . . . . . . . .1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
Quick reference data . . . . . . . . . . . . . . . . . . . . .1  
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2  
Ordering information. . . . . . . . . . . . . . . . . . . . . .2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3  
Thermal characteristics . . . . . . . . . . . . . . . . . . .5  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .11  
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .12  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .12  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
9.1  
9.2  
9.3  
9.4  
10  
Contact information. . . . . . . . . . . . . . . . . . . . . .13  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2010.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 14 October 2010  
Document identifier: BUK655R0-75C  

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