BUK755R4-100E,127 [NXP]

N-channel TrenchMOS standard level FET TO-220 3-Pin;
BUK755R4-100E,127
型号: BUK755R4-100E,127
厂家: NXP    NXP
描述:

N-channel TrenchMOS standard level FET TO-220 3-Pin

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BUK755R4-100E  
N-channel TrenchMOS standard level FET  
11 September 2012  
Product data sheet  
1. Product profile  
1.1 General description  
Standard level N-channel MOSFET in a SOT78 package using TrenchMOS technology.  
This product has been designed and qualified to AEC Q101 standard for use in high  
performance automotive applications.  
1.2 Features and benefits  
AEC Q101 compliant  
Repetitive avalanche rated  
Suitable for thermally demanding environments due to 175 °C rating  
True standard level gate with VGS(th) rating of greater than 1V at 175 °C  
1.3 Applications  
12V, 24V and 48V Automotive systems  
Electric and electro-hydraulic power steering  
Motors, lamps and solenoid control  
Start-Stop micro-hybrid applications  
Transmission control  
Ultra high performance power switching  
1.4 Quick reference data  
Table 1.  
Symbol  
Quick reference data  
Parameter  
Conditions  
Min  
Typ  
Max  
100  
120  
349  
Unit  
V
VDS  
ID  
drain-source voltage  
drain current  
Tj ≥ 25 °C; Tj ≤ 175 °C  
VGS = 10 V; Tmb = 25 °C; Fig. 1  
-
-
-
-
-
-
[1]  
A
Ptot  
total power dissipation Tmb = 25 °C; Fig. 2  
W
Static characteristics  
RDSon drain-source on-state  
resistance  
Dynamic characteristics  
QGD gate-drain charge  
VGS = 10 V; ID = 25 A; Tj = 25 °C;  
Fig. 11  
-
-
4.1  
65  
5.2  
-
mΩ  
nC  
VGS = 10 V; ID = 25 A; VDS = 80 V;  
Tj = 25 °C; Fig. 13; Fig. 14  
[1] Continuous current is limited by package.  
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NXP Semiconductors  
BUK755R4-100E  
N-channel TrenchMOS standard level FET  
2. Pinning information  
Table 2.  
Pin  
Pinning information  
Symbol Description  
Simplified outline  
Graphic symbol  
mb  
D
1
G
D
S
D
gate  
2
drain  
source  
G
3
mbb076  
S
mb  
mounting base; connected to  
drain  
1
2 3  
TO-220AB (SOT78A)  
3. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
BUK755R4-100E  
TO-220AB  
plastic single-ended package; heatsink mounted; 1 mounting  
hole; 3-lead TO-220AB  
SOT78A  
4. Marking  
Table 4.  
Marking codes  
Type number  
Marking code  
BUK755R4-100E  
BUK755R4-100E  
5. Limiting values  
Table 5.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Max  
100  
100  
20  
Unit  
drain-source voltage  
drain-gate voltage  
gate-source voltage  
drain current  
Tj ≥ 25 °C; Tj ≤ 175 °C  
RGS = 20 kΩ  
-
V
V
V
A
A
A
VDGR  
VGS  
-
Tj = 175 °C; DC  
-20  
ID  
Tmb = 25 °C; VGS = 10 V; Fig. 1  
Tmb = 100 °C; VGS = 10 V; Fig. 1  
Tmb = 25 °C; pulsed; tp ≤ 10 µs; Fig. 4  
[1]  
-
-
-
120  
112  
631  
IDM  
peak drain current  
BUK755R4-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved  
Product data sheet  
11 September 2012  
2 / 13  
 
 
 
 
NXP Semiconductors  
BUK755R4-100E  
N-channel TrenchMOS standard level FET  
Symbol  
Ptot  
Parameter  
Conditions  
Min  
-
Max  
349  
175  
175  
Unit  
W
total power dissipation  
storage temperature  
junction temperature  
Tmb = 25 °C; Fig. 2  
Tstg  
-55  
-55  
°C  
Tj  
°C  
Source-drain diode  
IS  
source current  
peak source current  
Tmb = 25 °C  
[1]  
-
-
120  
631  
A
A
ISM  
pulsed; tp ≤ 10 µs; Tmb = 25 °C  
Avalanche ruggedness  
EDS(AL)S non-repetitive drain-source  
avalanche energy  
ID = 120 A; Vsup ≤ 100 V; RGS = 50 Ω;  
VGS = 10 V; Tj(init) = 25 °C; unclamped;  
Fig. 3  
[2][3]  
-
387  
mJ  
[1] Continuous current is limited by package.  
[2] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.  
[3] Refer to application note AN10273 for further information.  
003aai260  
03aa16  
120  
180  
I
P
D
der  
(A)  
(%)  
80  
120  
(1)  
60  
40  
0
0
0
50  
100  
150  
200  
( C)  
0
50  
100  
150  
200  
T
°
mb  
T
(°C)  
mb  
(1) Capped at 120A due to package  
Fig. 2. Normalized total power dissipation as a  
function of mounting base temperature  
Fig. 1. Continuous drain current as a function of  
mounting base temperature  
BUK755R4-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved  
Product data sheet  
11 September 2012  
3 / 13  
 
 
 
NXP Semiconductors  
BUK755R4-100E  
N-channel TrenchMOS standard level FET  
003aah029  
103  
IAL  
(A)  
102  
(1)  
10  
1
(2)  
(3)  
10-1  
10-3  
10-2  
10-1  
1
10  
tAL (ms)  
Fig. 3. Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time  
003aaf633  
3
2
10  
10  
I
D
Limit R  
= V / I  
DS D  
DSon  
(A)  
t
= 10 us  
p
100 us  
10  
DC  
1 ms  
10 ms  
100 ms  
1
-1  
10  
2
3
1
10  
10  
10  
V
(V)  
DS  
Fig. 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage  
6. Thermal characteristics  
Table 6.  
Symbol  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Rth(j-mb)  
thermal resistance  
from junction to  
mounting base  
Fig. 5  
-
-
0.43  
K/W  
Rth(j-a)  
thermal resistance  
from junction to  
ambient  
vertical in free air  
-
60  
-
K/W  
BUK755R4-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved  
Product data sheet  
11 September 2012  
4 / 13  
 
 
 
NXP Semiconductors  
BUK755R4-100E  
N-channel TrenchMOS standard level FET  
003aaf570  
1
Zth(j-mb)  
= 0.5  
(K/W)  
0.2  
10-1  
0.1  
0.05  
tp  
P
10-2  
T
0.02  
t
tp  
single shot  
10-3  
T
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
1
tp (s)  
Fig. 5. Transient thermal impedance from junction to mounting base as a function of pulse duration.  
7. Characteristics  
Table 7.  
Symbol  
Characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
V(BR)DSS drain-source  
breakdown voltage  
ID = 250 µA; VGS = 0 V; Tj = 25 °C  
ID = 250 µA; VGS = 0 V; Tj = -55 °C  
100  
90  
-
-
V
V
V
-
-
VGS(th)  
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C;  
2.4  
3
4
voltage  
Fig. 9; Fig. 10  
ID = 1 mA; VDS = VGS; Tj = 175 °C;  
Fig. 9  
1
-
-
-
-
V
V
ID = 1 mA; VDS = VGS; Tj = -55 °C;  
Fig. 9  
4.5  
IDSS  
drain leakage current  
gate leakage current  
VDS = 100 V; VGS = 0 V; Tj = 25 °C  
VDS = 100 V; VGS = 0 V; Tj = 175 °C  
VGS = 20 V; VDS = 0 V; Tj = 25 °C  
VGS = -20 V; VDS = 0 V; Tj = 25 °C  
-
-
-
-
-
0.15  
-
2
µA  
µA  
nA  
nA  
mΩ  
500  
100  
100  
5.2  
IGSS  
2
2
RDSon  
drain-source on-state  
resistance  
VGS = 10 V; ID = 25 A; Tj = 25 °C;  
Fig. 11  
4.1  
VGS = 10 V; ID = 25 A; Tj = 175 °C;  
Fig. 11; Fig. 12  
-
-
14  
mΩ  
Dynamic characteristics  
QG(tot) total gate charge  
QGS  
ID = 25 A; VDS = 80 V; VGS = 10 V;  
Tj = 25 °C; Fig. 13; Fig. 14  
-
-
-
180  
34  
-
-
-
nC  
nC  
nC  
gate-source charge  
gate-drain charge  
QGD  
65  
BUK755R4-100E  
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© NXP B.V. 2012. All rights reserved  
Product data sheet  
11 September 2012  
5 / 13  
 
 
NXP Semiconductors  
BUK755R4-100E  
N-channel TrenchMOS standard level FET  
Symbol  
Ciss  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
input capacitance  
output capacitance  
VGS = 0 V; VDS = 25 V; f = 1 MHz;  
Tj = 25 °C; Fig. 15  
-
-
-
8860 11810 pF  
Coss  
770  
546  
925  
750  
pF  
pF  
Crss  
reverse transfer  
capacitance  
td(on)  
tr  
td(off)  
tf  
turn-on delay time  
rise time  
VDS = 80 V; RL = 3.2 Ω; VGS = 10 V;  
RG(ext) = 5 Ω  
-
-
-
-
-
37  
-
-
-
-
-
ns  
ns  
ns  
ns  
nH  
62  
turn-off delay time  
fall time  
158  
80  
LD  
internal drain  
inductance  
from upper edge of drain mounting  
base to centre of die  
2.5  
from drain lead 6mm from package to  
centre of die  
-
-
4.5  
7.5  
-
-
nH  
nH  
LS  
internal source  
inductance  
from source lead to source bond pad  
Source-drain diode  
VSD source-drain voltage  
trr  
IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 16  
-
-
-
0.77  
65  
1.2  
V
reverse recovery time IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;  
-
-
ns  
nC  
VDS = 25 V  
Qr  
recovered charge  
191  
003aai249  
003aai250  
360  
10  
7
6
V
(V) = 10  
GS  
R
DSon  
I
(m  
)
D
Ω
(A)  
7.5  
5.5  
240  
5
5
120  
2.5  
0
4.5  
0
0
1
2
3
0
5
10  
15  
20  
V
(V)  
V
(V)  
GS  
DS  
Tj = 25 °C; tp = 300 μs  
Fig. 7. Drain-source on-state resistance as a function  
of gate-source voltage; typical values  
Fig. 6. Output characteristics; drain current as a  
function of drain-source voltage; typical values  
BUK755R4-100E  
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© NXP B.V. 2012. All rights reserved  
Product data sheet  
11 September 2012  
6 / 13  
NXP Semiconductors  
BUK755R4-100E  
N-channel TrenchMOS standard level FET  
003aaf635  
003aah027  
400  
5
V
GS(th)  
(V)  
ID  
(A)  
max  
4
3
2
1
0
300  
200  
100  
typ  
min  
°
Tj = 175  
C
°
Tj = 25  
C
0
-60  
0
60  
120  
180  
0
2
4
6
8
T ( C)  
VGS (V)  
°
j
Fig. 9. Gate-source threshold voltage as a function of  
junction temperature  
Fig. 8. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values  
003aah028  
003aai255  
-1  
10  
15  
I
D
R
(A)  
5
5.5  
4.5  
DSon  
(m  
)
-2  
Ω
10  
10  
typ  
max  
min  
-3  
-4  
-5  
-6  
10  
10  
10  
10  
6
7
5
V
(V) = 10  
GS  
0
0
2
4
6
0
120  
240  
360  
I
(A)  
V
(V)  
D
GS  
Tj = 25 °C; tp = 300 μs  
Fig. 10. Sub-threshold drain current as a function of  
gate-source voltage  
Fig. 11. Drain-source on-state resistance as a function  
of drain current; typical values  
BUK755R4-100E  
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© NXP B.V. 2012. All rights reserved  
Product data sheet  
11 September 2012  
7 / 13  
 
 
 
NXP Semiconductors  
BUK755R4-100E  
N-channel TrenchMOS standard level FET  
003aag818  
003aaf641  
3
a
10  
VGS  
(V)  
2.4  
1.8  
1.2  
0.6  
0
8
6
4
2
0
14 V  
VDS = 80 V  
0
50  
100  
150  
200  
-60  
0
60  
120  
180  
°
QG (nC)  
Tj ( C)  
Tj = 25 °C; ID = 25 A  
Fig. 12. Normalized drain-source on-state resistance  
factor as a function of junction temperature  
Fig. 13. Gate-source voltage as a function of gate  
charge; typical values  
003aaf637  
105  
V
DS  
C
(pF)  
I
D
104  
V
Ciss  
GS(pl)  
V
GS(th)  
GS  
V
103  
Q
GS1  
Q
GS2  
Coss  
Q
GS  
Q
GD  
Q
G(tot)  
Crss  
003aaa508  
102  
10-1  
102  
103  
Fig. 14. Gate charge waveform definitions  
1
10  
VDS (V)  
VGS = 0 V; f = 1 MHz  
Fig. 15. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values  
BUK755R4-100E  
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© NXP B.V. 2012. All rights reserved  
Product data sheet  
11 September 2012  
8 / 13  
 
 
 
 
NXP Semiconductors  
BUK755R4-100E  
N-channel TrenchMOS standard level FET  
003aaf642  
200  
IS  
(A)  
150  
100  
50  
0
Tj = 175 °C  
Tj = 25 °C  
0
0.3  
0.6  
0.9  
1.2  
VSD (V)  
VGS = 0 V  
Fig. 16. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values  
BUK755R4-100E  
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© NXP B.V. 2012. All rights reserved  
Product data sheet  
11 September 2012  
9 / 13  
 
NXP Semiconductors  
BUK755R4-100E  
N-channel TrenchMOS standard level FET  
8. Package outline  
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB  
SOT78A  
E
p
A
A
1
q
mounting  
base  
D
1
D
(1)  
1
L
L
2
Q
b
1
L
1
2
3
b
c
e
e
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
b
L
max.  
(1)  
2
e
A
b
1
D
E
D
L
c
L
1
A
1
UNIT  
p
q
Q
1
4.5  
4.1  
1.39  
1.27  
0.9  
0.6  
1.3  
1.0  
0.7  
0.4  
15.8  
15.2  
6.4  
5.9  
10.3  
9.7  
15.0  
13.5  
3.30  
2.79  
3.8  
3.6  
3.0  
2.7  
2.6  
2.2  
mm  
3.0  
2.54  
Note  
1. Terminals in this zone are not tinned.  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
IEC  
ISSUE DATE  
03-01-22  
05-03-14  
SOT78A  
3-lead TO-220AB  
SC-46  
Fig. 17. Package outline TO-220AB (SOT78A)  
BUK755R4-100E  
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© NXP B.V. 2012. All rights reserved  
Product data sheet  
11 September 2012  
10 / 13  
 
NXP Semiconductors  
BUK755R4-100E  
N-channel TrenchMOS standard level FET  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation -  
lost profits, lost savings, business interruption, costs related to the removal  
or replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
9. Legal information  
9.1 Data sheet status  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Document  
Product  
Definition  
status [1][2] status [3]  
Objective  
[short] data  
sheet  
Development This document contains data from  
the objective specification for product  
development.  
Right to make changes — NXP Semiconductors reserves the right to  
make changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Preliminary  
[short] data  
sheet  
Qualification This document contains data from the  
preliminary specification.  
Suitability for use in automotive applications — This NXP  
Semiconductors product has been qualified for use in automotive  
applications. Unless otherwise agreed in writing, the product is not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors and its suppliers accept no liability for  
inclusion and/or use of NXP Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at the customer's own  
risk.  
Product  
[short] data  
sheet  
Production  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the Internet at URL http://www.nxp.com.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
9.2 Definitions  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Preview — The document is a preview version only. The document is still  
subject to formal approval, which may result in modifications or additions.  
NXP Semiconductors does not give any representations or warranties as to  
the accuracy or completeness of information included herein and shall have  
no liability for the consequences of use of such information.  
Customers are responsible for the design and operation of their  
applications and products using NXP Semiconductors products, and NXP  
Semiconductors accepts no liability for any assistance with applications or  
customer product design. It is customer’s sole responsibility to determine  
whether the NXP Semiconductors product is suitable and fit for the  
customer’s applications and products planned, as well as for the planned  
application and use of customer’s third party customer(s). Customers should  
provide appropriate design and operating safeguards to minimize the risks  
associated with their applications and products.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences  
of use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the  
relevant full data sheet, which is available on request via the local NXP  
Semiconductors sales office. In case of any inconsistency or conflict with the  
short data sheet, the full data sheet shall prevail.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default  
in the customer’s applications or products, or the application or use by  
customer’s third party customer(s). Customer is responsible for doing all  
necessary testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications  
and the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product  
is deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
9.3 Disclaimers  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Limited warranty and liability — Information in this document is believed  
to be accurate and reliable. However, NXP Semiconductors does not give  
any representations or warranties, expressed or implied, as to the accuracy  
or completeness of such information and shall have no liability for the  
consequences of use of such information. NXP Semiconductors takes no  
responsibility for the content in this document if provided by an information  
source outside of NXP Semiconductors.  
BUK755R4-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved  
Product data sheet  
11 September 2012  
11 / 13  
 
 
 
 
 
NXP Semiconductors  
BUK755R4-100E  
N-channel TrenchMOS standard level FET  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
9.4 Trademarks  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,  
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,  
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,  
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,  
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.  
HD Radio and HD Radio logo — are trademarks of iBiquity Digital  
Corporation.  
BUK755R4-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved  
Product data sheet  
11 September 2012  
12 / 13  
 
NXP Semiconductors  
BUK755R4-100E  
N-channel TrenchMOS standard level FET  
10. Contents  
1
Product profile ....................................................... 1  
General description .............................................. 1  
Features and benefits ...........................................1  
Applications ..........................................................1  
Quick reference data ............................................ 1  
1.1  
1.2  
1.3  
1.4  
2
3
4
5
6
7
8
Pinning information ...............................................2  
Ordering information .............................................2  
Marking ...................................................................2  
Limiting values .......................................................2  
Thermal characteristics .........................................4  
Characteristics .......................................................5  
Package outline ................................................... 10  
9
Legal information .................................................11  
Data sheet status ............................................... 11  
Definitions ...........................................................11  
Disclaimers .........................................................11  
Trademarks ........................................................ 12  
9.1  
9.2  
9.3  
9.4  
© NXP B.V. 2012. All rights reserved  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 11 September 2012  
BUK755R4-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved  
Product data sheet  
11 September 2012  
13 / 13  

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