BUK7775-55A [NXP]

N-channel TrenchMOS standard level FET; N沟道的TrenchMOS标准水平FET
BUK7775-55A
型号: BUK7775-55A
厂家: NXP    NXP
描述:

N-channel TrenchMOS standard level FET
N沟道的TrenchMOS标准水平FET

晶体 晶体管 功率场效应晶体管 开关 脉冲 局域网
文件: 总12页 (文件大小:128K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
BUK7775-55A  
N-channel TrenchMOS™ standard level FET  
Rev. 02 — 7 June 2004  
Product data  
M3D308  
1. Description  
N-channel enhancement mode field-effect power transistor in a plastic package using  
TrenchMOS™1 technology, featuring very low on-state resistance.  
Product availability:  
BUK7775-55A in SOT186A (TO-220F).  
2. Features  
TrenchMOS™ technology  
Q101 compliant  
150 °C rated  
Standard level compatible.  
3. Applications  
Automotive and general purpose power switching:  
12 V and 24 V loads  
Motors, lamps and solenoids.  
4. Pinning information  
Table 1: Pinning - SOT186A, simplified outline and symbol  
Pin  
1
Description  
gate (g)  
Simplified outline  
Symbol  
mb  
2
drain (d)  
d
s
3
source (s)  
mb  
mounting base;  
isolated  
g
mbb076  
1
2 3  
MBK110  
SOT186A (TO-220F)  
1. TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.  
BUK7775-55A  
N-channel TrenchMOS™ standard level FET  
Philips Semiconductors  
5. Quick reference data  
Table 2: Quick reference data  
Symbol Parameter  
Conditions  
Typ  
Max  
55  
Unit  
V
VDS  
ID  
drain-source voltage (DC)  
drain current (DC)  
-
-
-
-
Tmb = 25 °C; VGS = 10 V  
Tmb = 25 °C  
11  
A
Ptot  
Tj  
total power dissipation  
junction temperature  
18  
W
150  
°C  
RDSon  
drain-source on-state resistance  
VGS = 10 V; ID = 10 A  
Tj = 25 °C  
63  
-
75  
mΩ  
mΩ  
Tj = 150 °C  
138  
6. Limiting values  
Table 3: Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol Parameter  
Conditions  
Min  
Max  
55  
Unit  
V
VDS  
VDGR  
VGS  
ID  
drain-source voltage (DC)  
-
-
-
-
drain-gate voltage (DC)  
gate-source voltage (DC)  
drain current (DC)  
RGS = 20 kΩ  
55  
V
±20  
11  
V
Tmb = 25 °C; VGS = 10 V;  
A
Figure 2 and 3  
T
mb = 100 °C; VGS = 10 V;  
-
8
A
A
Figure 2  
IDM  
peak drain current  
Tmb = 25 °C; pulsed; tp 10 µs;  
[1] -  
46  
Figure 3  
Ptot  
Tstg  
Tj  
total power dissipation  
storage temperature  
Tmb = 25 °C; Figure 1  
-
18  
W
55  
55  
+150  
+150  
°C  
°C  
operating junction temperature  
Source-drain diode  
IDR  
reverse drain current (DC)  
peak reverse drain current  
Tmb = 25 °C  
-
-
11  
46  
A
A
IDRM  
Tmb = 25 °C; pulsed; tp 10 µs  
Avalanche ruggedness  
EDS(AL)S non-repetitive drain-source  
avalanche energy  
unclamped inductive load; ID = 11 A;  
-
50  
mJ  
VDS 55 V; VGS = 10 V; RGS = 50 ;  
starting T j = 25 °C  
[1] IDM is limited by chip, not package.  
9397 750 13325  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 7 June 2004  
2 of 12  
BUK7775-55A  
N-channel TrenchMOS™ standard level FET  
Philips Semiconductors  
03ne37  
03ne36  
120  
120  
P
I
der  
(%)  
100  
der  
(%)  
100  
80  
60  
40  
20  
0
80  
60  
40  
20  
0
0
25  
50  
75  
100 125 150 175  
o
0
25  
50  
75  
100 125 150 175  
o
T
( C)  
mb  
T
( C)  
mb  
V
GS 10 V  
Ptot  
Pder  
=
× 100%  
----------------------  
P
ID  
°
tot(25 C)  
Ider  
=
× 100%  
------------------  
I
°
D(25 C)  
Fig 1. Normalized total power dissipation as a  
function of mounting base temperature.  
Fig 2. Normalized continuous drain current as a  
function of mounting base temperature.  
2
03ne03  
10  
I
D
(A)  
limit R  
DSon  
= V / I  
DS  
D
t
= 10 µs  
p
10  
100 µs  
1 ms  
DC  
1
10 ms  
100 ms  
-1  
10  
2
10  
10  
1
V
(V)  
DS  
Tmb = 25 °C; IDM is single pulse.  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.  
9397 750 13325  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 7 June 2004  
3 of 12  
BUK7775-55A  
N-channel TrenchMOS™ standard level FET  
Philips Semiconductors  
7. Thermal characteristics  
Table 4: Thermal characteristics  
Symbol Parameter  
Conditions  
Min Typ Max Unit  
Rth(j-mb) thermal resistance from junction to  
mounting base  
Figure 4  
-
-
6.8 K/W  
Rth(j-a)  
thermal resistance from junction to ambient vertical in still air  
-
55  
-
K/W  
7.1 Transient thermal impedance  
10  
Z
th(j-mb)  
δ = 0.5  
(K/W)  
1
t
p
P
δ =  
-1  
10  
T
t
t
p
T
-2  
10  
-6  
10  
-5  
10  
-4  
10  
-3  
10  
-2  
10  
-1  
10  
1
t
(s)  
p
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.  
9397 750 13325  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 7 June 2004  
4 of 12  
BUK7775-55A  
N-channel TrenchMOS™ standard level FET  
Philips Semiconductors  
8. Characteristics  
Table 5: Characteristics  
Tj = 25 °C unless otherwise specified  
Symbol  
Static characteristics  
V(BR)DSS drain-source breakdown  
voltage  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
ID = 0.25 mA; VGS = 0 V  
Tj = 25 °C  
55  
50  
-
-
-
-
V
V
Tj = 55 °C  
VGS(th)  
gate-source threshold voltage ID = 1 mA; VDS = VGS  
Figure 9  
Tj = 25 °C  
;
2
3
-
4
V
V
V
Tj = 150 °C  
Tj = 55 °C  
1.2  
-
-
-
4.4  
IDSS  
drain-source leakage current VDS = 55 V; VGS = 0 V  
Tj = 25 °C  
Tj = 150 °C  
-
-
-
0.05  
10  
µA  
µA  
nA  
-
500  
100  
IGSS  
gate-source leakage current VGS = ±20 V; VDS = 0 V  
2
RDSon  
drain-source on-state  
resistance  
VGS = 10 V; ID = 10 A;  
Figure 7 and 8  
Tj = 25 °C  
-
-
63  
-
75  
mΩ  
mΩ  
Tj = 150 °C  
138  
Dynamic characteristics  
Qg(tot)  
Qgs  
Qgd  
Ciss  
Coss  
Crss  
td(on)  
tr  
total gate charge  
VGS = 10 V; VDD = 44 V;  
ID = 10 A; Figure 14  
-
-
-
-
-
-
-
-
-
-
-
9.8  
2
-
nC  
nC  
nC  
pF  
pF  
pF  
ns  
gate-to-source charge  
gate-to-drain (Miller) charge  
input capacitance  
output capacitance  
reverse transfer capacitance  
turn-on delay time  
rise time  
-
4.7  
320  
90  
60  
10  
50  
70  
40  
4.5  
-
VGS = 0 V; VDS = 25 V;  
f = 1 MHz; Figure 12  
483  
113  
90  
-
VDD = 30 V; RL = 1.2 ;  
VGS = 5 V; RG = 10 Ω  
-
ns  
td(off)  
tf  
turn-off delay time  
fall time  
-
ns  
-
ns  
Ld  
internal drain inductance  
from drain lead 6 mm from  
package to centre of die  
-
nH  
Ls  
internal source inductance  
from source lead 6 mm from  
package to source bond pad  
-
-
7.5  
-
nH  
V
Source-drain diode  
VSD  
source-drain (diode forward) IS = 15 A; VGS = 0 V;  
0.85  
1.2  
voltage  
Figure 15  
trr  
reverse recovery time  
recovered charge  
IS = 20 A; dIS/dt = 100 A/µs  
VGS = 10 V; VDS = 30 V  
-
-
32  
-
-
ns  
Qr  
120  
nC  
9397 750 13325  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 7 June 2004  
5 of 12  
BUK7775-55A  
N-channel TrenchMOS™ standard level FET  
Philips Semiconductors  
60  
160  
DSon  
(m)  
I
V
(V) =16 14  
R
D
GS  
(A)  
20  
50  
40  
30  
20  
10  
0
140  
120  
100  
80  
12  
10.5  
9.5  
8.5  
7.5  
6.5  
60  
5.5  
4.5  
40  
0
2
4
6
8
10  
(V)  
5
10  
15  
20  
V
V
(V)  
GS  
DS  
Tj = 25 °C  
Tj = 25 °C; ID = 10 A  
Fig 5. Output characteristics: drain current as a  
function of drain-source voltage; typical values.  
Fig 6. Drain-source on-state resistance as a function  
of gate-source voltage; typical values.  
03nc24  
2.2  
03nc10  
180  
DSon  
(m)  
a
R
2
7
5.5  
V
(V) =  
10  
GS  
6
8
6.5  
1.8  
1.6  
1.4  
1.2  
1
160  
140  
120  
100  
80  
0.8  
0.6  
0.4  
0.2  
0
60  
40  
-60  
-20  
20  
60  
100  
140  
180  
0
10  
20  
30  
40  
50  
o
T ( C)  
I
(A)  
D
j
Tj = 25 °C  
RDSon  
a =  
---------------------------  
RDSon(25 C)  
°
Fig 7. Drain-source on-state resistance as a function  
of drain current; typical values.  
Fig 8. Normalized drain source on-state resistance  
factor as a function of junction temperature.  
9397 750 13325  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 7 June 2004  
6 of 12  
BUK7775-55A  
N-channel TrenchMOS™ standard level FET  
Philips Semiconductors  
03aa32  
03aa35  
5
VGS(th)  
(V)  
10-1  
ID  
(A)  
10-2  
4
max  
min  
typ  
max  
3
10-3  
10-4  
10-5  
10-6  
typ  
min  
2
1
0
-60  
0
60  
120  
180  
0
2
4
6
V
GS (V)  
T ( C)  
°
j
ID = 1 mA; VDS = VGS  
Tj = 25 °C; VDS = VGS  
Fig 9. Gate-source threshold voltage as a function of  
junction temperature.  
Fig 10. Sub-threshold drain current as a function of  
gate-source voltage.  
03nc11  
8
600  
C (pF)  
500  
g
(S)  
fs  
6
400  
Ciss  
300  
200  
100  
0
4
2
0
Coss  
Crss  
-2  
-1  
10  
2
10  
1
10  
10  
(V)  
0
5
10  
15  
20  
25  
V
I
(A)  
DS  
D
Tj = 25 °C; VDS = 25 V  
VGS = 0 V; f = 1 MHz  
Fig 11. Forward transconductance as a function of  
drain current; typical values.  
Fig 12. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values.  
9397 750 13325  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 7 June 2004  
7 of 12  
BUK7775-55A  
N-channel TrenchMOS™ standard level FET  
Philips Semiconductors  
25  
10  
GS  
(V)  
I
V
D
(A)  
9
8
7
6
5
4
3
2
1
0
V
= 44 V  
DD  
20  
V
= 14 V  
DD  
15  
10  
5
T = 150 OC  
j
T = 25O  
C
j
0
0
2
4
6
8
10  
(V)  
0
5
10  
15  
V
Q
(nC)  
G
GS  
VDS = 25 V  
Tj = 25 °C; ID = 10 A  
Fig 13. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values.  
Fig 14. Gate-source voltage as a function of gate  
charge; typical values.  
120  
I
S
(A)  
100  
80  
60  
OC  
T = 150  
j
40  
20  
0
T = 25 O  
j
C
0.0  
0.5  
1.0  
1.5  
V
2.0  
(V)  
SD  
VGS = 0 V  
Fig 15. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values.  
9397 750 13325  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 7 June 2004  
8 of 12  
BUK7775-55A  
N-channel TrenchMOS™ standard level FET  
Philips Semiconductors  
9. Package outline  
Plastic single-ended package; isolated heatsink mounted;  
1 mounting hole; 3 lead TO-220 'full pack'  
SOT186A  
E
P
A
A
1
q
D
1
mounting  
base  
T
D
j
L
L
2
1
K
Q
b
b
1
L
2
1
2
3
b
c
w
M
e
e
1
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
(2)  
L
A
A
b
c
D
D
1
E
e
e
1
j
K
L
L
P
Q
q
T
w
b
b
UNIT  
mm  
2
1
1
1
2
max.  
1.1  
0.9  
1.4  
1.0  
2.7  
1.7  
0.6 14.4 3.30  
0.4 13.5 2.79  
2.6  
2.3  
4.6 2.9  
4.0 2.5  
0.9  
0.7  
3.0  
2.6  
0.7 15.8 6.5 10.3  
0.4 15.2 6.3 9.7  
3.2  
3.0  
3
5.08  
2.54  
2.5  
0.4  
Notes  
1. Terminal dimensions within this zone are uncontrolled. Terminals in this zone are not tinned.  
2. Both recesses are 2.5 × 0.8 max. depth  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
02-03-12  
02-04-09  
SOT186A  
3-lead TO-220F  
Fig 16. SOT186A.  
9397 750 13325  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 7 June 2004  
9 of 12  
BUK7775-55A  
N-channel TrenchMOS™ standard level FET  
Philips Semiconductors  
10. Revision history  
Table 6: Revision history  
Rev Date  
CPCN  
-
Description  
02 20040607  
Product data (9397 750 13325)  
Modifications:  
Latest version of package outline imported into data sheet.  
01 20010215  
-
Product specification (9397 750 07996)  
9397 750 13325  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 7 June 2004  
10 of 12  
BUK7775-55A  
N-channel TrenchMOS™ standard level FET  
Philips Semiconductors  
11. Data sheet status  
[1]  
[2][3]  
Level Data sheet status  
Product status  
Definition  
I
Objective data  
Development  
This data sheet contains data from the objective specification for product development. Philips  
Semiconductors reserves the right to change the specification in any manner without notice.  
II  
Preliminary data  
Qualification  
Production  
This data sheet contains data from the preliminary specification. Supplementary data will be published  
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in  
order to improve the design and supply the best possible product.  
III  
Product data  
This data sheet contains data from the product specification. Philips Semiconductors reserves the  
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant  
changes will be communicated via a Customer Product/Process Change Notification (CPCN).  
[1]  
[2]  
Please consult the most recently issued data sheet before initiating or completing a design.  
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at  
URL http://www.semiconductors.philips.com.  
[3]  
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
12. Definitions  
13. Disclaimers  
Short-form specification The data in  
extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
a
short-form specification is  
Life support — These products are not designed for use in life support  
appliances, devices, or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors  
customers using or selling these products for use in such applications do so  
at their own risk and agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in accordance with  
the Absolute Maximum Rating System (IEC 60134). Stress above one or  
more of the limiting values may cause permanent damage to the device.  
These are stress ratings only and operation of the device at these or at any  
other conditions above those given in the Characteristics sections of the  
specification is not implied. Exposure to limiting values for extended periods  
may affect device reliability.  
Right to make changes — Philips Semiconductors reserves the right to  
make changes in the products - including circuits, standard cells, and/or  
software - described or contained herein in order to improve design and/or  
performance. When the product is in full production (status ‘Production’),  
relevant changes will be communicated via a Customer Product/Process  
Change Notification (CPCN). Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no  
licence or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are  
free from patent, copyright, or mask work right infringement, unless otherwise  
specified.  
Application information Applications that are described herein for any  
of these products are for illustrative purposes only. Philips Semiconductors  
make no representation or warranty that such applications will be suitable for  
the specified use without further testing or modification.  
Contact information  
For additional information, please visit http://www.semiconductors.philips.com.  
For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
11 of 12  
9397 750 13325  
Product data  
Rev. 02 — 7 June 2004  
BUK7775-55A  
N-channel TrenchMOS™ standard level FET  
Philips Semiconductors  
Contents  
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4  
Transient thermal impedance . . . . . . . . . . . . . . 4  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11  
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
2
3
4
5
6
7
7.1  
8
9
10  
11  
12  
13  
© Koninklijke Philips Electronics N.V. 2004.  
Printed in The Netherlands  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior  
written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or  
contract, is believed to be accurate and reliable and may be changed without notice. No  
liability will be accepted by the publisher for any consequence of its use. Publication  
thereof does not convey nor imply any license under patent- or other industrial or  
intellectual property rights.  
Date of release: 7 June 2004  
Document order number: 9397 750 13325  

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VISHAY

SI9130CG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

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SI9130LG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

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VISHAY

SI9130_11

Pin-Programmable Dual Controller - Portable PCs

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VISHAY

SI9137

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9137DB

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9137LG

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9122E

500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

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