BUK7E2R3-40C [NXP]

N-channel TrenchMOS standard level FET; N沟道的TrenchMOS标准水平FET
BUK7E2R3-40C
型号: BUK7E2R3-40C
厂家: NXP    NXP
描述:

N-channel TrenchMOS standard level FET
N沟道的TrenchMOS标准水平FET

晶体 晶体管 开关 脉冲
文件: 总14页 (文件大小:222K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
BUK7E2R3-40C  
N-channel TrenchMOS standard level FET  
Rev. 03 — 26 January 2009  
Product data sheet  
1. Product profile  
1.1 General description  
Standard level gate drive N-channel enhancement mode Field-Effect Transistor (FET) in a  
plastic package using advanced TrenchMOS technology. This product has been designed  
and qualified to the appropriate AEC standard for use in high performance automotive  
applications.  
1.2 Features and benefits  
„ AEC Q101 compliant  
„ Avalanche robust  
„ Suitable for standard level gate drive  
„ Suitable for thermally demanding  
environment up to 175°C rating  
1.3 Applications  
„ 12V Motor, lamp and solenoid loads  
„ High performance Pulse Width  
Modulation (PWM) applications  
„ High performance automotive power  
systems  
1.4 Quick reference data  
Table 1.  
Quick reference  
Symbol Parameter  
Conditions  
drain-source voltage Tj 25 °C; Tj 175 °C  
Min  
Typ  
Max Unit  
VDS  
ID  
-
-
-
-
40  
V
A
drain current  
VGS = 10 V; Tmb = 25 °C;  
[1]  
100  
see Figure 1; see Figure 3; [2]  
Ptot  
total power  
dissipation  
Tmb = 25 °C; see Figure 2  
-
-
-
333  
W
Static characteristics  
RDSon  
drain-source  
on-state resistance  
VGS = 10 V; ID = 25 A;  
Tj = 25 °C; see Figure 12;  
see Figure 13  
1.96 2.3  
mΩ  
Avalanche ruggedness  
EDS(AL)S non-repetitive  
drain-source  
ID = 100 A; Vsup 40 V;  
RGS = 50 ; VGS = 10 V;  
Tj(init) = 25 °C; unclamped  
-
-
1.2  
J
avalanche energy  
[1] Refer to document 9397 750 12572 for further information.  
[2] Continuous current is limited by package.  
BUK7E2R3-40C  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
2. Pinning information  
Table 2.  
Pinning information  
Pin  
1
Symbol Description  
Simplified outline  
Graphic symbol  
G
D
S
D
gate  
mb  
D
2
drain  
source  
3
G
mb  
mounting base; connected to  
drain  
mbb076  
S
1
2 3  
SOT226  
( T O - 2 2 0 A B ; I 2 PA K )  
3. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
BUK7E2R3-40C  
TO-220AB;  
I2PAK  
plastic single-ended package (I2PAK); low-profile 3-lead TO-220AB  
SOT226  
BUK7E2R3-40C_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 26 January 2009  
2 of 14  
BUK7E2R3-40C  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
4. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Max  
40  
Unit  
V
drain-source voltage  
drain-gate voltage  
gate-source voltage  
drain current  
Tj 25 °C; Tj 175 °C  
RGS = 20 kΩ  
-
VDGR  
VGS  
-
40  
V
-20  
-
20  
V
ID  
Tmb = 25 °C; VGS = 10 V; see Figure 1;  
see Figure 3;  
[1][2]  
[1][3]  
[1][2]  
100  
A
Tmb = 25 °C; VGS = 10 V; see Figure 1;  
see Figure 3;  
-
276  
A
Tmb = 100 °C; VGS = 10 V; see Figure 1;  
-
100  
1104  
333  
175  
175  
A
IDM  
Ptot  
Tstg  
Tj  
peak drain current  
Tmb = 25 °C; tp 10 µs; pulsed; see Figure 3  
-
A
total power dissipation Tmb = 25 °C; see Figure 2  
storage temperature  
-
W
°C  
°C  
-55  
-55  
junction temperature  
Source-drain diode  
IS  
source current  
Tmb = 25 °C;  
[1][3]  
[1][2]  
-
-
-
276  
100  
1104  
A
A
A
Tmb = 25 °C;  
ISM  
peak source current  
tp 10 µs; pulsed; Tmb = 25 °C  
Avalanche ruggedness  
EDS(AL)S non-repetitive  
ID = 100 A; Vsup 40 V; RGS = 50 ; VGS = 10 V;  
-
-
1.2  
-
J
J
drain-source avalanche Tj(init) = 25 °C; unclamped  
energy  
EDS(AL)R  
repetitive drain-source see Figure 4;  
avalanche energy  
[4][5]  
[6][7]  
[1] Refer to document 9397 750 12572 for further information.  
[2] Continuous current is limited by package.  
[3] Current is limited by power dissipation chip rating.  
[4] Maximum value not quoted. Repetitive rating defined in avalanche rating figure.  
[5] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.  
[6] Repetitive avalanche rating limited by an average junction temperature of 170 °C.  
[7] Refer to application note AN10273 for further information.  
BUK7E2R3-40C_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 26 January 2009  
3 of 14  
BUK7E2R3-40C  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
03aa16  
003aab004  
300  
120  
ID  
P
der  
(%)  
(A)  
200  
80  
100  
40  
(1)  
0
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
Tmb (°C)  
T
mb  
(°C)  
Fig 1. Continuous drain current as a function of  
mounting base temperature  
Fig 2. Normalized total power dissipation as a  
function of mounting base temperature  
003aab028  
4
10  
I
D
(A)  
limit R  
= V /I  
DS  
DSon  
D
3
10  
δ = 10 μs  
100 μs  
2
10  
(1)  
DC  
10  
1 ms  
10 ms  
100 ms  
1
1  
10  
10  
1  
2
1
10  
10  
V
DS  
(V)  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage  
BUK7E2R3-40C_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 26 January 2009  
4 of 14  
BUK7E2R3-40C  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
003aab013  
103  
IAL  
(A)  
102  
10  
1
(1)  
(2)  
(3)  
10-3  
10-2  
10-1  
1
10  
tAL (ms)  
Fig 4. Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time  
BUK7E2R3-40C_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 26 January 2009  
5 of 14  
BUK7E2R3-40C  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
5. Thermal characteristics  
Table 5.  
Symbol  
Rth(j-mb)  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
thermal resistance from see Figure 5  
junction to mounting  
base  
-
-
0.45  
K/W  
Rth(j-a)  
thermal resistance from vertical in free air  
junction to ambient  
-
50  
-
K/W  
003aab020  
1
Z
th(j-mb)  
δ = 0.5  
(K/W)  
0.2  
1  
10  
10  
10  
0.1  
0.05  
0.02  
t
p
2  
3  
P
δ =  
T
single shot  
t
t
p
T
6  
5  
4  
3  
2  
1  
10  
10  
10  
10  
10  
10  
1
t
p
(s)  
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration  
BUK7E2R3-40C_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 26 January 2009  
6 of 14  
BUK7E2R3-40C  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
6. Characteristics  
Table 6.  
Symbol  
Characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
V(BR)DSS  
drain-source  
breakdown voltage  
ID = 250 µA; VGS = 0 V; Tj = -55 °C  
ID = 250 µA; VGS = 0 V; Tj = 25 °C  
36  
40  
2
-
-
V
V
V
-
-
VGS(th)  
VGSth  
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C; see  
voltage Figure 10; see Figure 11  
3
4
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 175 °C; see  
voltage  
1
-
-
-
-
V
V
Figure 10; see Figure 11  
ID = 1 mA; VDS = VGS; Tj = -55 °C; see  
Figure 10; see Figure 11  
4.4  
IDSS  
IGSS  
drain leakage current  
gate leakage current  
VDS = 40 V; VGS = 0 V; Tj = 25 °C  
VDS = 0 V; VGS = 20 V; Tj = 25 °C  
VDS = 0 V; VGS = -20 V; Tj = 25 °C  
-
-
-
-
0.02  
1
µA  
nA  
nA  
mΩ  
2
2
-
100  
100  
4.26  
RDSon  
drain-source on-state  
resistance  
VGS = 10 V; ID = 25 A; Tj = 175 °C; see  
Figure 12; see Figure 13  
VGS = 10 V; ID = 25 A; Tj = 25 °C; see  
Figure 12; see Figure 13  
-
-
1.96  
-
2.3  
mΩ  
IDSS  
drain leakage current  
VDS = 40 V; VGS = 0 V; Tj = 175 °C  
500  
µA  
Dynamic characteristics  
QG(tot)  
QGS  
total gate charge  
gate-source charge  
gate-drain charge  
ID = 25 A; VDS = 32 V; VGS = 10 V; see  
Figure 15  
-
-
-
-
175  
49  
67  
5
-
-
-
-
nC  
nC  
nC  
V
QGD  
VGS(pl)  
gate-source plateau  
voltage  
ID = 25 A; VDS = 32 V; see Figure 15  
Ciss  
Coss  
Crss  
input capacitance  
output capacitance  
VGS = 0 V; VDS = 25 V; f = 1 MHz;  
Tj = 25 °C; see Figure 16  
-
-
-
8492  
1606  
1101  
11323 pF  
1927  
1508  
pF  
pF  
reverse transfer  
capacitance  
td(on)  
tr  
td(off)  
tf  
turn-on delay time  
rise time  
VDS = 30 V; RL = 1.2 ; VGS = 10 V;  
RG(ext) = 10 Ω  
-
-
-
-
-
65  
-
-
-
-
-
ns  
ns  
ns  
ns  
nH  
133  
146  
119  
4.5  
turn-off delay time  
fall time  
LD  
internal drain  
inductance  
from drain lead 6 mm from package to  
centre of die  
from upper edge of drain mounting base to  
centre of die  
-
-
2.5  
7.5  
-
-
nH  
nH  
LS  
internal source  
inductance  
from source lead to source bonding pad  
Source-drain diode  
VSD  
source-drain voltage  
IS = 25 A; VGS = 0 V; Tj = 25 °C; see  
Figure 14  
-
0.85  
1.2  
V
trr  
reverse recovery time  
recovered charge  
IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;  
VDS = 30 V  
-
-
75  
57  
-
-
ns  
Qr  
nC  
BUK7E2R3-40C_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 26 January 2009  
7 of 14  
BUK7E2R3-40C  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
003aab005  
003aab007  
300  
20  
6
R
DSon  
V
GS  
(V) = 6  
10  
7
(mΩ)  
I
D
(A)  
V
GS  
(V) = 5.5  
5
6.5  
6.5  
200  
4
3
2
1
5.5  
7
100  
8
10  
5
20  
4.5  
0
0
2
4
6
8
10  
(V)  
0
100  
200  
300  
V
DS  
I (A)  
D
Fig 6. Output characteristics: drain current as a  
function of drain-source voltage; typical values  
Fig 7. Drain-source on-state resistance as a function  
of drain current; typical values  
003aab008  
003aab010  
180  
400  
ID  
gfs  
(A)  
(S)  
300  
200  
100  
120  
60  
0
Tj = 175  
°C  
Tj = 25 °C  
0
0
1
3
4
6
7
0
20  
40  
60  
80  
ID (A)  
VGS (V)  
Fig 8. Forward transconductance as a function of  
drain current; typical values  
Fig 9. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values  
BUK7E2R3-40C_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 26 January 2009  
8 of 14  
BUK7E2R3-40C  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
03aa32  
03aa35  
1  
2  
3  
4  
5  
6  
5
10  
I
V
D
GS(th)  
(A)  
(V)  
min  
typ  
max  
4
10  
10  
10  
10  
10  
max  
3
2
1
0
typ  
min  
60  
0
60  
120  
180  
0
2
4
6
T (°C)  
V
GS  
(V)  
j
Fig 11. Sub-threshold drain current as a function of  
gate-source voltage  
Fig 10. Gate-source threshold voltage as a function of  
junction temperature  
03aa27  
003aab006  
2
4
a
RDSon  
(mΩ)  
1.5  
3
2
1
1
0.5  
0
5
10  
15  
20  
-60  
0
60  
120  
180  
V
GS (V)  
T ( C)  
°
j
Fig 12. Drain-source on-state resistance as a function  
of gate-source voltage; typical values  
Fig 13. Normalized drain-source on-state resistance  
factor as a function of junction temperature  
BUK7E2R3-40C_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 26 January 2009  
9 of 14  
BUK7E2R3-40C  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
003aab012  
003aab011  
200  
10  
VGS  
(V)  
IS  
(A)  
8
6
4
2
0
150  
VDD = 14 V  
VDD = 32 V  
100  
Tj = 175 °C  
Tj = 25 °C  
50  
0
0.0  
0.5  
1.0  
1.5  
2.0  
0
50  
100  
150  
200  
VSD (V)  
QG (nC)  
Fig 14. Source current as a function of source-drain  
voltage; typical values  
Fig 15. Gate-source voltage as a function of gate  
charge; typical values  
003aab009  
14000  
C
iss  
C
(pF)  
10500  
7000  
3500  
0
C
oss  
C
rss  
2  
1  
2
10  
10  
1
10  
10  
V
DS  
(V)  
Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values  
BUK7E2R3-40C_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 26 January 2009  
10 of 14  
BUK7E2R3-40C  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
7. Package outline  
Plastic single-ended package (I2PAK); low-profile 3-lead TO-220AB  
SOT226  
A
A
1
E
D
1
mounting  
base  
D
L
1
Q
b
1
L
1
2
3
b
c
e
e
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
D
max  
D
A
b
c
E
UNIT  
A
b
e
L
L
Q
1
1
1
1
4.5  
4.1  
1.40  
1.27  
0.85  
0.60  
1.3  
1.0  
0.7  
0.4  
1.6  
1.2  
10.3  
9.7  
15.0  
13.5  
3.30  
2.79  
2.6  
2.2  
mm  
11  
2.54  
REFERENCES  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
JEDEC  
JEITA  
low-profile  
3-lead TO-220AB  
05-06-23  
06-02-14  
SOT226  
Fig 17. Package outline SOT226 (I2PAK)  
BUK7E2R3-40C_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 26 January 2009  
11 of 14  
BUK7E2R3-40C  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
8. Revision history  
Table 7.  
Revision history  
Document ID  
Release date  
Data sheet status  
Change notice  
Supersedes  
BUK7E2R3-40C_3  
Modifications:  
20090126  
Product data sheet  
-
BUK75_7E2R3-40C_2  
The format of this data sheet has been redesigned to comply with the new identity  
guidelines of NXP Semiconductors.  
Legal texts have been adapted to the new company name where appropriate.  
Type number BUK7E2R3-40C separated from data sheet BUK75_7E2R3-40C_2.  
BUK75_7E2R3-40C_2  
BUK75_7E2R3-40C_1  
20060810  
Product data sheet  
-
BUK75_7E2R3-40C_1  
20060503  
Product data sheet  
-
-
BUK7E2R3-40C_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 26 January 2009  
12 of 14  
BUK7E2R3-40C  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
9. Legal information  
9.1 Data sheet status  
Document status [1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term 'short data sheet' is explained in section "Definitions".  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product  
status information is available on the Internet at URL http://www.nxp.com.  
Applications — Applications that are described herein for any of these  
9.2 Definitions  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliability.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of sale — NXP Semiconductors products are sold  
subject to the general terms and conditions of commercial sale, as published  
at http://www.nxp.com/profile/terms, including those pertaining to warranty,  
intellectual property rights infringement and limitation of liability, unless  
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
9.3 Disclaimers  
General — Information in this document is believed to be accurate and  
reliable. However, NXP Semiconductors does not give any representations or  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
9.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in medical, military, aircraft,  
space or life support equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
TrenchMOS — is a trademark of NXP B.V.  
10. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
BUK7E2R3-40C_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 26 January 2009  
13 of 14  
BUK7E2R3-40C  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
11. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
1.1  
1.2  
1.3  
1.4  
General description . . . . . . . . . . . . . . . . . . . . . .1  
Features and benefits. . . . . . . . . . . . . . . . . . . . .1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
Quick reference data . . . . . . . . . . . . . . . . . . . . .1  
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2  
Ordering information. . . . . . . . . . . . . . . . . . . . . .2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3  
Thermal characteristics . . . . . . . . . . . . . . . . . . .6  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .7  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .11  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .12  
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .13  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
9.1  
9.2  
9.3  
9.4  
10  
Contact information. . . . . . . . . . . . . . . . . . . . . .13  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2009.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 26 January 2009  
Document identifier: BUK7E2R3-40C_3  

相关型号:

BUK7E2R3-40E

120A, 40V, 0.0023ohm, N-CHANNEL, Si, POWER, MOSFET, TO-262AA, PLASTIC, TO-262, I2PAK-3
NXP

BUK7E2R3-40E,127

N-channel TrenchMOS standard level FET TO-262 3-Pin
NXP

BUK7E2R6-60E

120A, 60V, 0.0026ohm, N-CHANNEL, Si, POWER, MOSFET, TO-262AA, PLASTIC, TO-262, I2PAK-3
NXP

BUK7E2R6-60E,127

N-channel TrenchMOS standard level FET TO-262 3-Pin
NXP

BUK7E2R7-30B

75A, 30V, 0.0027ohm, N-CHANNEL, Si, POWER, MOSFET, TO-262AA, PLASTIC, I2PAK-3
NXP

BUK7E2R7-30B

Transistor
PHILIPS

BUK7E4R0-80E,127

N-channel TrenchMOS standard level FET TO-262 3-Pin
NXP

BUK7E4R3-75C

N-channel TrenchMOS standard level FET
NXP

BUK7E4R6-60E

100A, 60V, 0.0046ohm, N-CHANNEL, Si, POWER, MOSFET, TO-262AA, PLASTIC, TO-262, I2PAK-3
NXP

BUK7J1R0-40H

N-channel 40 V, 1.0 mΩ standard level MOSFET in LFPAK56EProduction
NEXPERIA

BUK7J1R4-40H

N-channel 40 V, 1.4 mΩ standard level MOSFET in LFPAK56EProduction
NEXPERIA

BUK7K12-60E

Dual N-channel 60 V, 9.3 mΩ standard level MOSFETProduction
NEXPERIA