BUK9520-100B [NXP]

N-channel TrenchMOS logic level FET; N沟道的TrenchMOS逻辑电平FET
BUK9520-100B
型号: BUK9520-100B
厂家: NXP    NXP
描述:

N-channel TrenchMOS logic level FET
N沟道的TrenchMOS逻辑电平FET

文件: 总12页 (文件大小:198K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
BUK9520-100B  
N-channel TrenchMOS logic level FET  
Rev. 01 — 6 May 2009  
Product data sheet  
1. Product profile  
1.1 General description  
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic  
package using TrenchMOS technology. This product has been designed and qualified to  
the appropriate AEC standard for use in automotive critical applications.  
1.2 Features and benefits  
„ AEC-Q101 compliant  
„ Suitable for logic level gate drive  
sources  
„ Low conduction losses due to low  
on-state resistance  
„ Suitable for thermally demanding  
environments due to 175 °C rating  
1.3 Applications  
„ 12 V, 24 V and 42 V loads  
„ Motors, lamps and solenoids  
„ Automotive and general purpose  
power switching  
1.4 Quick reference data  
Table 1.  
Quick reference  
Symbol Parameter  
Conditions  
drain-source voltage Tj 25 °C; Tj 175 °C  
Min  
Typ  
Max Unit  
VDS  
ID  
-
-
-
-
100  
63  
V
A
drain current  
VGS = 5 V; Tmb = 25 °C;  
see Figure 1; see Figure 3  
Ptot  
total power  
dissipation  
Tmb = 25 °C; see Figure 2  
-
-
-
-
203  
222  
W
Avalanche ruggedness  
EDS(AL)S non-repetitive  
drain-source  
ID = 63 A; Vsup 100 V;  
RGS = 50 ; VGS = 5 V;  
Tj(init) = 25 °C; unclamped  
mJ  
avalanche energy  
Static characteristics  
RDSon  
drain-source  
on-state resistance  
VGS = 4.5 V; ID = 25 A;  
Tj = 25 °C; see Figure 11;  
see Figure 12  
-
-
16.4 22.3 mΩ  
VGS = 5 V; ID = 25 A;  
16.2 20  
mΩ  
Tj = 25 °C; see Figure 12;  
see Figure 11  
BUK9520-100B  
NXP Semiconductors  
N-channel TrenchMOS logic level FET  
2. Pinning information  
Table 2.  
Pinning information  
Pin  
1
Symbol Description  
Simplified outline  
Graphic symbol  
G
D
S
D
gate  
mb  
D
2
drain  
source  
3
G
mb  
mounting base; connected to  
drain  
mbb076  
S
1
2 3  
SOT78A  
(3-lead TO-220AB; SC-46;  
SFM3)  
3. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
BUK9520-100B  
3-lead  
plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead SOT78A  
TO-220AB  
TO-220AB;  
SC-46;  
SFM3  
BUK9520-100B_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 6 May 2009  
2 of 12  
BUK9520-100B  
NXP Semiconductors  
N-channel TrenchMOS logic level FET  
4. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Max  
100  
100  
15  
Unit  
V
drain-source voltage  
drain-gate voltage  
gate-source voltage  
drain current  
Tj 25 °C; Tj 175 °C  
RGS = 20 kΩ  
-
VDGR  
VGS  
-
V
-15  
V
ID  
Tmb = 25 °C; VGS = 5 V; see Figure 1; see Figure 3  
Tmb = 100 °C; VGS = 5 V; see Figure 1  
-
63  
A
-
45  
A
IDM  
Ptot  
Tstg  
Tj  
peak drain current  
Tmb = 25 °C; tp 10 µs; pulsed; see Figure 3  
-
253  
203  
175  
175  
A
total power dissipation Tmb = 25 °C; see Figure 2  
storage temperature  
-
W
°C  
°C  
-55  
-55  
junction temperature  
Source-drain diode  
IS  
source current  
peak source current  
Tmb = 25 °C  
-
-
63  
A
A
ISM  
tp 10 µs; pulsed; Tmb = 25 °C  
253  
Avalanche ruggedness  
EDS(AL)S non-repetitive  
ID = 63 A; Vsup 100 V; RGS = 50 ; VGS = 5 V;  
-
222  
mJ  
drain-source avalanche Tj(init) = 25 °C; unclamped  
energy  
03aa24  
03na19  
120  
120  
I
P
der  
der  
(%)  
(%)  
80  
80  
40  
40  
0
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
T
mb  
(°C)  
T
mb  
(°C)  
Fig 1. Normalized continuous drain current as a  
function of mounting base temperature  
Fig 2. Normalized total power dissipation as a  
function of mounting base temperature  
BUK9520-100B_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 6 May 2009  
3 of 12  
BUK9520-100B  
NXP Semiconductors  
N-channel TrenchMOS logic level FET  
003aac769  
103  
ID  
Limit RDSon = VDS / ID  
(A)  
102  
tp  
10  
=
s
μ
100  
s
μ
10  
1
DC  
1ms  
10 ms  
100 ms  
10-1  
1
10  
102  
103  
VDS (V)  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.  
5. Thermal characteristics  
Table 5.  
Symbol  
Rth(j-mb)  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
thermal resistance from see Figure 4  
junction to mounting  
base  
-
-
0.75  
K/W  
Rth(j-a)  
thermal resistance from vertical in still air; SOT78 package  
junction to ambient  
-
60  
-
K/W  
003aac770  
1
Zth (j-mb)  
(K/W)  
δ
= 0.5  
0.2  
10-1  
10-2  
10-3  
0.1  
0.05  
0.02  
tp  
δ =  
P
T
single shot  
t
tp  
T
1e-6  
10-5  
10-4  
10-3  
10-2  
10-1  
1
tp (s)  
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration  
BUK9520-100B_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 6 May 2009  
4 of 12  
BUK9520-100B  
NXP Semiconductors  
N-channel TrenchMOS logic level FET  
6. Characteristics  
Table 6.  
Symbol  
Characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
V(BR)DSS  
drain-source  
breakdown voltage  
ID = 0.25 mA; VGS = 0 V; Tj = 25 °C  
ID = 0.25 mA; VGS = 0 V; Tj = -55 °C  
100  
90  
1
-
-
V
V
V
-
-
VGS(th)  
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C;  
1.58  
2
voltage  
see Figure 10  
ID = 1 mA; VDS = VGS; Tj = 175 °C;  
see Figure 10  
0.5  
-
-
-
-
V
V
ID = 1 mA; VDS = VGS; Tj = -55 °C;  
see Figure 10  
2.3  
IDSS  
drain leakage current  
gate leakage current  
VDS = 100 V; VGS = 0 V; Tj = 175 °C  
VDS = 100 V; VGS = 0 V; Tj = 25 °C  
VDS = 0 V; VGS = -10 V; Tj = 25 °C  
VDS = 0 V; VGS = 10 V; Tj = 25 °C  
-
-
-
-
-
-
500  
1
µA  
µA  
nA  
nA  
mΩ  
0.05  
2
IGSS  
100  
100  
22.3  
2
RDSon  
drain-source on-state  
resistance  
VGS = 4.5 V; ID = 25 A; Tj = 25 °C;  
see Figure 11; see Figure 12  
16.4  
VGS = 10 V; ID = 25 A; Tj = 25 °C;  
see Figure 11; see Figure 12  
-
-
-
15.6  
-
18.5  
50  
mΩ  
mΩ  
mΩ  
VGS = 5 V; ID = 25 A; Tj = 175 °C;  
see Figure 12; see Figure 11  
VGS = 5 V; ID = 25 A; Tj = 25 °C;  
see Figure 12; see Figure 11  
16.2  
20  
Dynamic characteristics  
QG(tot)  
QGS  
QGD  
Ciss  
total gate charge  
gate-source charge  
gate-drain charge  
input capacitance  
output capacitance  
ID = 25 A; VDS = 80 V; VGS = 5 V;  
Tj = 25 °C; see Figure 14; see Figure 15  
-
-
-
-
-
-
53.4  
9.5  
-
nC  
nC  
nC  
pF  
pF  
pF  
-
21.2  
4300  
340  
150  
-
VGS = 0 V; VDS = 25 V; f = 1 MHz;  
Tj = 25 °C; see Figure 16  
5657  
411  
201  
Coss  
Crss  
reverse transfer  
capacitance  
td(on)  
tr  
td(off)  
tf  
turn-on delay time  
rise time  
VDS = 30 V; RL = 1.2 ; VGS = 5 V;  
RG(ext) = 10 ; Tj = 25 °C  
-
-
-
-
-
45  
-
-
-
-
-
ns  
ns  
ns  
ns  
nH  
116  
173  
77  
turn-off delay time  
fall time  
LD  
internal drain  
inductance  
from drain lead 6 mm from package to  
centre of die; Tj = 25 °C  
4.5  
from upper edge of drain mounting base to  
centre of die; Tj = 25 °C  
-
-
2.5  
7.5  
-
-
nH  
nH  
LS  
internal source  
inductance  
from source lead to source bond pad;  
Tj = 25 °C  
BUK9520-100B_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 6 May 2009  
5 of 12  
BUK9520-100B  
NXP Semiconductors  
N-channel TrenchMOS logic level FET  
Table 6.  
Symbol  
Characteristics …continued  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Source-drain diode  
VSD  
source-drain voltage  
IS = 25 A; VGS = 0 V; Tj = 25 °C;  
see Figure 13  
-
0.86  
1.2  
V
trr  
reverse recovery time  
recovered charge  
IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;  
VDS = 30 V; Tj = 25 °C  
-
-
80  
-
-
ns  
Qr  
272  
nC  
03aa36  
10-1  
ID  
003aac771  
150  
ID  
10  
VGS (V) =  
(A)  
4.5  
3.4  
(A)  
10-2  
10-3  
10-4  
10-5  
10-6  
120  
90  
3.2  
3
min  
typ  
max  
60  
30  
0
2.7  
2.5  
0
1
2
3
0
1
2
3
4
5
DS (V)  
V
VGS (V)  
Fig 5. Sub-threshold drain current as a function of  
gate-source voltage  
Fig 6. Output characteristics: drain current as a  
function of drain-source voltage; typical values  
003aac772  
003aac774  
160  
28  
RDSon  
gfs (S)  
(m  
)
Ω
120  
24  
20  
16  
12  
80  
40  
0
0
30  
60  
90  
120  
2
4
6
8
10  
I
D (A)  
VGS (V)  
Fig 8. Forward transconductance as a function of  
drain current; typical values.  
Fig 7. Drain-source on-state resistance as a function  
of gate-source voltage; typical values.  
BUK9520-100B_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 6 May 2009  
6 of 12  
BUK9520-100B  
NXP Semiconductors  
N-channel TrenchMOS logic level FET  
003aac776  
03aa33  
2.5  
VGS(th)  
(V)  
120  
ID  
(A)  
2
1.5  
1
max  
90  
60  
typ  
min  
T = 150 C  
°
j
25 C  
°
30  
0
0.5  
0
-60  
0
60  
120  
180  
0
1
2
3
4
T ( C)  
°
VGS (V)  
j
Fig 10. Gate-source threshold voltage as a function of  
junction temperature  
Fig 9. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values.  
03aa29  
003aac773  
3
50  
2.5 2.7  
3
3.2  
3.4  
RDSon  
(m  
)
Ω
a
40  
30  
20  
10  
4.5  
10  
VGS (V) =  
2
1
0
-60  
0
60  
120  
180  
0
30  
60  
90  
120  
150  
ID (A)  
T ( C)  
°
j
Fig 11. Drain-source on-state resistance as a function  
of drain current; typical values.  
Fig 12. Normalized drain-source on-state resistance  
factor as a function of junction temperature  
BUK9520-100B_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 6 May 2009  
7 of 12  
BUK9520-100B  
NXP Semiconductors  
N-channel TrenchMOS logic level FET  
003aac778  
120  
V
DS  
IS  
(A)  
I
D
90  
60  
V
GS(pl)  
V
GS(th)  
V
GS  
Q
GS1  
Q
GS2  
150 C  
°
T = 25 C  
°
j
30  
0
Q
Q
GD  
GS  
Q
G(tot)  
003aaa508  
Fig 14. Gate charge waveform definitions  
0
0.5  
1
1.5  
2
VSD (V)  
Fig 13. Source current as a function of source drain  
voltage; typical values.  
003aac777  
003aac775  
5
104  
°
C
VGS  
(V)  
Tj = 25  
C
(pF)  
Cis s  
4
3
2
1
0
VDS = 14V  
VDS = 80V  
103  
Coss  
Crs s  
102  
0
20  
40  
60  
G (nC)  
10-1  
1
10  
102  
Q
VDS (V)  
Fig 15. Gate-source voltage as a function of turn-on  
gate charge; typical values.  
Fig 16. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values  
BUK9520-100B_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 6 May 2009  
8 of 12  
BUK9520-100B  
NXP Semiconductors  
N-channel TrenchMOS logic level FET  
7. Package outline  
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB  
SOT78A  
E
p
A
A
1
q
mounting  
base  
D
1
D
(1)  
L
L
2
1
Q
b
1
L
1
2
3
b
c
e
e
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
b
L
max.  
(1)  
2
e
A
b
D
E
L
D
L
1
A
c
UNIT  
p
q
Q
1
1
1
4.5  
4.1  
1.39  
1.27  
0.9  
0.6  
1.3  
1.0  
0.7  
0.4  
15.8  
15.2  
6.4  
5.9  
10.3  
9.7  
15.0  
13.5  
3.30  
2.79  
3.8  
3.6  
3.0  
2.7  
2.6  
2.2  
mm  
3.0  
2.54  
Note  
1. Terminals in this zone are not tinned.  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
03-01-22  
05-03-14  
SOT78A  
3-lead TO-220AB  
SC-46  
Fig 17. Package outline SOT78A (3-lead TO-220AB; SC-46; SFM3)  
BUK9520-100B_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 6 May 2009  
9 of 12  
BUK9520-100B  
NXP Semiconductors  
N-channel TrenchMOS logic level FET  
8. Revision history  
Table 7.  
Revision history  
Document ID  
Release date  
Data sheet status  
Change notice  
Supersedes  
BUK9520-100B_1  
20090506  
Product data sheet  
-
-
BUK9520-100B_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 6 May 2009  
10 of 12  
BUK9520-100B  
NXP Semiconductors  
N-channel TrenchMOS logic level FET  
9. Legal information  
9.1 Data sheet status  
Document status [1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term 'short data sheet' is explained in section "Definitions".  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product  
status information is available on the Internet at URL http://www.nxp.com.  
Applications — Applications that are described herein for any of these  
9.2 Definitions  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliability.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of sale — NXP Semiconductors products are sold  
subject to the general terms and conditions of commercial sale, as published  
at http://www.nxp.com/profile/terms, including those pertaining to warranty,  
intellectual property rights infringement and limitation of liability, unless  
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
9.3 Disclaimers  
General — Information in this document is believed to be accurate and  
reliable. However, NXP Semiconductors does not give any representations or  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Export control — This document as well as the item(s) described herein may  
be subject to export control regulations. Export might require a prior  
authorization from national authorities.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in medical, military, aircraft,  
space or life support equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
9.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
TrenchMOS — is a trademark of NXP B.V.  
10. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
BUK9520-100B_1  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 01 — 6 May 2009  
11 of 12  
BUK9520-100B  
NXP Semiconductors  
N-channel TrenchMOS logic level FET  
11. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
1.1  
1.2  
1.3  
1.4  
General description . . . . . . . . . . . . . . . . . . . . . .1  
Features and benefits. . . . . . . . . . . . . . . . . . . . .1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
Quick reference data . . . . . . . . . . . . . . . . . . . . .1  
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2  
Ordering information. . . . . . . . . . . . . . . . . . . . . .2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3  
Thermal characteristics . . . . . . . . . . . . . . . . . . .4  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .5  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .10  
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .11  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .11  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .11  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .11  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .11  
9.1  
9.2  
9.3  
9.4  
10  
Contact information. . . . . . . . . . . . . . . . . . . . . .11  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2009.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 6 May 2009  
Document identifier: BUK9520-100B_1  

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