BUK9524-55 [NXP]

TrenchMOS transistor Logic level FET; 的TrenchMOS晶体管逻辑电平场效应管


型号：	BUK9524-55
厂家：	NXP
描述：	TrenchMOS transistor Logic level FET 的TrenchMOS晶体管逻辑电平场效应管晶体晶体管功率场效应晶体管开关脉冲局域网
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Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

BUK9524-55

GENERAL DESCRIPTION

QUICK REFERENCE DATA

N-channel enhancement mode logic

level field-effect power transistor in a

plastic envelope using ’trench’

technology. The device features very

low on-state resistance and has

integral zener diodes giving ESD

protection up to 2kV. It is intended for

use in automotive and general

purpose switching applications.

SYMBOL

PARAMETER

MAX.

UNIT

V_DS

I_D

P_tot

T_j

Drain-source voltage

Drain current (DC)

Total power dissipation

Junction temperature

Drain-source on-state

103

175

˚C

mΩ

R_DS(ON)

resistance

V_GS= 5 V

PINNING - TO220AB

PIN CONFIGURATION

SYMBOL

DESCRIPTION

tab

gate

drain

source

tab drain

1 2 3

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V_DS

V_DGR

±V_GS

I_D

I_DM

Drain-source voltage

Drain-gate voltage

Gate-source voltage

Drain current (DC)

180

103

175

˚C

R_GS= 20 kΩ

T_mb= 25 ˚C

T_mb= 100 ˚C

T_mb= 25 ˚C

Drain current (DC)

Drain current (pulse peak value)

Total power dissipation

Storage & operating temperature

P_tot

T_stg, T_j

- 55

ESD LIMITING VALUE

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V_C

Electrostatic discharge capacitor

voltage, all pins

Human body model

(100 pF, 1.5 kΩ)

THERMAL RESISTANCES

SYMBOL PARAMETER

CONDITIONS

TYP.

MAX.

UNIT

R_{th j-mb}

Thermal resistance junction to

mounting base

1.45

K/W

R_{th j-a}

Thermal resistance junction to

ambient

in free air

K/W

April 1998

Rev 1.100

Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

BUK9524-55

STATIC CHARACTERISTICS

T_j= 25˚C unless otherwise specified

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

V_(BR)DSS

V_GS(TO)

Drain-source breakdown

voltage

Gate threshold voltage

V_GS= 0 V; I_D= 0.25 mA;

0.5

T_j= -55˚C

1.5

V_DS= V_GS; I_D= 1 mA

T_j= 175˚C

T_j= -55˚C

2.3

500

I_DSS

Zero gate voltage drain current V_DS= 55 V; V_GS= 0 V;

0.05

0.02

µA

T_j= 175˚C

I_GSS

Gate source leakage current

V_GS= ±5 V; V_DS= 0 V

I_G= ±1 mA;

±V_(BR)GSS

R_DS(ON)

Gate-source breakdown

voltage

Drain-source on-state

resistance

V_GS= 5 V; I_D= 25 A

mΩ

T_j= 175˚C

DYNAMIC CHARACTERISTICS

T_mb= 25˚C unless otherwise specified

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

g_fs

Forward transconductance

V_DS= 25 V; I_D= 25 A

C_iss

C_oss

C_rss

Input capacitance

Output capacitance

Feedback capacitance

V_GS= 0 V; V_DS= 25 V; f = 1 MHz

1500 2000

300

150

360

200

t_{d on}

t_r

t_{d off}

t_f

Turn-on delay time

Turn-on rise time

Turn-off delay time

Turn-off fall time

V_DD= 30 V; I_D= 25 A;

V_GS= 5 V; R_G= 10 Ω

Resistive load

130

135

L_d

L_s

Internal drain inductance

Internal source inductance

Measured from contact screw on

tab to centre of die

Measured from drain lead 6 mm

from package to centre of die

Measured from source lead 6 mm

from package to source bond pad

3.5

4.5

7.5

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

T_j= 25˚C unless otherwise specified

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

I_DR

Continuous reverse drain

current

I_DRM

V_SD

Pulsed reverse drain current

Diode forward voltage

160

1.2

I_F= 25 A; V_GS= 0 V

I_F= 40 A; V_GS= 0 V

0.95

1.0

t_rr

Q_rr

Reverse recovery time

Reverse recovery charge

I_F= 40 A; -dI_F/dt = 100 A/µs;

V_GS= -10 V; V_R= 30 V

0.07

µC

April 1998

Rev 1.100

Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

BUK9524-55

AVALANCHE LIMITING VALUE

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

W_DSS

Drain-source non-repetitive

unclamped inductive turn-off

energy

I_D= 40 A; V_DD≤ 25 V;

V_GS= 10 V; R_GS= 50 Ω; T_mb= 25 ˚C

Normalised Power Derating

PD%

ID / A

1000

7524-55

120

110

100

RDS(ON) = VDS / ID

100

tp = 10 us

100 us

1 ms

10 ms

100 ms

Tmb /

100 120 140 160 180

100

1000

VDS / V

Fig.1. Normalised power dissipation.

PD% = 100 P_D/P_{D 25 ˚C}= f(T_mb)

Fig.3. Safe operating area. T_mb= 25 ˚C

I_D& I_DM= f(V_DS); I_DMsingle pulse; parameter t_p

Normalised Current Derating

Transient thermal impedance, Zth (K/W)

ID%

120

110

100

0.5

0.2

0.1

0.05

0.1

0.02

t^p

D =

0.01

0.001

100 120 140 160 180

10us

1ms

pulse width, tp (s)

0.1s

10s

Tmb /

Fig.2. Normalised continuous drain current.

ID% = 100 I_D/I_{D 25 ˚C}= f(T_mb); conditions: V_GS≥ 5 V

Fig.4. Transient thermal impedance.

Z_{th j-mb}= f(t); parameter D = t_p/T

April 1998

Rev 1.100

Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

BUK9524-55

100

gfs/S

VGS/V =

5.0

ID/A

4.8

4.6

4.4

4.2

4.0

3.8

3.6

3.4

3.2

3.0

2.8

2.6

100

VSD/V

ID/A

Fig.5. Typical output characteristics, T_j= 25 ˚C.

I_D= f(V_DS); parameter V_GS

Fig.8. Typical transconductance, T_j= 25 ˚C.

g_fs= f(I_D); conditions: V_DS= 25 V

RDS(ON)/mOhm

BUK959-60

Rds(on) normlised to 25degC

2.5

VGS/V =

4.2

4.4

4.6

1.5

4.8

0.5

-100

10 15 20 25 30 35 40 45 50 55 60 65 70 75

ID/A

-50

Tmb / degC

100

150

200

Fig.6. Typical on-state resistance, T_j= 25 ˚C.

R_DS(ON)= f(I_D); parameter V_GS

Fig.9. Normalised drain-source on-state resistance.

a = R_DS(ON)/R_{DS(ON)25 ˚C}= f(T_j); I_D= 25 A; V_GS= 5 V

100

ID/A

BUK959-60

VGS(TO) / V

max.

2.5

typ.

1.5

min.

0.5

Tj/C = 175

-100

-50

Tj / C

100

150

200

VGS/V

Fig.7. Typical transfer characteristics.

I_D= f(V_GS) ; conditions: V_DS= 25 V; parameter T_j

Fig.10. Gate threshold voltage.

V_GS(TO)= f(T_j); conditions: I_D= 1 mA; V_DS= V_GS

April 1998

Rev 1.100

Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

BUK9524-55

100

IF/A

Sub-Threshold Conduction

1E-01

1E-02

1E-03

1E-04

1E-05

typ

98%

Tj/C =

175

0.5

1.5

0.5

1.5

2.5

VSDS/V

Fig.11. Sub-threshold drain current.

I_D= f(V_GS); conditions: T_j= 25 ˚C; V_DS= V_GS

Fig.14. Typical reverse diode current.

I_F= f(V_SDS); conditions: V_GS= 0 V; parameter T_j

WDSS%

120

110

100

2.5

1.5

Ciss

ThouandspF

0.5

Coss

Crss

100

Tmb /

120

140

160

180

0.01

0.1

VDS/V

Fig.12. Typical capacitances, C_iss, C_oss, C_rss.

C = f(V_DS); conditions: V_GS= 0 V; f = 1 MHz

Fig.15. Normalised avalanche energy rating.

W_DSS% = f(T_mb); conditions: I_D= 75 A

VGS/V

VDD

VDS = 14V

VDS

VDS = 44V

VGS

-ID/100

T.U.T.

R 01

RGS

shunt

QG/nC

Fig.16. Avalanche energy test circuit.

W_DSS= 0.5 LI_D²BV_DSS/(BV_DSS− V_DD

Fig.13. Typical turn-on gate-charge characteristics.

V_GS= f(Q_G); conditions: I_D= 50 A; parameter V_DS

)

April 1998

Rev 1.100

Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

BUK9524-55

VDD

VDS

VGS

T.U.T.

Fig.17. Switching test circuit.

April 1998

Rev 1.100

Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

BUK9524-55

MECHANICAL DATA

Dimensions in mm

Net Mass: 2 g

4,5

max

10,3

max

1,3

3,7

2,8

5,9

min

15,8

max

3,0 max

not tinned

3,0

13,5

min

1,3

1 2 3

max

(2x)

0,9 max (3x)

0,6

2,4

2,54 2,54

Fig.18. SOT78 (TO220AB); pin 2 connected to mounting base.

Notes

1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent

damage to MOS gate oxide.

2. Refer to mounting instructions for SOT78 (TO220) envelopes.

3. Epoxy meets UL94 V0 at 1/8".

April 1998

Rev 1.100

Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

BUK9524-55

DEFINITIONS

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and

operation of the device at these or at any other conditions above those given in the Characteristics sections of

this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

Philips Electronics N.V. 1998

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the

The information presented in this document does not form part of any quotation or contract, it is believed to be

accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any

consequence of its use. Publication thereof does not convey nor imply any license under patent or other

industrial or intellectual property rights.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these

products can be reasonably expected to result in personal injury. Philips customers using or selling these products

for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting

from such improper use or sale.

April 1998

Rev 1.100

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