BUK9610-30 [NXP]

TrenchMOS transistor Logic level FET; 的TrenchMOS晶体管逻辑电平场效应管


型号：	BUK9610-30
厂家：	NXP
描述：	TrenchMOS transistor Logic level FET 的TrenchMOS晶体管逻辑电平场效应管晶体晶体管功率场效应晶体管开关脉冲
文件：	总8页 (文件大小：54K)
中文：	中文翻译
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Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

BUK9610-30

GENERAL DESCRIPTION

QUICK REFERENCE DATA

N-channel enhancement mode logic

level field-effect power transistor in a

plastic envelope suitable for surface

mounting using ’trench’ technology.

Thedevicefeaturesverylowon-state

resistance and has integral zener

diodes giving ESD protection up to

2kV. It is intended for use in

automotive and general purpose

switching applications.

SYMBOL

PARAMETER

MAX.

UNIT

V_DS

I_D

P_tot

T_j

Drain-source voltage

Drain current (DC)

Total power dissipation

Junction temperature

Drain-source on-state

142

175

10.5

˚C

mΩ

R_DS(ON)

resistance

V_GS= 5 V

PINNING - SOT404

PIN CONFIGURATION

SYMBOL

DESCRIPTION

gate

drain

source

mb drain

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V_DS

V_DGR

±V_GS

I_D

I_DM

Drain-source voltage

Drain-gate voltage

Gate-source voltage

Drain current (DC)

240

142

175

˚C

R_GS= 20 kΩ

T_mb= 25 ˚C

T_mb= 100 ˚C

T_mb= 25 ˚C

Drain current (DC)

Drain current (pulse peak value)

Total power dissipation

Storage & operating temperature

P_tot

T_stg, T_j

- 55

THERMAL RESISTANCES

SYMBOL PARAMETER

CONDITIONS

TYP.

MAX.

UNIT

R_{th j-mb}

R_{th j-a}

Thermal resistance junction to

mounting base

Thermal resistance junction to

ambient

1.05

K/W

minimum footprint, FR4

board

K/W

ESD LIMITING VALUE

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V_C

Electrostatic discharge capacitor

voltage

Human body model

(100 pF, 1.5 kΩ)

December 1997

Rev 1.100

Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

BUK9610-30

STATIC CHARACTERISTICS

T_j= 25˚C unless otherwise specified

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

V_(BR)DSS

V_GS(TO)

Drain-source breakdown

voltage

Gate threshold voltage

V_GS= 0 V; I_D= 0.25 mA;

1.0

0.5

µA

T_j= -55˚C

V_DS= V_GS; I_D= 1 mA

1.5

0.05

0.02

2.0

2.3

500

T_j= 175˚C

T_j= -55˚C

I_DSS

Zero gate voltage drain current V_DS= 30 V; V_GS= 0 V;

T_j= 175˚C

I_GSS

Gate source leakage current

V_GS= ±5 V; V_DS= 0 V

I_G= ±1 mA;

±V_(BR)GSS

R_DS(ON)

Gate-source breakdown

voltage

Drain-source on-state

resistance

V_GS= 5 V; I_D= 25 A

10.5

19.5

mΩ

T_j= 175˚C

DYNAMIC CHARACTERISTICS

T_mb= 25˚C unless otherwise specified

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

g_fs

Forward transconductance

V_DS= 25 V; I_D= 25 A

Q_g(tot)

Q_gs

Q_gd

Total gate charge

Gate-source charge

Gate-drain (Miller) charge

I_D= 75 A; V_DD= 24 V; V_GS= 5 V

C_iss

C_oss

C_rss

Input capacitance

Output capacitance

Feedback capacitance

V_GS= 0 V; V_DS= 25 V; f = 1 MHz

2500

640

320

t_{d on}

t_r

t_{d off}

t_f

Turn-on delay time

Turn-on rise time

Turn-off delay time

Turn-off fall time

V_DD= 15 V; I_D= 25 A;

V_GS= 5 V; R_G= 5 Ω

130

145

180

L_d

Internal drain inductance

Measured from tab to centre of die

Measured from drain lead solder

point to centre of die

3.5

4.5

L_s

Internal source inductance

Measured from source lead solder

point to source bond pad

7.5

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

T_j= 25˚C unless otherwise specified

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

I_DR

Continuous reverse drain

current

I_DRM

V_SD

Pulsed reverse drain current

Diode forward voltage

240

1.2

I_F= 25 A; V_GS= 0 V

I_F= 75 A; V_GS= 0 V

0.95

1.0

t_rr

Q_rr

Reverse recovery time

Reverse recovery charge

I_F= 75 A; -dI_F/dt = 100 A/µs;

V_GS= -10 V; V_R= 25 V

0.14

µC

December 1997

Rev 1.100

Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

BUK9610-30

AVALANCHE LIMITING VALUE

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

W_DSS

Drain-source non-repetitive

unclamped inductive turn-off

energy

I_D= 45 A; V_DD≤ 25 V;

200

V_GS= 5 V; R_GS= 50 Ω; T_mb= 25 ˚C

December 1997

Rev 1.100

Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

BUK9610-30

Normalised Power Derating

PD%

BUKX514-55

Zth / (K/W)

120

110

100

1E+01

1E+00

1E-01

1E-02

1E-03

0.5

0.2

0.1

0.05

D =

0.02

Tmb /

100 120 140 160 180

1E-07

1E-05

1E-03

t / s

1E-01

1E+01

Fig.1. Normalised power dissipation.

PD% = 100 P_D/P_{D 25 ˚C}= f(T_mb)

Fig.4. Transient thermal impedance.

Z_{th j-mb}= f(t); parameter D = t_p/T

Normalised Current Derating

ID%

ID / A

BUK9510-30

3.5

120

110

100

VGS / V =

3.2

2.8

2.6

2.4

2.2

100 120 140 160 180

Tmb /

VDS / V

Fig.2. Normalised continuous drain current.

ID% = 100 I_D/I_{D 25 ˚C}= f(T_mb); conditions: V_GS≥ 5 V

Fig.5. Typical output characteristics, T_j= 25 ˚C.

I_D= f(V_DS); parameter V_GS

ID / A

RDS(ON) / mOhm

9510-30

7510-30

1000

100

3.2

3.5

RDS(ON) = VDS / ID

tp = 100 us

1 ms

10 ms

VGS / V =

100 ms

VDS / V

100

ID / A

Fig.3. Safe operating area. T_mb= 25 ˚C

I_D& I_DM= f(V_DS); I_DMsingle pulse; parameter t_p

Fig.6. Typical on-state resistance, T_j= 25 ˚C.

R_DS(ON)= f(I_D); parameter V_GS

December 1997

Rev 1.100

Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

BUK9610-30

BUK959-60

VGS(TO) / V

max.

ID / A

100

9510-30

2.5

Tj / C = 25

175

typ.

1.5

min.

0.5

-100

-50

Tj / C

100

150

200

VGS / V

Fig.7. Typical transfer characteristics.

I_D= f(V_GS) ; conditions: V_DS= 25 V; parameter T_j

Fig.10. Gate threshold voltage.

_GS(TO)= f(T_j); conditions: I_D= 1 mA; V_DS= V_GS

Sub-Threshold Conduction

gfs / S

9510-30

1E-01

1E-02

1E-03

1E-04

1E-05

typ

98%

Tj / C = 25

175

100

ID / A

0.5

1.5

2.5

Fig.8. Typical transconductance, T_j= 25 ˚C.

g_fs= f(I_D); conditions: V_DS= 25 V

Fig.11. Sub-threshold drain current.

I_D= f(V_GS); conditions: T_j= 25 ˚C; V_DS= V_GS

C / pF

9510-30

Ciss

30V TrenchMOS

10000

1000

100

1.5

Coss

Crss

0.5

-100

100

200

-50

Tj / C

150

0.1

100

VDS / V

Fig.9. Normalised drain-source on-state resistance.

a = R_DS(ON)/R_{DS(ON)25 ˚C}= f(T_j); I_D= 25 A; V_GS= 5 V

Fig.12. Typical capacitances, C_iss, C_oss, C_rss.

C = f(V_DS); conditions: V_GS= 0 V; f = 1 MHz

December 1997

Rev 1.100

Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

BUK9610-30

WDSS%

VGS / V

9510-30

120

110

100

VDS / V = 6

100

120

140

160

180

QG / nC

Tmb /

Fig.13. Typical turn-on gate-charge characteristics.

V_GS= f(Q_G); conditions: I_D= 75 A; parameter V_DS

Fig.15. Normalised avalanche energy rating.

W_DSS% = f(T_mb); conditions: I_D= 45 A

IF / A

9510-30

100

VDD

VDS

Tj / C = 175

VGS

-ID/100

T.U.T.

R 01

RGS

shunt

0.5

1.5

VSDS / V

Fig.16. Avalanche energy test circuit.

W_DSS= 0.5 LI_D²BV_DSS/(BV_DSS− V_DD

Fig.14. Typical reverse diode current.

I_F= f(V_SDS); conditions: V_GS= 0 V; parameter T_j

)

VDD

VDS

VGS

T.U.T.

Fig.17. Switching test circuit.

December 1997

Rev 1.100

Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

BUK9610-30

MECHANICAL DATA

Dimensions in mm

Net Mass: 1.4 g

4.5 max

1.4 max

10.3 max

11 max

15.4

2.5

0.85 max

(x2)

0.5

2.54 (x2)

Fig.18. SOT404 : centre pin connected to mounting base.

MOUNTING INSTRUCTIONS

Dimensions in mm

11.5

9.0

17.5

2.0

3.8

5.08

Fig.19. SOT404 : soldering pattern for surface mounting.

Notes

1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent

damage to MOS gate oxide.

2. Epoxy meets UL94 V0 at 1/8".

December 1997

Rev 1.100

Philips Semiconductors

Product specification

TrenchMOS transistor

Logic level FET

BUK9610-30

DEFINITIONS

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and

operation of the device at these or at any other conditions above those given in the Characteristics sections of

this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

Philips Electronics N.V. 1997

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the

The information presented in this document does not form part of any quotation or contract, it is believed to be

accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any

consequence of its use. Publication thereof does not convey nor imply any license under patent or other

industrial or intellectual property rights.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these

products can be reasonably expected to result in personal injury. Philips customers using or selling these products

for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting

from such improper use or sale.

December 1997

Rev 1.100

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