BUK98180-100A [NXP]

TrenchMOS⑩ logic level FET; 的TrenchMOS ™逻辑电平FET
BUK98180-100A
型号: BUK98180-100A
厂家: NXP    NXP
描述:

TrenchMOS⑩ logic level FET
的TrenchMOS ™逻辑电平FET

文件: 总13页 (文件大小:277K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
BUK98180-100A  
TrenchMOS™ logic level FET  
Rev. 02 — 18 May 2001  
Product data  
1. Description  
N-channel enhancement mode field-effect power transistor in a plastic package using  
TrenchMOS™1 technology, featuring very low on-state resistance.  
Product availability:  
BUK98180-100A in SOT223 (SC-73).  
2. Features  
TrenchMOS™ technology  
Q101 compliant  
150 °C rated  
Logic level compatible.  
3. Applications  
Automotive and general purpose power switching  
12 V, 24 V and 42 V loads  
c
c
Motors, lamps and solenoids.  
4. Pinning information  
Table 1: Pinning - SOT223 (SC-73), simplified outline and symbol  
Pin  
1
Description  
gate (g)  
Simplified outline  
Symbol  
4
d
s
2
drain (d)  
3
source (s)  
drain (d)  
g
4
1
2
3
MBB076  
MSB002 - 1  
Top view  
SOT223 (SC-73)  
1. TrenchMOS is a trademark of Royal Philips Electronics.  
BUK98180-100A  
Philips Semiconductors  
TrenchMOS™ logic level FET  
5. Quick reference data  
Table 2: Quick reference data  
Symbol Parameter  
Conditions  
Typ  
Max  
100  
4.6  
8
Unit  
V
VDS  
ID  
drain-source voltage (DC)  
drain current (DC)  
Tsp = 25 °C; VGS = 5 V  
Tsp = 25 °C  
A
Ptot  
Tj  
total power dissipation  
junction temperature  
W
150  
180  
201  
173  
°C  
RDSon  
drain-source on-state resistance  
Tj = 25 °C; VGS = 5 V; ID = 5 A  
Tj = 25 °C; VGS = 4.5 V; ID = 5 A  
Tj = 25 °C; VGS = 10 V; ID = 5 A  
153  
mΩ  
mΩ  
mΩ  
147  
6. Limiting values  
Table 3: Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol Parameter  
Conditions  
Min  
Max  
100  
100  
±10  
±15  
4.6  
3
Unit  
V
VDS  
VDGR  
VGS  
VGSM  
ID  
drain-source voltage (DC)  
drain-gate voltage (DC)  
gate-source voltage (DC)  
non-repetitive gate-source voltage  
drain current (DC)  
RGS = 20 kΩ  
V
V
tp 50 µs  
V
Tsp = 25 °C; VGS = 5 V; Figure 2 and 3  
Tsp = 100 °C; VGS = 5 V; Figure 2  
A
A
IDM  
peak drain current  
Tsp = 25 °C; pulsed; tp 10 µs;  
18  
A
Figure 3  
Ptot  
Tstg  
Tj  
total power dissipation  
storage temperature  
Tsp = 25 °C; Figure 1  
8
W
55  
55  
+150  
+150  
°C  
°C  
operating junction temperature  
Source-drain diode  
IDR  
reverse drain current (DC)  
pulsed reverse drain current  
Tsp = 25 °C  
4.6  
18  
A
A
IDRM  
Tsp = 25 °C; pulsed; tp 10 µs  
Avalanche ruggedness  
WDSS  
non-repetitive avalanche energy  
unclamped inductive load; ID = 4 A;  
16  
mJ  
VDS 100 V; VGS = 5 V; RGS = 50 ;  
starting Tsp = 25 °C  
9397 750 08277  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 02 — 18 May 2001  
2 of 13  
BUK98180-100A  
Philips Semiconductors  
TrenchMOS™ logic level FET  
03aa25  
03aa17  
120  
100  
80  
60  
40  
20  
0
120  
P
I
der  
(%)  
100  
der  
(%)  
80  
60  
40  
20  
0
0
25  
50  
75  
100 125 150 175  
o
0
25  
50  
75  
100 125 150 175  
o
T
( C)  
sp  
T
( C)  
sp  
V
GS 4.5 V  
Ptot  
Pder  
=
× 100%  
----------------------  
P
ID  
°
tot(25 C)  
Ider  
=
× 100%  
------------------  
I
°
D(25 C)  
Fig 1. Normalized total power dissipation as a  
function of solder point temperature.  
Fig 2. Normalized continuous drain current as a  
function of solder point temperature.  
03nc34  
2
10  
I
D
(A)  
R
DSon  
= V / I  
DS D  
t
= 10 us  
10  
1
p
100 us  
1 ms  
D.C.  
10 ms  
t
p
P
δ =  
100 ms  
-1  
T
10  
10  
t
t
p
T
-2  
10  
-1  
2
3
10  
1
10  
10  
V
(V)  
DS  
Tamb = 25 °C; IDM is single pulse.  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.  
9397 750 08277  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 02 — 18 May 2001  
3 of 13  
BUK98180-100A  
Philips Semiconductors  
TrenchMOS™ logic level FET  
7. Thermal characteristics  
Table 4: Thermal characteristics  
Symbol  
Rth(j-a)  
Parameter  
Conditions  
Value  
70  
Unit  
K/W  
K/W  
thermal resistance from junction to ambient  
Rth(j-sp)  
thermal resistance from junction to solder  
point  
Figure 4  
15  
7.1 Transient thermal impedance  
03nc35  
2
10  
Z
th(j-sp)  
(K/W)  
10  
1
δ = 0.5  
0.2  
0.1  
0.05  
0.02  
t
p
P
δ =  
-1  
T
10  
Single Shot  
t
t
p
T
-2  
10  
-6  
10  
-5  
10  
-4  
10  
-3  
10  
-2  
10  
-1  
10  
2
10  
1
10  
t
(s)  
p
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration.  
9397 750 08277  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 02 — 18 May 2001  
4 of 13  
BUK98180-100A  
Philips Semiconductors  
TrenchMOS™ logic level FET  
8. Characteristics  
Table 5: Characteristics  
Tj = 25 °C unless otherwise specified  
Symbol  
Static characteristics  
V(BR)DSS drain-source breakdown  
voltage  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
ID = 0.25 mA; VGS = 0 V  
Tj = 25 °C  
100  
89  
V
V
Tj = 55 °C  
VGS(th)  
gate-source threshold voltage ID = 1 mA; VDS = VGS  
Figure 9  
Tj = 25 °C  
;
1
1.5  
2
V
V
V
Tj = 150 °C  
Tj = 55 °C  
0.6  
2.3  
IDSS  
drain-source leakage current VDS = 100 V; VGS = 0 V  
Tj = 25 °C  
Tj = 150 °C  
0.05  
10  
µA  
µA  
nA  
500  
100  
IGSS  
gate-source leakage current VGS = ±10 V; VDS = 0 V  
2
RDSon  
drain-source on-state  
resistance  
VGS = 5 V; ID = 5 A;  
Figure 7 and 8  
Tj = 25 °C  
153  
180  
389  
201  
173  
mΩ  
mΩ  
mΩ  
mΩ  
Tj = 150 °C  
VGS = 4.5 V; ID = 5 A;  
VGS = 10 V; ID = 5 A;  
147  
Dynamic characteristics  
Ciss  
Coss  
Crss  
td(on)  
tr  
input capacitance  
output capacitance  
reverse transfer capacitance  
turn-on delay time  
rise time  
VGS = 0 V; VDS = 25 V;  
f = 1 MHz; Figure 12  
464  
60  
36  
7
619  
72  
50  
pF  
pF  
pF  
ns  
ns  
ns  
ns  
VDD = 30 V; RL = 1.2 ;  
VGS = 5 V; RG = 10 Ω  
89  
18  
25  
td(off)  
tf  
turn-off delay time  
fall time  
9397 750 08277  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 02 — 18 May 2001  
5 of 13  
BUK98180-100A  
Philips Semiconductors  
TrenchMOS™ logic level FET  
Table 5: Characteristics…continued  
Tj = 25 °C unless otherwise specified  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Source-drain diode  
VSD  
source-drain (diode forward) IS = 5 A; VGS = 0 V;  
0.85  
1.2  
V
voltage  
Figure 15  
trr  
reverse recovery time  
recovered charge  
IS = 20 A; dIS/dt = 100 A/µs  
VGS = 10 V; VDS = 30 V  
49  
ns  
Qr  
130  
nC  
03nc31  
25  
03nc30  
180  
DSon  
(m)  
175  
V
(V) =  
10  
GS  
R
I
D
(A)  
5
4
20  
15  
10  
5
170  
165  
160  
155  
150  
145  
3
2.2  
0
0
2
4
6
8
10  
(V)  
4
6
8
10  
V
V
(V)  
GS  
DS  
Tj = 25 °C  
Tj = 25 °C; ID = 5 A  
Fig 5. Output characteristics: drain current as a  
function of drain-source voltage; typical values.  
Fig 6. Drain-source on-state resistance as a function  
of gate-source voltage; typical values.  
03ne90  
03nc32  
2.4  
250  
a
R
2.2  
DSon  
(m)  
V
(V) =  
3
GS  
3.2  
2
1.8  
1.6  
1.4  
1.2  
1
200  
3.4  
3.6  
3.8  
4
5
150  
100  
0.8  
0.6  
0.4  
0.2  
0
0
2
4
6
8
10  
12  
-60  
-20  
20  
60  
100  
140  
180  
I
(A)  
D
o
T ( C)  
j
Tj = 25 °C  
RDSon  
a =  
---------------------------  
RDSon(25 C)  
°
Fig 7. Drain-source on-state resistance as a function  
of drain current; typical values.  
Fig 8. Normalized drain-source on-state resistance  
factor as a function of junction temperature.  
9397 750 08277  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 02 — 18 May 2001  
6 of 13  
BUK98180-100A  
Philips Semiconductors  
TrenchMOS™ logic level FET  
03aa33  
03aa36  
2.5  
-1  
10  
I
V
GS(th)  
D
(V)  
2
(A)  
-2  
10  
10  
10  
10  
10  
-3  
-4  
-5  
-6  
1.5  
1
min  
typ  
max  
0.5  
0
-60  
0
60  
120  
180  
0
0.5  
1
1.5  
2
2.5  
V
3
(V)  
T (oC)  
j
GS  
ID = 1 mA; VDS = VGS  
Tj = 25 °C; VDS = VGS  
Fig 9. Gate-source threshold voltage as a function of  
junction temperature.  
Fig 10. Sub-threshold drain current as a function of  
gate-source voltage.  
03nc28  
1200  
C (pF)  
1000  
18  
16  
14  
12  
10  
8
g
fs  
(S)  
800  
600  
Ciss  
400  
6
4
200  
2
Coss  
0
Crss  
2
0
-2  
-1  
10  
10  
1
10  
10  
(V)  
0
5
10  
15  
I
(A)  
V
DS  
D
Tj = 25 °C; VDS = 25 V  
VGS = 0 V; f = 1 MHz  
Fig 11. Forward transconductance as a function of  
drain current; typical values.  
Fig 12. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values.  
9397 750 08277  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 02 — 18 May 2001  
7 of 13  
BUK98180-100A  
Philips Semiconductors  
TrenchMOS™ logic level FET  
I
18  
16  
14  
12  
10  
8
D
(A)  
5
V
(V)  
GS  
V
= 14 V  
DD  
4
3
2
1
0
V
= 80 V  
DD  
6
4
o
T = 150  
C
j
2
o
T = 25  
C
j
0
0
1
2
3
4
0
2
4
6
8
10  
(nC)  
V
(V)  
GS  
Q
G
VDS = 25 V  
Tj = 25 °C; ID = 5 A  
Fig 13. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values.  
Fig 14. Gate-source voltage as a function of turn-on  
gate charge; typical values.  
03nc26  
15  
I
S
(A)  
10  
o
T = 150  
C
j
5
0
o
T = 25  
C
j
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
V
1.2  
(V)  
SD  
VGS = 0 V  
Fig 15. Reverse diode current as a function of reverse diode voltage; typical values.  
9397 750 08277  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 02 — 18 May 2001  
8 of 13  
BUK98180-100A  
Philips Semiconductors  
TrenchMOS™ logic level FET  
9. Package outline  
Plastic surface mounted package; collector pad for good heat transfer; 4 leads  
SOT223  
D
B
E
A
X
c
y
H
v
M
A
E
b
1
4
Q
A
A
1
L
1
2
3
p
e
b
p
w
M
B
detail X  
1
e
0
2
4 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
UNIT  
A
b
b
c
D
E
e
e
H
L
p
Q
v
w
y
p
1
1
1
E
1.8  
1.5  
0.10 0.80  
0.01 0.60  
3.1  
2.9  
0.32  
0.22  
6.7  
6.3  
3.7  
3.3  
7.3  
6.7  
1.1  
0.7  
0.95  
0.85  
mm  
4.6  
2.3  
0.2  
0.1  
0.1  
REFERENCES  
JEDEC  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
EIAJ  
SC-73  
97-02-28  
99-09-13  
SOT223  
Fig 16. SOT223 (SC-73).  
9397 750 08277  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 02 — 18 May 2001  
9 of 13  
BUK98180-100A  
Philips Semiconductors  
TrenchMOS™ logic level FET  
10. Soldering  
7.00  
3.85  
3.60  
3.50  
0.30  
solder lands  
solder resist  
occupied area  
solder paste  
1.20  
(4x)  
4
7.40  
4.80  
3.90  
7.65  
1
2
3
MSA443  
1.20 (3x)  
1.30 (3x)  
5.90  
6.15  
Dimensions in mm.  
Fig 17. Reflow soldering footprint for SOT223 (SC-73).  
11. Revision history  
Table 6: Revision history  
Rev Date  
CPCN  
Description  
Product data; initial version.  
01 20001003  
02 20010518  
-
-
Product data; second version. Updated Figure 13, Figure 8, Figure 3, and Figure 4.  
9397 750 08277  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 02 — 18 May 2001  
10 of 13  
BUK98180-100A  
Philips Semiconductors  
TrenchMOS™ logic level FET  
12. Data sheet status  
[1]  
[2]  
Data sheet status  
Product status  
Definition  
Objective data  
Development  
This data sheet contains data from the objective specification for product development. Philips Semiconductors  
reserves the right to change the specification in any manner without notice.  
Preliminary data  
Product data  
Qualification  
Production  
This data sheet contains data from the preliminary specification. Supplementary data will be published at a  
later date. Philips Semiconductors reserves the right to change the specification without notice, in order to  
improve the design and supply the best possible product.  
This data sheet contains data from the product specification. Philips Semiconductors reserves the right to  
make changes at any time in order to improve the design, manufacturing and supply. Changes will be  
communicated according to the Customer Product/Process Change Notification (CPCN) procedure  
SNW-SQ-650A.  
[1]  
[2]  
Please consult the most recently issued data sheet before initiating or completing a design.  
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at  
URL http://www.semiconductors.philips.com.  
13. Definitions  
14. Disclaimers  
Short-form specification The data in  
extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
a
short-form specification is  
Life support — These products are not designed for use in life support  
appliances, devices, or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors  
customers using or selling these products for use in such applications do so  
at their own risk and agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in accordance with  
the Absolute Maximum Rating System (IEC 60134). Stress above one or  
more of the limiting values may cause permanent damage to the device.  
These are stress ratings only and operation of the device at these or at any  
other conditions above those given in the Characteristics sections of the  
specification is not implied. Exposure to limiting values for extended periods  
may affect device reliability.  
Right to make changes — Philips Semiconductors reserves the right to  
make changes, without notice, in the products, including circuits, standard  
cells, and/or software, described or contained herein in order to improve  
design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no  
licence or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products  
are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Application information Applications that are described herein for any  
of these products are for illustrative purposes only. Philips Semiconductors  
make no representation or warranty that such applications will be suitable for  
the specified use without further testing or modification.  
9397 750 08277  
© Philips Electronics N.V. 2001 All rights reserved.  
Product data  
Rev. 02 — 18 May 2001  
11 of 13  
BUK98180-100A  
Philips Semiconductors  
TrenchMOS™ logic level FET  
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For all other countries apply to: Philips Semiconductors,  
Marketing Communications,  
Internet: http://www.semiconductors.philips.com  
Building BE, P.O. Box 218, 5600 MD EINDHOVEN,  
The Netherlands, Fax. +31 40 272 4825  
(SCA72)  
9397 750 08277  
© Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 02 — 18 May 2001  
12 of 13  
BUK98180-100A  
Philips Semiconductors  
TrenchMOS™ logic level FET  
Contents  
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4  
Transient thermal impedance . . . . . . . . . . . . . . 4  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11  
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
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7.1  
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© Philips Electronics N.V. 2001.  
Printed in The Netherlands  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior  
written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or  
contract, is believed to be accurate and reliable and may be changed without notice. No  
liability will be accepted by the publisher for any consequence of its use. Publication  
thereof does not convey nor imply any license under patent- or other industrial or  
intellectual property rights.  
Date of release: 18 May 2001  
Document order number: 9397 750 08277  

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