FBL22040BB [NXP]
3.3V BTL8-bit TTL to BTL transceiver; 3.3V BTL8位生存时间为BTL收发器
| 型号： | FBL22040BB |
| 厂家： | 
NXP |
| 描述： | 3.3V BTL8-bit TTL to BTL transceiver |
| 文件： | 总12页 (文件大小：91K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
FBL22040
3.3V BTL8-bit TTL to BTL transceiver
Product specification
IC23 Data Handbook
1998 Dec 07
Philips
Semiconductors
Philips Semiconductors
Product specification
3.3V BTL 8-bit TTL to BTL transceiver
FBL22040
FEATURES
• Resistor version of FB2040
• Controlled output ramp and multiple GND pins minimize ground
bounce
• Each BTL driver has a dedicated Bus GND for a signal return
• Glitch-free power up/power down operation
• 8-bit BTL transceivers
• Separate I/O on TTL A-port
• Inverting
• Low I current
CC
• Tight output skew
• Drives heavily loaded backplanes with equivalent load
impedances down to 10Ω.
• Supports live insertion
• High drive 100mA BTL open collector drivers on B-port
• Pins for the optional JTAG boundary scan function are provided
• High density packaging in plastic Quad Flat Pack
• Allows incident wave switching in heavily loaded backplane buses
• Reduced BTL voltage swing produces less noise and reduces
• Same pin and function as FBL2040 except for a 30Ω series
power consumption
termination resistor
• Built-in precision band-gap reference provides accurate receiver
• The A outputs include a series resistor of 30Ω making external
thresholds and improved noise immunity
terminating resistors unnecessary
• Compatible with IEEE Futurebus+ or proprietary BTL backplanes
QUICK REFERENCE DATA
SYMBOL
PARAMETER
TYPICAL
UNIT
t
t
Propagation delay
AIn to Bn
4.4
3.1
PLH
PHL
ns
t
t
Propagation delay
Bn to AOn
3.4
3.2
PLH
PHL
ns
C
Output capacitance (B0 – B7 only)
Output current (B0 – B7 only)
4
100
4
pF
OB
I
OL
mA
Standby
AIn to Bn
(outputs Low )
8
Bn to AOn
(outputs Low)
18
13
16
I
Supply current
mA
CC
AIn to Bn
(outputs High)
Bn to AOn
(outputs High)
ORDERING INFORMATION
COMMERCIAL RANGE
= 3V±10%; T = –40°C to +85°C
DRAWING
NUMBER
PACKAGES
V
CC
amb
52-pin Plastic Quad Flat Pack (QFP)
FBL22040BB
SOT379-1
ABSOLUTE MAXIMUM RATINGS
Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free-air temperature range.
SYMBOL
PARAMETER
RATING
UNIT
V
Supply voltage
Input voltage
-0.5 to +4.6
-0.5 to +7.0
-0.5 to +3.5
-18 to +5.0
-0.5 to +7.0
24, –24
V
CC
AI0 – AI7, OEB0, OEB1, OEA
V
V
IN
B0 – B7
I
IN
Input current
mA
V
V
OUT
Voltage applied to output in High output state
A0 – A7
B0 – B7
Current applied to output in Low
output state
I
mA
OUT
200
T
Operating free-air temperature range
Storage temperature
-40 to +85
-65 to +150
°C
°C
amb
T
STG
2
1998 Dec 07
853-2137 20493
Philips Semiconductors
Product specification
3.3V BTL 8-bit TTL to BTL transceiver
FBL22040
PIN CONFIGURATION
52 51 50 49 48 47 46 45 44 43 42 41 40
LOGIC GND
AI1
BUS GND
1
2
3
4
5
6
7
39
38 B1
AI2
37 BUS GND
36 B2
AO2
8-Bit Transceiver
FBL22040
35
34
33
LOGIC GND
BUS GND
AO3
B3
LOGIC GND
BUS GND
AI3
AI4
B4
8
32
31
30
29
28
52-lead PQFP
9
BUS GND
B5
10
11
12
AO4
LOGIC GND
AO5
BUS GND
B6
LOGIC GND 13
27 BUS GND
14 15 16 17 18 19 20 21 22 23 24 25 26
SG00114
or if OEB1 is High, the B-port is inactive and is at the level of the
backplane signal.
DESCRIPTION
The FBL22040 is an 8-bit bidirectional BTL transceiver and is
intended to provide the electrical interface to a high performance
wired-OR bus. The FBL22040 is an inverting transceiver.
To support live insertion, OEB0 is held Low during power on/off
cycles to insure glitch free B port drivers. Proper bias for B port
drivers during live insertion is provided by the BIAS V pin when at a
The B-port drivers are Low-capacitance open collectors with
controlled ramp and are designed to sink 100mA. Precision band
gap references on the B-port insure very good noise margins by
limiting the switching threshold to a narrow region centered at 1.55V.
3.3V level while V is Low. If live insertion is not a requirement, the
CC
BIAS V pin should be tied to a V pin.
CC
The LOGIC GND and BUS GND pins are isolated in the package to
minimize noise coupling between the BTL and TTL sides. These
pins should be tied to a common ground external to the package.
The B-port interfaces to “Backplane Transceiver Logic” (See the
IEEE 1194.1 BTL standard). BTL features low power consumption
by reducing voltage swing (1Vp-p, between 1V and 2V) and reduced
capacitive loading by placing an internal series diode on the drivers.
BTL also provides incident wave switching, a necessity for high
performance backplanes.
Each BTL driver has an associated BUS GND pin that acts as a
signal return path and these BUS GND pins are internally isolated
from each other. In the event of a ground return fault, a “hard” signal
failure occurs instead of a pattern dependent error that may be very
infrequent and impossible to trouble-shoot.
The A-port operates at TTL levels with separate I/O. The 3-state
A-port drivers are enabled when OEA goes High after an extra 6ns
delay which is built in to provide a break-before-make function.
When OEA goes Low, A-port drivers become High impedance
without any extra delay. During power on/off cycles, the A-port
The LOGIC V and BUS V pins are also isolated internally to
CC
CC
minimize noise and may be externally decoupled separately or
simply tied together.
JTAG boundary scan pins are provided with signals TMS, TCK, TDI
and TDO. TMS and TCK are no-connects (no bond wires) and TDI
and TDO are shorted together internally. Boundary scan
functionality is not implemented at this time.
drivers are held in a High impedance state when V is below 1.3V.
CC
The B-port has two output enables, OEB0 and OEB1. When OEB0
is High and OEB1 is Low the output is enabled. When OEB0 is Low
3
1998 Dec 07
Philips Semiconductors
Product specification
3.3V BTL 8-bit TTL to BTL transceiver
FBL22040
PIN DESCRIPTION
SYMBOL
PIN NUMBER
TYPE
Input
NAME AND FUNCTION
AI0 – AI7
51, 2, 3, 8, 9, 14, 18, 24
50, 52, 4, 6, 10, 12, 16, 20
Data inputs (TTL)
AO0 – AO7
Output
3-state outputs (TTL)
40, 38, 36, 34,
32, 30, 28, 26
B0 – B7
I/O
Data inputs/Open Collector outputs. High current drive (BTL)
OEB0
OEB1
46
Input
Input
Input
GND
GND
Power
Power
Power
GND
Power
Input
Input
Input
Output
NC
Enables the B outputs when High
Enables the B outputs when Low
45
OEA
47
Enables the A outputs when High
Bus ground (0V)
BUS GND
LOGIC GND
41, 39, 37, 35, 33, 31, 29, 27
1, 5, 7, 11, 13, 15
Logic ground (0V)
BUS V
23, 43
49
Positive supply voltage
CC
LOGIC V
Positive supply voltage
CC
BG V
17
Band Gap threshold voltage reference
Band Gap threshold voltage reference ground
Live insertion pre-bias pin
CC
BG GND
BIAS V
TMS
19
48
42
Test Mode Select (optional, if not implemented then no-connect)
Test Clock (optional, if not implemented then no-connect)
Test Data In (optional, if not implemented then shorted to TDO)
Test Data Out (optional, if not implemented then shorted to TDI)
No Connect
TCK
44
TDI
22
TDO
21
NC
25
FUNCTION TABLE
INPUTS
OUTPUTS
AOn
MODE
AIn
L
Bn*
—
—
—
—
X
OEB0
OEB1
OEA
L
Bn*
H**
L
H
H
H
H
L
L
L
Z
Z
L
H
L
L
AIn to Bn
L
H
H
X
H**
L
H
X
L
H
X
X
H
L
X
H
X
H
H
X
X
H**
H**
Input
Input
Input
Input
X
Disable Bn outputs
Bn to AOn
X
X
X
L
X
X
L
H
H
H
H
L
X
H
X
X
L
X
L
H
L
X
H
Disable AOn outputs
—
X
X
Z
H** = Goes to level of pull-up voltage
B*
=
Precaution should be taken to ensure B inputs do not float. If they do, they are equal to Low state.
4
1998 Dec 07
Philips Semiconductors
Product specification
3.3V BTL 8-bit TTL to BTL transceiver
FBL22040
RECOMMENDED OPERATING CONDITIONS
LIMITS
NOM
3.3
SYMBOL
V
PARAMETER
UNIT
MIN
3.0
MAX
Supply voltage
3.6
V
V
CC
Except B0–B7
B0 – B7
2.0
V
IH
High-level input voltage
1.62
1.55
Except B0–B7
B0 – B7
0.8
1.47
-18
-12
+12
100
7
V
Low-level input voltage
V
IL
I
IK
Input clamp current
mA
mA
I
High-level output current
AO0 – AO7
AO0 – AO7
B0 – B7
OH
I
OL
Low-level output current
mA
C
Output capacitance on B port
6
pF
OB
T
amb
Operating free-air temperature range
–40
+85
°C
LIVE INSERTION SPECIFICATIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
TYP
MAX
Voltage difference between the Bias voltage
and V after the PCB is plugged in.
V
Bias pin voltage
Bias pin (I ) input
–
–
0.5
V
BIASV
CC
V
V
= 0 V, Bias V = 3.6V
= 3.3V, Bias V = 3.6V
1.2
10
2.1
1
mA
µA
V
CC
BIASV
I
BIASV
DC current
CC
V
Bn
Bus voltage during prebias
Fall current during prebias
Rise current during prebias
B0 – B8 = 0V, Bias V = 3.3V
1.62
-1
I
B0 – B8 = 2V, Bias V = 1.3 to 2.5V
B0 – B8 = 1V, Bias V = 3 to 3.6V
µA
µA
LM
I
HM
Peak bus current during
insertion
V
= 0 to 3.3V, B0 – B8 = 0 to 2.0V,
CC
I
Bn
PEAK
10
mA
Bias V = 2.7 to 3.6V, OEB0 = 0.8V, t = 2ns
r
V
CC
V
CC
V
CC
= 0 to 3.3V, OEB0 = 0.8V
= 0 to 1.2V, OEB0 = 0 to 5V
= 3.3V
100
100
I
OFF
Power up current
µA
OL
t
Input glitch rejection
1.0
1.35
ns
GR
5
1998 Dec 07
Philips Semiconductors
Product specification
3.3V BTL 8-bit TTL to BTL transceiver
FBL22040
LOGIC DIAGRAM FOR FBL2040
46
OEB0
45
OEB1
47
OEA
40
38
B0
B1
51
AI0
50
AO0
2
AI1
52
AO1
36
34
B2
B3
3
AI2
4
AO2
8
AI3
6
AO3
TTL
BTL
Levels
Levels
32
B4
9
AI4
10
AO4
30
28
B5
B6
14
AI5
12
AO5
18
AI6
16
AO6
26
B7
24
AI7
20
AO7
42
TMS
44
TCK
TDI
TDO
(Future JTAG Boundary Scan option)
22
21
NC
LOGIC V
LOGIC GND
=
25
49
=
=
CC
1, 5, 7, 11, 13, 15
BUS V
CC
=
=
=
23, 43
BUS GND
BIAS V
27, 29, 31, 33, 35, 37, 39, 41
48
BG V
CC
=
=
17
19
BG GND
SG00077
6
1998 Dec 07
Philips Semiconductors
Product specification
3.3V BTL 8-bit TTL to BTL transceiver
FBL22040
DC ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature range unless otherwise noted.
LIMITS
1
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
µA
2
MIN
TYP
MAX
100
100
300
I
High level output current B0 – B7
Power-off output current B0 – B7
V
CC
V
CC
V
CC
= MAX, V = MAX, V = 1.9V
OH
IL
OH
= 0V, V = MAX, V = 1.9V
IL
OH
I
µA
OFF
= 0V, V = MAX, V = 1.9V@85°C
IL
OH
V
–0.2
CC
V
CC
= MIN to MAX; I = -100µA
V
OH
High-level output
voltage
3
3
V
AO0 – AO7
OH
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= MIN; I = -4mA
2.4
V
V
V
V
OH
= MIN; I = -12mA
2.0
OH
= MIN; I = 4mA
0.4
0.8
OL
AO0 – AO7
B0 – B7
V
Low-level output voltage
Input clamp voltage
= MIN; I = 12mA
OL
OL
= MIN, I = 4mA
0.5
OL
V
V
= MIN, I = 100mA
0.75
1.0
1.20
-1.2
±1.0
OL
V
= MIN, I = I = –18mA
–0.85
IK
I
IK
Control pins
= 3.6V; V = V or 100mV
I CC
Control/
AI0 – AI7
V
CC
= 0V or 3.6V; V = 5.5V
10
I
I
I
Input leakage current
µA
AI0 – AI7
Note 4
V
V
V
V
V
= 3.6V; V = V
CC
1
CC
I
= 3.6V; V = 100mV
–5
CC
I
= MAX, V = 1.9V
100
µA
CC
CC
CC
I
I
IH
High-level input current
B0 – B7
= MAX, V = 3.5V, note 5
100
100
I
mA
= MAX, V = 3.75V, Note 5 @ –40°C
I
I
Low-level input current
Off-state output current
Off-state output current
Supply current
B0 – B7
V
V
V
V
= MAX, V = 0.75V
-100
5
µA
µA
µA
IL
CC
CC
CC
CC
I
I
I
AO0 – AO7
AO0 – AO7
= MAX, V =3V
O
OZH
I
= MAX, V = 0.5V
-5
OZL
O
= MAX, outputs disabled, V = GND or 0.0
16
16
18
13
8
31
CCZ
I
V
CC
V
CC
V
CC
V
CC
= MAX, outputs High, V = GND or 0.0
35
39
30
16
I
I
I
CCH
CCL
Supply current (total)
Supply current (total)
B→A
A→B
= MAX, outputs Low, V = GND or 0.0
mA
I
= MAX, outputs High, V = GND or 0.0
I
I
I
CCH
CCL
= MAX, outputs Low, V = GND or 0.0
I
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operation conditions for the applicable type.
2. All typical values are at V = 3.3V, T = 25°C.
CC
A
3. Due to test equipment limitations, actual test conditions are V = 1.8V and V = 1.3V for the B side.
IH
IL
4. Unused pins are at V or GND.
CC
5. For B port input voltage between 3 and 5 volt; I will be greater than 100mA but the part will continue to function normally (clamping circuit
IH
is Active). This is not a tested condition.
7
1998 Dec 07
Philips Semiconductors
Product specification
3.3V BTL 8-bit TTL to BTL transceiver
FBL22040
AC ELECTRICAL CHARACTERISTICS INDUSTRIAL AND COMMERCIAL (A TO B)
T
= –40 to +85°C,
amb
V
T
amb
= +25°C, V = 3.3V,
CC
= 3.3V±10%,
CC
R = 9Ω
L
SYMBOL
PARAMETER
TEST CONDITION
UNIT
R = 9Ω
L
MIN
TYP
MAX
MIN
MAX
t
t
Propagation delay,
AIn to Bn
1.0
1.2
2.7
3.0
5.7
5.1
1.0
1.0
6.3
5.6
PLH
PHL
ns
ns
ns
ns
ns
ns
t
t
1.4
2.0
3.1
4.1
5.0
6.4
1.0
1.9
6.1
6.9
PLH
PHL
OEB0 to Bn
t
t
1.5
1.4
3.3
3.2
5.3
5.0
1.0
1.1
6.0
5.8
PLH
PHL
OEB1 to Bn
t
t
Transition time, Bn Port
(1.3V to 1.8V)
1.0
1.2
1.7
1.9
2.5
2.5
3.5
3.5
0.5
0.5
TLH
THL
Output skew between receivers
in same package
t
(O)
(P)
0.5
0.3
1.0
1.0
1.5
1.5
SK
Pulse skew
t
SK
|t
– t
| MAX
PHL
PLH
AC ELECTRICAL CHARACTERISTICS INDUSTRIAL AND COMMERCIAL (A TO B)
T
= –40 to +85°C,
amb
V
T
amb
= +25°C, V = 3.3V,
CC
R = 16.5Ω
L
= 3.3V±10%,
CC
SYMBOL
PARAMETER
TEST CONDITION
UNIT
R = 16.5Ω
L
MIN
TYP
MAX
MIN
MAX
t
t
Propagation delay,
AIn to Bn
1.2
1.2
2.8
2.8
4.4
4.6
1.0
1.1
5.2
5.1
PLH
PHL
ns
ns
ns
ns
ns
ns
t
t
1.8
1.8
3.6
3.8
5.6
5.9
1.2
1.7
6.5
6.2
PLH
PHL
OEB0 to Bn
t
t
1.6
1.3
3.4
3.0
6.2
4.8
1.0
1.0
6.0
5.6
PLH
PHL
OEB1 to Bn
t
t
Transition time, Bn Port
(1.3V to 1.8V)
1.0
1.2
1.7
1.9
2.5
2.5
0.5
0.5
3.0
3.0
TLH
THL
Output skew between receivers
in same package
t
(O)
(P)
0.5
0.3
1.0
1.0
1.5
1.5
SK
Pulse skew
t
SK
|t
– t
| MAX
PHL
PLH
AC ELECTRICAL CHARACTERISTICS INDUSTRIAL AND COMMERCIAL (B TO A)
T
= –40 to +85°C,
amb
V
T
amb
= +25°C, V = 3.3V
CC
= 3.3V±10%
CC
SYMBOL
PARAMETER
TEST CONDITION
UNIT
MIN
TYP
MAX
MIN
MAX
t
t
Propagation delay,
Bn to AOn
2.4
2.3
4.4
4.2
6.6
6.3
2.1
2.1
7.4
7.3
PLH
PHL
ns
ns
ns
ns
ns
ns
t
t
2.9
2.2
4.9
4.1
7.0
6.1
2.5
1.4
7.9
6.7
PLH
PHL
OEA to AOn
t
t
2.8
1.2
4.7
2.9
6.7
4.6
2.5
1.0
7.3
5.3
PLH
PHL
OEA to AOn
t
t
Transition time, AOn Port
(10% to 90% or 90% to 10%)
1.3
1.7
2.2
2.6
2.5
2.5
0.9
0.8
3.0
3.0
TLH
THL
Output skew between receivers
in same package
t
(O)
(P)
0.5
0.3
1.0
1.0
1.5
1.5
SK
Pulse skew
t
SK
|t
– t
| MAX
PHL
PLH
8
1998 Dec 07
Philips Semiconductors
Product specification
3.3V BTL 8-bit TTL to BTL transceiver
FBL22040
AC WAVEFORMS
AIn, Bn
OEB0
V
t
V
V
V
M
AIn, Bn
OEB1
M
M
M
t
t
PHL
PLH
PHL
t
PLH
V
V
M
AOn, Bn
V
V
M
M
M
AOn, Bn
Waveform 1. Propagation Delay for Data
or Output Enable to Output
Waveform 2. Propagation Delay for Data
or Output Enable to Output
V
t
AIn, Bn
M
(o)
SK
AOn, Bn
V
M
Waveform 3. Output Skews
V
t
V
M
M
OEA
AOn
V
V
OEA
AOn
M
M
PZL
t
t
t
PLZ
PZH
PHZ
V
-0.3V
OH
V
M
V
V
+0.3V
M
OL
OV
Waveform 4. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
Waveform 5. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
NOTE: V = 1.55V for Bn, V = 1.5V for all others.
SG00078
M
M
9
1998 Dec 07
Philips Semiconductors
Product specification
3.3V BTL 8-bit TTL to BTL transceiver
FBL22040
TEST CIRCUIT AND WAVEFORMS
V
CC
t
W
V
IN
BIAS
90%
90%
7.0V
V
NEGATIVE
V
V
M
M
PULSE
R
R
L
L
10%
10%
V
V
OUT
IN
LOW V
PULSE
GENERATOR
D.U.T.
t
t
(t )
r
t
(t )
f
TLH
THL
TLH
R
C
L
T
(t )
t
(t )
r
THL
f
V
IN
90%
90%
POSITIVE
PULSE
V
V
M
M
10%
10%
LOW V
t
W
Test Circuit for 3-State Outputs on A Port
SWITCH POSITION
V
= 1.55V for Bn, V = 1.5V for all others.
M
M
Input Pulse Definitions
TEST
SWITCH
t
t
closed
open
PLZ, PZL
All other
INPUT PULSE REQUIREMENTS
Family
FB+
Amplitude Low V
Rep. Rate
t
t
t
THL
W
TLH
2.0V (for R = 9 Ω)
V
U
CC
500ns 2.5ns 2.5ns
500ns 2.5ns 2.5ns
A Port
B Port
3.0V
2.0V
0.0V
1.0V
1MHz
1MHz
2.1V (for R = 16.5 Ω)
BIAS
V
U
R
U
V
V
IN
OUT
PULSE
GENERATOR
D.U.T.
R
T
C
D
DEFINITIONS:
R
C
=
=
Load Resistor; see AC CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance; see AC
CHARACTERISTICS for value.
L
L
Test Circuit for Outputs on B Port
R
C
=
=
Termination resistance should be equal to Z
Load capacitance includes jig and probe capacitance; see AC
CHARACTERISTICS for value.
of pulse generators.
T
D
OUT
R
=
Pull up resistor; see AC CHARACTERISTICS for value.
U
SG00059
10
1998 Dec 07
Philips Semiconductors
Product specification
3.3V BTL 8-bit TTL TO BTL transceiver
74FBL22040
QFP52: plastic quad flat package; 52 leads (lead length 1.6 mm); body 10 x 10 x 2.0 mm
SOT379-1
11
1998 Dec 07
Philips Semiconductors
Product specification
3.3V BTL 8-bit TTL TO BTL transceiver
74FBL22040
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 05-96
9397-750-04972
Document order number:
Philips
Semiconductors
相关型号：
FBL22040BB-T
IC FBL SERIES, 8-BIT TRANSCEIVER, INVERTED OUTPUT, PQFP52, PLASTIC, QFP-52, Bus Driver/Transceiver
NXP
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