GTL2010 [NXP]

10-bit GTL Processor Voltage Clamp; 10位GTL处理器的电压钳位
GTL2010
型号: GTL2010
厂家: NXP    NXP
描述:

10-bit GTL Processor Voltage Clamp
10位GTL处理器的电压钳位

文件: 总6页 (文件大小:56K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
GTL2010  
10-bit GTL Processor Voltage Clamp  
Product specification  
1999 Apr 05  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
10-bit GTL Processor Voltage Clamp  
GTL2010  
FEATURES  
PIN CONFIGURATION  
Direct interface with TTL level  
G
GND  
1
2
3
24  
23  
REF  
6.5ON-state connection between port S and D  
n
n
D
S
REF  
REF  
S
1
22  
D
1
DESCRIPTION  
S
2
D
2
4
5
21  
20  
The GTL2010 is a high speed 10-bit voltage clamp. The low  
ON-state resistance of the clamp allows connections to be made  
with minimal propagation delay.  
S
S
D
D
3
4
5
3
4
5
6
7
19  
18  
17  
S
S
D
D
The device is organized as one 10-bit voltage clamp. When S or D  
is low, the clamp is in the ON–state and a low resistance connection  
exists between the S and D ports. When S port and D port are high,  
the clamp is in the OFF-state and a very high impedance exists  
between the S and D ports. When port D is high, the voltage on the  
S port is clamped to the applied reference voltage on the GREF  
port.  
8
6
6
S
D
9
16  
15  
7
8
7
8
S
S
D
D
10  
11  
12  
14  
13  
9
9
S
D
10  
10  
SA00527  
QUICK REFERENCE DATA  
CONDITIONS  
= 25°C; GND = 0V  
SYMBOL  
PARAMETER  
TYPICAL  
UNIT  
T
amb  
Propagation delay  
Sn to Dn  
V
V
= 3.3V; V  
= 1.5V; unloaded  
= 2.5V;  
DD1  
REF  
DD2  
t
1.5  
7.5  
ns  
PLH  
C
Channel capacitance (OFF-state)  
V
S
= 1.5V  
pF  
OFF  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
GTL2010PW DH  
DWG NUMBER  
24-Pin Plastic TSSOP Type II  
0°C to +85°C  
GTL2010 PW  
SOT355–1  
PIN DESCRIPTION  
CLAMP SCHEMATIC  
PIN NUMBER  
SYMBOL  
NAME AND FUNCTION  
D
G
REF  
D
D
10  
REF  
1
1
GND  
Ground (0V)  
Source of reference  
transistor  
2
S
REF  
3 – 12  
S
n
Port S to Port S  
1 10  
13 – 22  
D
Port D to Port D  
1 10  
n
Drain of reference  
transistor  
23  
24  
D
REF  
REF  
Gate of reference  
transistor  
G
S
S
S
10  
REF  
1
FUNCTION TABLE  
S
N
D
SA00526  
N
L
L
H
H
H
L
Z
=
=
=
High voltage level  
Low voltage level  
High impedance “offstate  
2
1999 Apr 05  
853-2153 21178  
Philips Semiconductors  
Product specification  
10-bit GTL Processor Voltage Clamp  
GTL2010  
1, 2, 3  
ABSOLUTE MAXIMUM RATINGS  
SYMBOL  
PARAMETER  
DC source reference voltage  
DC drain reference voltage  
DC gate reference voltage  
CONDITIONS  
RATING  
–0.5 to +7.0  
–0.5 to +7.0  
–0.5 to +7.0  
–0.5 to +7.0  
–0.5 to +7.0  
–50  
UNIT  
V
V
S_REF  
D_REF  
G_REF  
V
V
V
V
V
V
DC voltage Port S  
V
Sn  
n
DC voltage Port D  
V
Dn  
n
I
DC reference diode current  
DC diode current Port S  
V < 0  
I
mA  
mA  
mA  
mA  
°C  
REFK  
I
SK  
V < 0  
I
–50  
n
I
DC diode current Port D  
V < 0  
I
–50  
DK  
n
I
DC clamp current per channel  
Storage temperature range  
Channel in ON-state  
±35  
MAX  
T
stg  
–65 to +150  
NOTE:  
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the  
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to  
absolute-maximum-rated conditions for extended periods may affect device reliability.  
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction  
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.  
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
SYMBOL  
PARAMETER  
CONDITIONS  
UNIT  
Min  
Max  
4.4  
5
V
V
DC source reference voltage  
DC drain reference voltage  
DC gate reference voltage  
1.0  
V
V
V
V
V
V
V
S_REF  
D_REF  
G_REF  
V
V
+ 0.6  
S_REF  
S_REF  
V
+ 0.6  
5
V
Sn  
V
Sn  
V
Dn  
V
Dn  
DC voltage Port S (OFF-state)  
V
5
n
S_REF  
DC voltage Port S (ON-state)  
0
0.2  
5
n
DC voltage Port D (OFF-state)  
V
n
S_REF  
DC voltage Port D (ON-state)  
0
0.4  
n
Switch input leakage current  
I
V
V
, V = 5V  
15  
µA  
S
S
D
(OFF-state) for S and D I/O  
n
n
I
G
input leakage current  
= 5V  
2.5  
µA  
°C  
I
REF  
G
T
Operating ambient temperature range In free air  
0
+85  
amb  
3
1999 Apr 05  
Philips Semiconductors  
Product specification  
10-bit GTL Processor Voltage Clamp  
GTL2010  
DC CHARACTERISTICS for V  
= 3.0 to 3.6V; V  
= 2.36 to 2.64V; V  
= 1.365 to 1.635V range  
DD1  
DD2  
REF  
Over recommended operating conditions. Voltage are referenced to GND (ground = 0V). Refer to the Test Circuit diagram.  
LIMITS  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
T
amb  
= 0°C to +85°C  
UNIT  
1
Min  
Typ  
Max  
V
OL  
LOW level output voltage  
V
S
= 0.175V; I = 15.2mA  
CLAMP  
260  
350  
mV  
NOTE:  
1. All typical values are measured at V  
= 3.3V, V  
= 2.5V, V  
= 1.5V and T  
= 25 C  
DD1  
DD2  
REF  
amb  
AC CHARACTERISTICS for V  
= 3.0 to 3.6V; V  
= 2.36 to 2.64V; V  
= 1.365 to 1.635V range  
DD1  
DD2  
REF  
GND = 0V; t = t 3.0ns Refer to the Test Circuit diagram.  
r
f
LIMITS  
SYMBOL  
PARAMETER  
WAVEFORM  
T
amb  
= 0 to +85°C  
UNIT  
1
MIN  
TYP  
MAX  
Propagation delay  
Sn to Dn; Dn to Sn  
2
t
0.5  
1.5  
5.5  
ns  
PLH  
NOTE:  
1. All typical values are measured at V  
= 3.3V, V  
= 2.5V, V  
= 1.5V and T  
= 25 C  
DD1  
DD2  
REF  
amb  
2. Propagation delay guaranteed by characterization  
3. C of 30pF and a C of 15pF is guaranteed by design  
ON,MAX  
OFF,MAX  
AC WAVEFORMS  
TEST CIRCUIT  
V
V
V
V
DD2  
DD1  
DD2  
DD2  
V
I
150Ω  
150Ω  
150Ω  
200K  
INPUT  
GND  
V
V
M
M
DUT  
t
t
PLH  
PHL  
0
0
V
DD2  
OUTPUT  
HIGH-to-LOW  
LOW-to-HIGH  
D
G
REF  
D
D
10  
REF  
1
V
t
M
V
t
M
V
OL  
PHL  
PLH  
t
PHL  
t
PLH  
1
1
V
DD2  
OUTPUT  
HIGH-to-LOW  
LOW-to-HIGH  
S
REF  
V
S
S
10  
M
1
V
M
V
OL  
SA00524  
V
REF  
Waveform 1. The Input (S ) to Output (D ) Propagation Delays  
n
n
PULSE  
GENERATOR  
SA00525  
Waveform 2. Load circuit  
4
1999 Apr 05  
Philips Semiconductors  
Product specification  
10-bit GTL Processor Voltage Clamp  
GTL2010  
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm  
SOT355-1  
5
1999 Apr 05  
Philips Semiconductors  
Product specification  
10-bit GTL Processor Voltage Clamp  
GTL2010  
Data sheet status  
[1]  
Data sheet  
status  
Product  
status  
Definition  
Objective  
specification  
Development  
This data sheet contains the design target or goal specifications for product development.  
Specification may change in any manner without notice.  
Preliminary  
specification  
Qualification  
This data sheet contains preliminary data, and supplementary data will be published at a later date.  
Philips Semiconductors reserves the right to make chages at any time without notice in order to  
improve design and supply the best possible product.  
Product  
specification  
Production  
This data sheet contains final specifications. Philips Semiconductors reserves the right to make  
changes at any time without notice in order to improve design and supply the best possible product.  
[1] Please consult the most recently issued datasheet before initiating or completing a design.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or  
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended  
periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips  
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or  
modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications  
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.  
RighttomakechangesPhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard  
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 1998  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
print code  
Date of release: 10-98  
9397-750-05519  
Document order number:  
Philips  
Semiconductors  

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