HEC4093BT-112_技术文档

HEF4093B

Quad 2-input NAND Schmitt trigger

Rev. 8 — 21 November 2011

Product data sheet

1. General description

The HEF4093B is a quad two-input NAND gate. Each input has a Schmitt trigger circuit.

The gate switches at different points for positive-going and negative-going signals. The

difference between the positive voltage (V_T+) and the negative voltage (V_T) is defined as

hysteresis voltage (V_H).

It operates over a recommended V_DDpower supply range of 3 V to 15 V referenced to V_SS

(usually ground). Unused inputs must be connected to V_DD, V_SS, or another input.

2. Features and benefits

 Schmitt trigger input discrimination

 Fully static operation

 5 V, 10 V, and 15 V parametric ratings

 Standardized symmetrical output characteristics

 Specified from40 C to +85 C and 40 C to +125 C

 Complies with JEDEC standard JESD 13-B

3. Applications

 Wave and pulse shapers

 Astable multivibrators

 Monostable multivibrators

4. Ordering information

Table 1.

Ordering information

All types operate from 40 C to +125 C

Type number

Package

Name

Description

Version

HEF4093BP

HEF4093BT

DIP14

SO14

plastic dual in-line package; 14 leads (300 mil)

plastic small outline package; 14 leads; body width 3.9 mm

SOT27-1

SOT108-1

HEF4093B

NXP Semiconductors

Quad 2-input NAND Schmitt trigger

5. Functional diagram

1

1A

3

4

1Y

2Y

3Y

4Y

2

1B

5

2A

6

2B

nA

nB

nY

8

3A

001aag105

10

11

9

3B

12

4A

13

4B

001aag104

Fig 1. Functional diagram

Fig 2. Logic diagram (one gate)

6. Pinning information

6.1 Pinning

1

2

3

4

5

6

7

14

13

12

11

10

9

1A

1B

1Y

2Y

2A

2B

V

DD

4B

4A

4Y

3Y

3B

3A

HEF4093B

V

SS

8

001aag106

Fig 3. Pin configuration

HEF4093B

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Product data sheet

Rev. 8 — 21 November 2011

2 of 15

HEF4093B

NXP Semiconductors

Quad 2-input NAND Schmitt trigger

6.2 Pin description

Table 2.

Symbol

1A to 4A

1B to 4B

1Y to 4Y

V_DD

Pin description

Description

input

1, 5, 8, 12

2, 6, 9, 13

3, 4, 10, 11

14

input

output

supply voltage

ground (0 V)

V_SS

7

7. Functional description

Table 3.

Function table^[1]

Input

nA

L

Output

nB

L

nY

H

L

H

L

H

L

[1] H = HIGH voltage level; L = LOW voltage level.

8. Limiting values

Table 4.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V_SS= 0 V (ground).

Symbol Parameter

Conditions

Min

0.5

-

Max

+18

Unit

V

V_DD

I_IK

supply voltage

input clamping current

input voltage

V_I< 0.5 V or V_I> V_DD+ 0.5 V

V_O< 0.5 V or V_O> V_DD+ 0.5 V

10

mA

V

V_I

0.5

-

V_DD+ 0.5

10

I_OK

I_I/O

output clamping current

input/output current

supply current

mA

C

-

10

I_DD

T_stg

T_amb

P_tot

-

50

storage temperature

ambient temperature

total power dissipation

65

40

+150

+125

C

T_amb= 40 C to +125 C

[1]

[2]

DIP14

SO14

-

750

500

100

mW

P

power dissipation

per output

[1] For DIP14 packages: above T_amb= 70 C, P_totderates linearly with 12 mW/K.

[2] For SO14 packages: above T_amb= 70 C, P_totderates linearly with 8 mW/K.

HEF4093B

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Product data sheet

Rev. 8 — 21 November 2011

3 of 15

HEF4093B

NXP Semiconductors

Quad 2-input NAND Schmitt trigger

9. Recommended operating conditions

Table 5.

Symbol

V_DD

Recommended operating conditions

Parameter

Conditions

Min

3

Max

15

Unit

V

supply voltage

V_I

input voltage

0

V_DD

+125

V

T_amb

ambient temperature

in free air

40

C

10. Static characteristics

Table 6.

Static characteristics

V_SS= 0 V; V_I= V_SSor V_DD; unless otherwise specified.

Symbol Parameter

Conditions

V_DD

T_amb= 40 C T_amb= +25 C T_amb= +85 C T_amb= +125 C Unit

Min

Max

-

Min

Max

-

Min

Max

-

Min

Max

-

V_OH

HIGH-level

output voltage

I_O < 1 A

5 V

10 V

15 V

5 V

4.95

V

9.95

-

9.95

-

9.95

-

9.95

-

14.95

-

14.95

-

14.95

-

14.95

-

V_OL

LOW-level

output voltage

-

0.05

1.7

0.64

1.6

4.2

-

0.05

1.4

0.5

1.3

3.4

-

0.05

1.1

0.36

0.9

2.4

-

0.05

10 V

15 V

5 V

-

I_OH

HIGH-level

output current

V_O= 2.5 V

V_O= 4.6 V

V_O= 9.5 V

V_O= 13.5 V

V_O= 0.4 V

V_O= 0.5 V

V_O= 1.5 V

-

1.1 mA

0.36 mA

0.9 mA

2.4 mA

5 V

-

10 V

15 V

5 V

-

I_OL

LOW-level

output current

0.64

1.6

4.2

-

0.5

1.3

3.4

-

0.36

0.9

2.4

-

0.36

0.9

2.4

-

mA

10 V

15 V

-

I_I

input leakage

current

0.1

1.0

1.0 A

I_DD

supply current all valid input

combinations;

5 V

10 V

15 V

-

0.25

0.5

1.0

-

0.25

0.5

-

7.5

15.0

30.0

-

7.5 A

15.0 A

30.0 A

I_O= 0 A

1.0

C_I

input

7.5

-

pF

capacitance

HEF4093B

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Product data sheet

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4 of 15

HEF4093B

NXP Semiconductors

Quad 2-input NAND Schmitt trigger

11. Dynamic characteristics

Table 7.

Dynamic characteristics

T

_amb= 25 C; C_L= 50 pF; t_r= t_f 20 ns; wave forms see Figure 4; test circuit see Figure 5; unless otherwise specified.

Symbol Parameter

Conditions

V_DD

Extrapolation formula^[1]Min

Typ

90

40

30

85

40

30

60

30

20

60

30

20

Max

185

80

Unit

ns

t_PHL

HIGH to LOW

nA or nB to nY 5 V

63 ns + (0.55 ns/pF)C_L

29 ns + (0.23 ns/pF)C_L

22 ns + (0.16 ns/pF)C_L

58 ns + (0.55 ns/pF)C_L

29 ns + (0.23 ns/pF)C_L

22 ns + (0.16 ns/pF)C_L

10 ns + (1.00 ns/pF)C_L

9 ns + (0.42 ns/pF)C_L

6 ns + (0.28 ns/pF)C_L

10 ns + (1.00 ns/pF)C_L

9 ns + (0.42 ns/pF)C_L

6 ns + (0.28 ns/pF)C_L

-

propagation delay

10 V

15 V

nA or nB to nY 5 V

10 V

60

t_PLH

t_THL

t_TLH

LOW to HIGH

propagation delay

170

80

15 V

60

HIGH to LOW output

transition time

nY to LOW

5 V

10 V

15 V

5 V

120

60

40

LOW to HIGH output

transition time

nA or nB to

HIGH

120

60

10 V

15 V

40

[1] Typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (C_Lin pF).

Table 8.

Dynamic power dissipation

V_SS= 0 V; t_r= t_f 20 ns; T_amb= 25 C.

Symbol Parameter

V_DD

5 V

Typical formula

where:

P_D

dynamic power

dissipation

P_D= 1300  f_i+ (f_o C_L)  V_DD²(W)

P_D= 6400  f_i+ (f_o C_L)  V_DD²(W)

P_D= 18700  f_i+ (f_o C_L)  V_DD²(W)

f_i= input frequency in MHz;

f_o= output frequency in MHz;

10 V

15 V

C_L= output load capacitance in pF;

(f_o C_L) = sum of the outputs;

V_DD= supply voltage in V.

HEF4093B

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Product data sheet

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HEF4093B

NXP Semiconductors

Quad 2-input NAND Schmitt trigger

12. Waveforms

t

f

r

V

I

90 %

input

V

M

10 %

0 V

t

PLH

PHL

V

OH

90 %

output

V

M

10 %

V

OL

t

THL

TLH

001aag197

Measurement points are given in Table 9.

Logic levels: V_OLand V_OHare typical output voltage levels that occur with the output load.

t_r, t_f= input rise and fall times.

Fig 4. Propagation delay and output transition time

Table 9.

Measurement points

Supply voltage

V_DD

Input

V_M

Output

V_M

5 V to 15 V

0.5V_DD

V

DD

V

O

I

G

DUT

C

L

R

T

001aag182

Test data given in Table 10.

Definitions for test circuit:

DUT = Device Under Test.

C_L= load capacitance including jig and probe capacitance.

R_T= termination resistance should be equal to the output impedance Z_oof the pulse generator.

Fig 5. Test circuit

Table 10. Test data

Supply voltage

V_DD

Input

Load

C_L

V_I

t_r, t_f

5 V to 15 V

V_SSor V_DD

 20 ns

50 pF

HEF4093B

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Product data sheet

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6 of 15

HEF4093B

NXP Semiconductors

Quad 2-input NAND Schmitt trigger

13. Transfer characteristics

Table 11. Transfer characteristics

V_SS= 0 V; T_amb= 25 C; see Figure 6 and Figure 7.

Symbol Parameter Conditions

V_DD

5 V

Min

1.9

3.6

4.7

1.5

3

Typ

2.9

5.2

7.3

2.2

4.2

6.0

0.7

1.0

1.3

Max Unit

V_T+

V_T

V_H

positive-going threshold voltage

3.5

7

V

10 V

15 V

5 V

11

3.1

6.4

10.3

-

negative-going threshold voltage

hysteresis voltage

10 V

15 V

5 V

4

0.4

0.6

0.7

10 V

15 V

-

V

O

V

T+

V

I

V

H

V

T−

V

I

V

O

V

H

V

T+

T−

001aag107

001aag108

Fig 6. Transfer characteristic

Fig 7. Waveforms showing definition of V_T+and V_T

(between limits at 30 % and 70 %) and V_H

HEF4093B

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Product data sheet

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7 of 15

HEF4093B

NXP Semiconductors

Quad 2-input NAND Schmitt trigger

001aag109

001aag110

200

1000

I

DD

(μA)

100

500

0

2.5

5

0

5

10

V (V)

I

V (V)

I

a. V_DD= 5 V; T_amb= 25 C

b. V_DD= 10 V; T_amb= 25 C

001aag111

2000

I

DD

(μA)

1000

0

10

20

V (V)

I

c. V_DD= 15 V; T_amb= 25 C

Fig 8. Typical drain current as a function of input

HEF4093B

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Product data sheet

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8 of 15

HEF4093B

NXP Semiconductors

Quad 2-input NAND Schmitt trigger

001aag112

10

V

I

(V)

V

T+

T−

5

0

2.5

5

7.5

10

12.5

15

17.5

V

(V)

DD

T_amb= 25 C.

Fig 9. Typical switching levels as a function of supply voltage

14. Application information

Some examples of applications for the HEF4093B are:

• Wave and pulse shapers

• Astable multivibrators

• Monostable multivibrators

C

p

V

DD

14

R

1

2

1

2

3

V

DD

C

7

001aag113

001aag114

Fig 10. Astable multivibrator

Fig 11. Schmitt trigger driven via a

high-impedance input

If a Schmitt trigger is driven via a high-impedance (R > 1 k), then it is necessary to

V

_DD– V_SS

C

incorporate a capacitor C with a value of ------ > ------------------------ ; otherwise oscillation can occur

C_PV_H

on the edges of a pulse.

C_pis the external parasitic capacitance between inputs and output; the value depends on

the circuit board layout.

Remark: The two inputs may be connected together, but this will result in a larger

through-current at the moment of switching.

HEF4093B

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Product data sheet

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9 of 15

HEF4093B

NXP Semiconductors

Quad 2-input NAND Schmitt trigger

15. Package outline

DIP14: plastic dual in-line package; 14 leads (300 mil)

SOT27-1

D

M

E

A

2

A

1

L

c

e

w M

Z

b

1

(e )

1

b

M

H

14

8

pin 1 index

E

1

7

0

5

10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

(1)

A

2

(1)

Z

1

UNIT

mm

b

c

D

E

e

L

M

H

w

1

E

max.

min.

max.

1.73

1.13

0.53

0.38

0.36

0.23

19.50

18.55

6.48

6.20

3.60

3.05

8.25

7.80

10.0

8.3

4.2

0.51

3.2

2.54

0.1

7.62

0.3

0.254

0.01

2.2

0.068

0.044

0.021

0.015

0.014

0.009

0.77

0.73

0.26

0.24

0.14

0.12

0.32

0.31

0.39

0.33

inches

0.17

0.02

0.13

0.087

Note

1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

99-12-27

03-02-13

SOT27-1

050G04

MO-001

SC-501-14

Fig 12. Package outline SOT27-1 (DIP14)

HEF4093B

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Product data sheet

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10 of 15

HEF4093B

NXP Semiconductors

Quad 2-input NAND Schmitt trigger

SO14: plastic small outline package; 14 leads; body width 3.9 mm

SOT108-1

D

E

A

X

v

c

y

H

M

A

E

Z

8

14

Q

A

2

A

(A )

3

A

1

pin 1 index

θ

L

p

L

1

7

e

detail X

w

M

b

p

0

2.5

scale

5 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A

(1)

UNIT

A

b

c

D

E

e

H

L

p

Q

v

w

y

Z

θ

1

2

3

p

E

max.

0.25

0.10

1.45

1.25

0.49

0.36

0.25

0.19

8.75

8.55

4.0

3.8

6.2

5.8

1.0

0.4

0.7

0.6

0.7

0.3

mm

1.75

1.27

0.05

1.05

0.25

0.01

0.25

0.1

0.25

0.01

8^o

0^o

0.010 0.057

0.004 0.049

0.019 0.0100 0.35

0.014 0.0075 0.34

0.16

0.15

0.244

0.228

0.039 0.028

0.016 0.024

0.028

0.012

inches

0.041

0.01 0.004

0.069

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

99-12-27

03-02-19

SOT108-1

076E06

MS-012

Fig 13. Package outline SOT108-1 (SO14)

HEF4093B

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Product data sheet

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11 of 15

HEF4093B

NXP Semiconductors

Quad 2-input NAND Schmitt trigger

16. Revision history

Table 12. Revision history

Document ID

Release date

20111121

Data sheet status

Change notice

Supersedes

HEF4093B v.8

Modifications:

Product data sheet

-

HEF4093B v.7

• Table 6: I_OHminimum values changed to maximum

HEF4093B v.7

HEF4093B v.6

HEF4093B v.5

HEF4093B v.4

HEF4093B_CNV v.3

HEF4093B_CNV v.2

20100901

20091202

20090728

20080612

19950101

Product data sheet

Product specification

-

HEF4093B v.6

HEF4093B v.5

HEF4093B v.4

HEF4093B_CNV v.3

HEF4093B_CNV v.2

-

HEF4093B

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Quad 2-input NAND Schmitt trigger

17. Legal information

17.1 Data sheet status

Document status^[1][2]

Product status^[3]

Development

Definition

Objective [short] data sheet

This document contains data from the objective specification for product development.

This document contains data from the preliminary specification.

This document contains the product specification.

Preliminary [short] data sheet Qualification

Product [short] data sheet Production

[1]

[2]

[3]

Please consult the most recently issued document before initiating or completing a design.

The term ‘short data sheet’ is explained in section “Definitions”.

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

malfunction of an NXP Semiconductors product can reasonably be expected

17.2 Definitions

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liability for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

Customers are responsible for the design and operation of their applications

and products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suitable and fit for the customer’s applications and

products planned, as well as for the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to offer functions and qualities beyond those described in the

Product data sheet.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessary

testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

17.3 Disclaimers

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequential damages (including - without limitation - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

No offer to sell or license — Nothing in this document may be interpreted or

construed as an offer to sell products that is open for acceptance or the grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

HEF4093B

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 8 — 21 November 2011

13 of 15

HEF4093B

NXP Semiconductors

Quad 2-input NAND Schmitt trigger

Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualified,

the product is not suitable for automotive use. It is neither qualified nor tested

in accordance with automotive testing or application requirements. NXP

Semiconductors accepts no liability for inclusion and/or use of

NXP Semiconductors’ specifications such use shall be solely at customer’s

own risk, and (c) customer fully indemnifies NXP Semiconductors for any

liability, damages or failed product claims resulting from customer design and

use of the product for automotive applications beyond NXP Semiconductors’

standard warranty and NXP Semiconductors’ product specifications.

non-automotive qualified products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in

automotive applications to automotive specifications and standards, customer

(a) shall use the product without NXP Semiconductors’ warranty of the

product for such automotive applications, use and specifications, and (b)

whenever customer uses the product for automotive applications beyond

17.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

18. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

HEF4093B

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 8 — 21 November 2011

14 of 15

HEF4093B

NXP Semiconductors

Quad 2-input NAND Schmitt trigger

19. Contents

1

2

3

4

5

General description . . . . . . . . . . . . . . . . . . . . . . 1

Features and benefits . . . . . . . . . . . . . . . . . . . . 1

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Ordering information. . . . . . . . . . . . . . . . . . . . . 1

Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

6

6.1

6.2

Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

7

Functional description . . . . . . . . . . . . . . . . . . . 3

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3

Recommended operating conditions. . . . . . . . 4

Static characteristics. . . . . . . . . . . . . . . . . . . . . 4

Dynamic characteristics . . . . . . . . . . . . . . . . . . 5

Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Transfer characteristics . . . . . . . . . . . . . . . . . . 7

Application information. . . . . . . . . . . . . . . . . . . 9

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12

8

9

10

11

12

13

14

15

16

17

Legal information. . . . . . . . . . . . . . . . . . . . . . . 13

Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13

Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14

17.1

17.2

17.3

17.4

18

19

Contact information. . . . . . . . . . . . . . . . . . . . . 14

Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 21 November 2011

Document identifier: HEF4093B


型号：	HEC4093BT-112
厂家：	NXP
描述：	FBQuad 2-input NAND Schmitt trigger FBQuad二输入NAND施密特触发器触发器
文件：	总15页 (文件大小：158K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

HEC4093BT-112 [NXP]

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