HEF4052BT,652 [NXP]
HEF4052B - Dual 4-channel analog multiplexer/demultiplexer SOP 16-Pin;
| 型号： | HEF4052BT,652 |
| 厂家： | 
NXP |
| 描述： | HEF4052B - Dual 4-channel analog multiplexer/demultiplexer SOP 16-Pin PC 光电二极管 |
| 文件： | 总9页 (文件大小：114K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
• The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF4052B
MSI
Dual 4-channel analogue
multiplexer/demultiplexer
January 1995
Product specification
File under Integrated Circuits, IC04
Philips Semiconductors
Product specification
HEF4052B
MSI
Dual 4-channel analogue multiplexer/demultiplexer
Both multiplexers/demultiplexers
contain four bidirectional analogue
switches, each with one side
connected to an independent
input/output (Y0 to Y3) and the other
side connected to a common
input/output (Z).
VDD and VSS are the supply voltage
connections for the digital control
inputs (A0, A1 and E). The VDD to
VSS range is 3 to 15 V. The analogue
inputs/outputs (Y0 to Y3, and Z) can
swing between VDD as a positive limit
and VEE as a negative limit.
DESCRIPTION
The HEF4052B is a dual 4-channel
analogue multiplexer/demultiplexer
with common channel select logic.
Each multiplexer/demultiplexer has
four independent inputs/outputs
(Y0 to Y3) and a common input/output
(Z). The common channel select logic
includes two address inputs (A0 and
A1) and an active LOW enable input
(E).
VDD − VEE may not exceed 15 V.
With E LOW, one of the four switches
is selected (low impedance ON-state)
by A0 and A1. With E HIGH, all
switches are in the high impedance
OFF-state, independent of A0 and A1.
For operation as a digital
multiplexer/demultiplexer, VEE is
connected to VSS (typically ground).
PINNING
0A to Y3A independent inputs/outputs
Y0B to Y3B independent inputs/outputs
Y
A0, A1
E
address inputs
enable input (active LOW)
common inputs/outputs
ZA, ZB
FAMILY DATA,
DD LIMITS category MSI
I
See Family Specifications
Fig.2 Pinning diagram.
HEF4052BP(N): 16-lead DIL; plastic
(SOT38-1)
HEF4052BD(F): 16-lead DIL; ceramic
(cerdip)
(SOT74)
HEF4052BT(D): 16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
Fig.1 Functional diagram.
January 1995
2
Philips Semiconductors
Product specification
HEF4052B
MSI
Dual 4-channel analogue multiplexer/demultiplexer
Fig.3 Schematic diagram (one switch).
FUNCTION TABLE
INPUTS
A1
CHANNEL
ON
E
A0
L
L
L
L
H
L
L
L
H
L
Y0A−ZA; Y0B−ZB
Y1A−ZA; Y1B−ZB
Y2A−ZA; Y2B−ZB
Y3A−ZA; Y3B−ZB
none
H
H
X
H
X
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Supply voltage (with reference to VDD
)
VEE
−18 to + 0,5 V
Note
1. To avoid drawing VDD current out of terminal Z, when switch current flows into terminals Y, the voltage drop across
the bidirectional switch must not exceed 0,4 V. If the switch current flows into terminal Z, no VDD current will flow out
of terminals Y, in this case there is no limit for the voltage drop across the switch, but the voltages at Y and Z may
not exceed VDD or VEE
.
January 1995
3
Philips Semiconductors
Product specification
HEF4052B
MSI
Dual 4-channel analogue multiplexer/demultiplexer
Fig.4 Logic diagram.
January 1995
4
Philips Semiconductors
Product specification
HEF4052B
MSI
Dual 4-channel analogue multiplexer/demultiplexer
DC CHARACTERISTICS
Tamb = 25 °C
V
DD−VEE
V
SYMBOL
TYP.
MAX.
CONDITIONS
5
10
15
5
350
80
60
115
50
40
120
65
50
25
10
5
2500
245
175
340
160
115
365
200
155
−
Ω
Vis = 0 to VDD−VEE
see Fig.6
ON resistance
ON resistance
ON resistance
RON
Ω
Ω
Ω
Vis = 0
see Fig.6
10
15
5
RON
RON
∆RON
IOZZ
IOZY
Ω
Ω
Ω
Vis = VDD−VEE
see Fig.6
10
15
5
Ω
Ω
‘∆’ ON resistance
between any two
channels
Ω
Vis = 0 to VDD−VEE
see Fig.6
10
15
5
−
Ω
−
Ω
OFF-state leakage
current, all
−
−
nA
nA
nA
nA
nA
nA
10
15
5
−
−
E at VDD
E at VSS
channels OFF
OFF-state leakage
current, any
−
1000
−
−
10
15
−
−
channel
−
200
Fig.5 Operating area as a function of the supply voltages.
January 1995
5
Philips Semiconductors
Product specification
HEF4052B
MSI
Dual 4-channel analogue multiplexer/demultiplexer
Fig.6 Test set-up for measuring RON
.
Iis = 200 µA
VSS = VEE = 0 V
Fig.7 Typical RON as a function of input voltage.
January 1995
6
Philips Semiconductors
Product specification
HEF4052B
MSI
Dual 4-channel analogue multiplexer/demultiplexer
AC CHARACTERISTICS
VEE = VSS = 0 V; Tamb = 25 °C; input transition times ≤ 20 ns
VDD
V
TYPICAL FORMULA FOR P (µW)
2
2
2
Dynamic power
5
1 300 fi + ∑(foCL) × VDD
6 100 fi + ∑(foCL) × VDD
15 600 fi + ∑(foCL) × VDD
where
dissipation per
package (P)
10
15
fi = input freq. (MHz)
fo = output freq. (MHz)
CL = load capacitance (pF)
∑(foCL) = sum of outputs
V
DD = supply voltage (V)
AC CHARACTERISTICS
VEE = VSS = 0 V; Tamb = 25 °C; input transition times ≤ 20 ns
VDD
SYMBOL
V
TYP.
MAX.
Propagation delays
Vis → Vos
HIGH to LOW
5
10
15
5
10
5
20
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tPHL
tPLH
tPHL
tPLH
note 1
note 1
note 2
note 2
5
10
10
5
20
LOW to HIGH
10
15
5
10
5
10
An → Vos
150
65
50
150
75
50
305
135
100
300
150
100
HIGH to LOW
10
15
5
LOW to HIGH
10
15
Output disable times
E → Vos
5
10
15
5
95
90
190
180
180
205
180
180
ns
ns
ns
ns
ns
ns
HIGH
tPHZ
note 3
note 3
90
100
90
LOW
10
15
tPLZ
90
Output enable times
E → Vos
5
10
15
5
130
55
260
115
85
ns
ns
ns
ns
ns
ns
HIGH
tPZH
note 3
note 3
45
120
50
240
100
75
LOW
10
15
tPZL
35
January 1995
7
Philips Semiconductors
Product specification
HEF4052B
MSI
Dual 4-channel analogue multiplexer/demultiplexer
VDD
V
SYMBOL
TYP.
MAX.
Distortion, sine-wave
response
5
0,25
0,04
0,04
−
%
10
15
5
%
note 4
%
Crosstalk between
any two channels
MHz
10
15
5
1
MHz note 5
MHz
−
Crosstalk; enable
or address input
to output
−
mV
10
15
5
50
−
mV
note 6
mV
OFF-state
−
MHz
feed-through
10
15
5
1
MHz note 7
MHz
−
ON-state frequency
response
13
40
70
MHz
10
15
MHz note 8
MHz
Notes
Vis is the input voltage at a Y or Z terminal, whichever is assigned as input.
Vos is the output voltage at a Y or Z terminal, whichever is assigned as output.
1. RL = 10 kΩ to VEE; CL = 50 pF to VEE; E = VSS; Vis = VDD (square-wave); see Fig.8.
2. RL = 10 kΩ; CL = 50 pF to VEE; E = VSS; An = VDD (square-wave); Vis = VDD and RL to VEE for tPLH; Vis = VEE and
RL to VDD for tPHL; see Fig.8.
3. RL = 10 kΩ; CL = 50 pF to VEE; E = VDD (square-wave);
Vis = VDD and RL to VEE for tPHZ and tPZH
;
Vis = VEE and RL to VDD for tPLZ and tPZL; see Fig.8.
4. RL = 10 kΩ; CL = 15 pF; channel ON; Vis = 1⁄2 VDD (p-p) (sine-wave, symmetrical about 1⁄2 VDD);
fis = 1 kHz; see Fig.9.
5. RL = 1 kΩ; Vis = 1⁄2 VDD (p-p) (sine-wave, symmetrical about 1⁄2 VDD);
Vos
--------
20 log
= –50 dB; see Fig. 10.
Vis
6. RL = 10 kΩ to VEE; CL = 15 pF to VEE; E or An = VDD (square-wave); crosstalk is Vos (peak
value); see Fig.8.
7. RL = 1 kΩ; CL = 5 pF; channel OFF; Vis = 1⁄2 VDD (p-p) (sine-wave, symmetrical about 1⁄2 VDD);
Vos
--------
20 log
= –50 dB; see Fig. 9.
Vis
8. RL = 1 kΩ; CL = 5 pF; channel ON; Vis = 1⁄2 VDD (p-p) (sine-wave, symmetrical about 1⁄2 VDD);
Vos
--------
20 log
= –3 dB; see Fig. 9.
Vis
January 1995
8
Philips Semiconductors
Product specification
HEF4052B
MSI
Dual 4-channel analogue multiplexer/demultiplexer
Fig.8
Fig.9
(a)
(b)
Fig.10
APPLICATION INFORMATION
Some examples of applications for the HEF4052B are:
• Analogue multiplexing and demultiplexing.
• Digital multiplexing and demultiplexing.
• Signal gating.
NOTE
If break before make is needed, then it is necessary to use the enable input.
January 1995
9
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