HEF4053

更新时间:2024-10-29 03:16:14
品牌:NXP
描述:Triple 2-channel analogue multiplexer/demultiplexer

HEF4053 概述

Triple 2-channel analogue multiplexer/demultiplexer 三重2通道模拟多路复用器/多路分解器

HEF4053 数据手册

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INTEGRATED CIRCUITS  
DATA SHEET  
For a complete data sheet, please also download:  
The IC04 LOCMOS HE4000B Logic  
Family Specifications HEF, HEC  
The IC04 LOCMOS HE4000B Logic  
Package Outlines/Information HEF, HEC  
HEF4053B  
MSI  
Triple 2-channel analogue  
multiplexer/demultiplexer  
January 1995  
Product specification  
File under Integrated Circuits, IC04  
Philips Semiconductors  
Product specification  
Triple 2-channel analogue  
multiplexer/demultiplexer  
HEF4053B  
MSI  
With E LOW, one of the two switches is selected (low  
impedance ON-state) by Sn. With E HIGH, all switches are  
in the high impedance OFF-state, independent of SA to SC.  
DESCRIPTION  
The HEF4053B is a triple 2-channel analogue  
multiplexer/demultiplexer with a common enable input (E).  
Each multiplexer/demultiplexer has two independent  
inputs/outputs (Y0 and Y1), a common input/output (Z),  
and select inputs (Sn). Each also contains two-bidirectional  
analogue switches, each with one side connected to an  
independent input/output (Y0 and Y1) and the other side  
connected to a common input/output (Z).  
VDD and VSS are the supply voltage connections for the  
digital control inputs (SA to SC and E).  
The VDD to VSS range is 3 to 15 V. The analogue  
inputs/outputs (Y0, Y1 and Z) can swing between VDD as a  
positive limit and VEE as a negative limit. VDDVEE may not  
exceed 15 V.  
For operation as a digital multiplexer/demultiplexer, VEE is  
connected to VSS (typically ground).  
Fig.1 Functional diagram.  
FAMILY DATA, IDD LIMITS category MSI  
See Family Specifications  
January 1995  
2
Philips Semiconductors  
Product specification  
Triple 2-channel analogue  
multiplexer/demultiplexer  
HEF4053B  
MSI  
PINNING  
Y0A to Y0C  
Y1A to Y1C  
SA to SC  
E
independent inputs/outputs  
independent inputs/outputs  
select inputs  
enable input (active LOW)  
common inputs/outputs  
ZA to ZC  
FUNCTION TABLE  
Fig.2 Pinning diagram.  
INPUTS  
E
CHANNEL  
ON  
Sn  
L
L
L
H
X
Y
0nZn  
1nZn  
HEF4053BP(N): 16-lead DIL; plastic  
(SOT38-1)  
Y
H
none  
HEF4053BD(F): 16-lead DIL; ceramic (cerdip)  
(SOT74)  
Notes  
1. H = HIGH state (the more positive voltage)  
L = LOW state (the less positive voltage)  
X = state is immaterial  
HEF4053BT(D): 16-lead SO; plastic  
(SOT109-1)  
( ): Package Designator North America  
Fig.3 Schematic diagram (one switch).  
RATINGS  
Limiting values in accordance with the Absolute Maximum System (IEC 134)  
Supply voltage (with reference to VDD  
)
VEE  
18 to + 0,5 V  
Note  
1. To avoid drawing VDD current out of terminal Z, when switch current flows into terminals Y, the voltage drop across  
the bidirectional switch must not exceed 0,4 V. If the switch current flows into terminal Z, no VDD current will flow out  
of terminals Y, in this case there is no limit for the voltage drop across the switch, but the voltages at Y and Z may  
not exceed VDD or VEE  
.
January 1995  
3
Philips Semiconductors  
Product specification  
Triple 2-channel analogue  
multiplexer/demultiplexer  
HEF4053B  
MSI  
Fig.4 Logic diagram.  
4
January 1995  
Philips Semiconductors  
Product specification  
Triple 2-channel analogue  
multiplexer/demultiplexer  
HEF4053B  
MSI  
DC CHARACTERISTICS  
Tamb = 25 °C  
V
DDVEE  
V
SYMBOL  
TYP.  
MAX.  
CONDITIONS  
5
10  
15  
5
350  
80  
60  
115  
50  
40  
120  
65  
50  
25  
10  
5
2500  
245  
175  
340  
160  
115  
365  
200  
155  
Vis = 0 to VDDVEE  
see Fig.6  
ON resistance  
ON resistance  
ON resistance  
RON  
Vis = 0  
see Fig.6  
10  
15  
5
RON  
RON  
RON  
IOZZ  
IOZY  
Vis = VDDVEE  
see Fig.6  
10  
15  
5
’ ON resistance  
between any two  
channels  
Vis = 0 to VDDVEE  
see Fig.6  
10  
15  
5
OFF-state leakage  
current, all  
nA  
nA  
nA  
nA  
nA  
nA  
10  
15  
5
E at VDD  
E at VSS  
channels OFF  
OFF-state leakage  
current, any  
1000  
10  
15  
channel  
200  
Fig.5 Operating area as a function of the supply voltages.  
January 1995  
5
Philips Semiconductors  
Product specification  
Triple 2-channel analogue  
multiplexer/demultiplexer  
HEF4053B  
MSI  
Fig.6 Test set-up for measuring RON  
.
Iis = 200 µA  
VSS = VEE = 0 V  
Fig.7 Typical RON as a function of input voltage.  
January 1995  
6
Philips Semiconductors  
Product specification  
Triple 2-channel analogue  
multiplexer/demultiplexer  
HEF4053B  
MSI  
AC CHARACTERISTICS  
VEE = VSS = 0 V; Tamb = 25 °C; input transition times 20 ns  
VDD  
V
TYPICAL FORMULA FOR P (µW)  
2
Dynamic power  
5
2 500 fi + ∑(foCL) × VDD  
where  
2
dissipation per  
package (P)  
10  
15  
11 500 fi + ∑(foCL) × VDD  
fi = input freq. (MHz)  
2
29 000 fi + ∑(foCL) × VDD  
fo = output freq. (MHz)  
CL = load capacitance (pF)  
(foCL) = sum of outputs  
VDD = supply voltage (V)  
AC CHARACTERISTICS  
VEE = VSS = 0 V; Tamb = 25 °C; input transition times 20 ns  
VDD  
V
SYMBOL  
TYP.  
MAX.  
Propagation delays  
Vis Vos  
5
10  
15  
5
10  
5
20 ns  
HIGH to LOW  
tPHL  
10 ns  
10 ns  
30 ns  
10 ns  
10 ns  
400 ns  
170 ns  
130 ns  
555 ns  
200 ns  
130 ns  
note 1  
note 1  
note 2  
note 2  
5
15  
5
LOW to HIGH  
10  
15  
5
tPLH  
tPHL  
tPLH  
5
Sn Vos  
200  
85  
65  
275  
100  
65  
HIGH to LOW  
10  
15  
5
LOW to HIGH  
10  
15  
Output disable times  
E Vos  
5
10  
15  
5
200  
115  
110  
200  
120  
110  
400 ns  
230 ns  
220 ns  
400 ns  
245 ns  
215 ns  
HIGH  
tPHZ  
note 3  
note 3  
LOW  
10  
15  
tPLZ  
Output enable times  
E Vos  
5
10  
15  
5
260  
95  
525 ns  
190 ns  
130 ns  
565 ns  
205 ns  
140 ns  
HIGH  
tPZH  
note 3  
note 3  
65  
280  
105  
70  
LOW  
10  
15  
tPZL  
January 1995  
7
Philips Semiconductors  
Product specification  
Triple 2-channel analogue  
multiplexer/demultiplexer  
HEF4053B  
MSI  
VDD  
V
SYMBOL  
TYP.  
MAX.  
Distortion, sine-wave  
response  
5
0,25  
0,04  
0,04  
%
10  
15  
5
%
note 4  
note 5  
note 6  
note 7  
note 8  
%
Crosstalk between  
any two channels  
MHz  
MHz  
MHz  
mV  
10  
15  
5
1
Crosstalk; enable  
or address input  
to output  
10  
15  
5
50  
mV  
mV  
OFF-state  
MHz  
MHz  
MHz  
MHz  
MHz  
MHz  
feed-through  
10  
15  
5
1
ON-state frequency  
response  
13  
40  
70  
10  
15  
Notes  
Vis is the input voltage at a Y or Z terminal, whichever is assigned as input.  
Vos is the output voltage at a Y or Z terminal, whichever is assigned as output.  
1. RL = 10 kto VEE; CL = 50 pF to VEE; E = VSS; Vis = VDD (square-wave); see Fig.8.  
2. RL = 10 k; CL = 50 pF to VEE; E = VSS; Sn = VDD (square-wave); Vis = VDD and RL to VEE for tPLH; Vis = VEE and  
RL to VDD for tPHL; see Fig.8.  
3. RL = 10 k; CL = 50 pF to VEE; E = VDD (square-wave);  
Vis = VDD and RL to VEE for tPHZ and tPZH  
;
Vis = VEE and RL to VDD for tPLZ and tPZL; see Fig.8.  
4. RL = 10 k; CL = 15 pF; channel ON; Vis = 12 VDD (p-p) (sine-wave, symmetrical about 12 VDD);  
fis = 1 kHz; see Fig.9.  
5. RL = 1 k; Vis = 12 VDD (p-p) (sine-wave, symmetrical about 12 VDD);  
Vos  
--------  
20 log  
= –50 dB; see Fig. 10.  
Vis  
6. RL = 10 kto VEE; CL = 15 pF to VEE; E or Sn = VDD (square-wave); crosstalk is Vos (peak  
value); see Fig.8.  
7. RL = 1 k; CL = 5 pF; channel OFF; Vis = 12 VDD (p-p) (sine-wave, symmetrical about 12 VDD);  
Vos  
--------  
20 log  
= –50 dB; see Fig. 9.  
Vis  
8. RL = 1 k; CL = 5 pF; channel ON; Vis = 12 VDD (p-p) (sine-wave, symmetrical about 12 VDD);  
Vos  
--------  
20 log  
= –3 dB; see Fig. 9.  
Vis  
January 1995  
8
Philips Semiconductors  
Product specification  
Triple 2-channel analogue  
multiplexer/demultiplexer  
HEF4053B  
MSI  
Fig.8  
Fig.9  
(b)  
(a)  
Fig.10  
APPLICATION INFORMATION  
Some examples of applications for the HEF4053B are:  
Analogue multiplexing and demultiplexing.  
Digital multiplexing and demultiplexing.  
Signal gating.  
NOTE  
If break before make is needed, then it is necessary to use the enable input.  
January 1995  
9

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