I74F786N [NXP]
4-bit asynchronous bus arbiter; 4位异步总线仲裁器
| 型号： | I74F786N |
| 厂家： | 
NXP |
| 描述： | 4-bit asynchronous bus arbiter |
| 文件： | 总12页 (文件大小：99K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74F786
4-bit asynchronous bus arbiter
Product specification
IC15 Data Handbook
1991 Feb 14
Philips
Semiconductors
Philips Semiconductors
Product specification
4-bit asynchronous bus arbiter
74F786
The 74F786 is designed so that contention between two or more
request signals will not glitch or display a metastable condition. In
FEATURES
• Arbitrates between 4 asynchronous inputs
this situation an increase in the BRn to BGn t
may be observed.
PHL
A typical 74F786 has an h = 6.6ns, t = 0.41ns and To = 5µsec.
• Separate grant output for each input
• Common output enable
Where:
h = Typical propagation delay through the device and t and To are
device parameters derived from test results and can most nearly be
defined as:
• On board 4 input AND gate
• Metastable–free outputs
• Industrial temperature range available (–40°C to +85°C)
t = A function of the rate at which a latch in a metastable state
resolves that condition.
To = A function of the measurement of the propensity of a latch to
enter a metastable state. To is also a very strong function of the
normal propagation delay of the device.
DESCRIPTION
The 74F786 is an asynchronous 4–bit arbiter designed for high
speed real–time applications. The priority of arbitration is determined
on a first–come first–served basis. Separate bus grant (BGn)
outputs are available to indicate which one of the request inputs is
served by the arbitration logic. All BGn outputs are enabled by a
common enable (EN) pin. In order to generate a bus request signal
a separate 4 input AND gate is provided which may also be used as
an independent AND gate. Unused bus request (BR) inputs may be
disabled by tying them high.
For further information, please refer to the 74F786 application notes.
TYPICAL
TYPICAL
PROPAGATION DELAY
SUPPLY CURRENT
(TOTAL)
TYPE
74F786
6.6ns
55mA
ORDERING INFORMATION
ORDER CODE
INDUSTRIAL RANGE
= 5V ±10%,
COMMERCIAL RANGE
= 5V ±10%,
DESCRIPTION
V
V
CC
PKG DWG #
CC
T
amb
= 0°C to +70°C
T
amb
= –40°C to +85°C
16–pin plastic DIP
16–pin plastic SO
N74F786N
N74F786D
I74F786N
SOT 38-4
SOT109-1
I74F786D
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
74F (U.L.) HIGH/
LOAD VALUE HIGH/
LOW
DESCRIPTION
LOW
Bus request inputs (active low)
AND gate inputs
20µA/1.8mA
20µA/0.6mA
20µA/0.6mA
3.0mA/24mA
3.0mA/24mA
BR0 – BR3
A, B, C, D
EN
1.0/3.0
1.0/1.0
1.0/1.0
150/40
150/40
Common bus grant output enable input (active low)
AND gate output
YOUT
Bus grant outputs (active low)
BG0 – BG3
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
LOGIC SYMBOL
IEC/IEEE SYMBOL
BUS ARBITER
Φ
4
5
6
7
15
A
1
2
3
74F786
9
4
5
6
7
EN
13
12
11
10
BR0
BR1
BR2
BR3
BG0
BG1
BG2
BG3
BR0 BR1 BR2 BR3
EN
B
C
D
6
15
1
BG0 BG1 BG2 BG3 YOUT
&
14
2
13
12
11
10
14
3
V
= Pin 16
CC
GND = Pin 8
SF00442
SF00443
2
February 14, 1991
853–1269 01717
Philips Semiconductors
Product specification
4-bit asynchronous bus arbiter
74F786
FUNCTIONAL DESCRIPTION
PIN CONFIGURATION
The BRn inputs have no inherent priority. The arbiter assigns priority
to the incoming requests as they are received, therefore, the first BR
asserted will have the highest priority. When a bus request is
received its corresponding bus grant becomes active, provided that
EN is low. If additional bus requests are made during this time they
are queued. When the first request is removed, the arbiter services
the bus request with the next highest priority. Removing a request
while a previous request is being serviced can cause a grant to be
changed when arbitrating between three or four requests. For that
reason, the user should not remove ungranted requests when
arbitrating between three or four requests. This does not apply to
arbitration between two requests.
1
2
3
4
5
16
15
14
13
12
B
C
V
CC
A
D
YOUT
BG0
BG1
BG2
BG3
EN
BR0
BR1
BR2
BR3
GND
6
7
8
11
10
9
If two or more BRn inputs are asserted at precisely the same time,
one of them will be selected at random, and all BGn outputs will be
held in the high state until the selection is made. This guarantees
that an erroneous BGn will not be generated even though a
metastable condition may occur internal to the device. When the EN
is in the high state the BGn outputs are forced high.
SF00441
PIN DESCRIPTION
SYMBOL
PINS
TYPE
NAME
FUNCTION
The logic of this device arbitrates between these four inputs.
Unused inputs should be tied high.
BR0 – BR3
4, 5, 6, 7
Input
Bus request inputs (active low)
A, B, C, D
EN
15, 1, 2, 3
9
Input
Input
Inputs of the 4–input AND gate
Enable input
When low it enables the BG0 – BG3 outputs.
These outputs indicate the selected bus request. BG0 corre-
sponds to BR0, BG1 to BR1, etc.
BG0 – BG3
13, 12, 11, 10 Output Bus grant outputs (active low)
YOUT
GND
14
8
Output Output of the 4–input AND gate
Ground ground (0V)
V
CC
16
Power Positive supply voltages
3
February 14, 1991
Philips Semiconductors
Product specification
4-bit asynchronous bus arbiter
74F786
ARBITER FUNCTION TABLE
INPUTS
OUTPUTS
EN
L
BR0
1
BR1
X
BR2
X
BR3
X
BG0
L
BG1
H
BG2
H
BG3
H
L
X
1
X
X
H
L
H
H
L
X
X
1
X
H
H
L
H
L
X
X
X
1
H
H
H
L
H
X
X
X
X
H
H
H
H
Notes to mode selection function table
H = High–voltage level
L
X
1
=
=
=
Low–voltage level
Don’t care
First of inputs to go low
ARBITER FUNCTION TABLE
INPUTS
OUTPUT
A
L
B
L
C
L
D
L
YOUT
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
H
L
L
L
H
H
L
L
L
H
L
L
H
H
H
H
L
L
L
H
L
L
H
H
L
L
H
L
H
H
H
H
H
H
H
H
L
L
H
L
L
H
H
L
L
H
L
H
H
H
H
L
H
L
H
H
H
Notes to AND function table
H = High–voltage level
L
= Low–voltage level
4
February 14, 1991
Philips Semiconductors
Product specification
4-bit asynchronous bus arbiter
74F786
LOGIC DIAGRAM
15
A
1
14
B
YOUT
2
C
3
D
4
BR0
13
BG0
5
BR1
6
BR2
12
BG1
7
BR3
11
BG2
10
BG3
V
= Pin 16
CC
EN
GND = Pin 8
SF00444
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free air temperature range.)
SYMBOL
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
UNIT
V
V
CC
V
IN
Supply voltage
Input voltage
Input current
V
I
IN
mA
V
I
Voltage applied to output in high output state
Current applied to output in low output state
Operating free air temperature range
–0.5 to V
V
OUT
CC
48
mA
°C
°C
°C
OUT
T
amb
Commercial range
Industrial range
0 to +70
–40 to +85
–65 to +150
T
stg
Storage temperature range
5
February 14, 1991
Philips Semiconductors
Product specification
4-bit asynchronous bus arbiter
74F786
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
NOM
5.0
T =
A
–40 to
+85°C
V
UNIT
MIN
4.5
MAX
V
Supply voltage
5.5
CC
IN
IL
V
V
High–level input voltage
Low–level input voltage
Input clamp current
2.0
V
0.8
–18
–1
V
I
I
I
mA
mA
mA
Ik
High–level output current
Low–level output current
OH
OL
24
T
amb
Operating free air temperature range
Commercial range
Industrial range
0
+70
°C
°C
–40
+85
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST
LIMITS
UNIT
1
2
CONDITIONS
MIN TYP
MAX
V
High–level output voltage
V
= MIN, V
=
I
OH
= MAX
2.4
2.7
V
V
±10%V
±5%V
OH
CC
IL
IL
CC
MAX,
V
IH
= MIN
3.3
CC
V
CC
= MIN, V
=
V
OL
Low–level output voltage
I
OL
= MAX
0.30
0.30
0.50
0.50
V
V
±10%V
CC
MAX,
V
IH
= MIN
±5%V
CC
V
Input clamp voltage
V
V
= MIN, I = I
IK
-0.73 -1.2
100
V
IK
CC
I
I
I
I
Input current at maximum input voltage
= 0.0V, V = 7.0V
µA
I
CC
I
High–level input current
V
CC
V
CC
= MAX, V = 2.7V
20
µA
mA
mA
mA
mA
IH
IL
I
Low–level input current
A – D, EN
BRn
= MAX, V = 0.5V
-0.6
-1.8
-150
I
3
I
I
Short–circuit output current
V
V
= MAX
= MAX
-60
OS
CC
Supply current (total)
55
80
CC
CC
Notes to DC electrical characteristics
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V = 5V, T
= 25°C.
amb
CC
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold
OS
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I tests should be performed last.
OS
6
February 14, 1991
Philips Semiconductors
Product specification
4-bit asynchronous bus arbiter
74F786
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
amb
= +25°C
T
amb
= 0°C to +70°C
T
amb
= –40°C to
+85°C
SYM-
BOL
V
CC
= +5.0V ± 10%
V
CC
= +5.0V ± 10%
PARAMETER
TEST
V
CC
= +5.0V
UNIT
CONDITION
C = 50pF,
L
C = 50pF,
L
C = 50pF,
L
R = 500Ω
L
R = 500Ω
L
R = 500Ω
L
MIN
TYP
MAX
MIN
MAX
MIN
MAX
t
t
Propagation delay,
A, B, C, D to YOUT
2.5
2.5
4.5
4.5
7.5
7.5
2.0
2.5
8.5
7.5
2.0
2.5
8.5
7.5
PLH
PHL
Waveform 1
Waveform 2
Waveform 2
Waveform 2
ns
ns
ns
ns
t
t
Propagation delay,
BRn to BGn
5.0
4.5
7.0
6.5
10.0
9.5
4.5
4.0
10.5
10.0
4.5
4.0
10.5
10.0
PLH
PHL
t
t
Propagation delay,
EN to BGn
3.0
2.5
5.0
4.5
8.0
7.5
2.5
2.5
8.5
8.0
2.5
2.5
8.5
8.0
PLH
PHL
Propagation delay,
BRa to BGb
t
5.0
7.0
10.0
4.5
10.5
4.5
10.5
PHL
AC WAVEFORMS
V
M
V
BRa
V
M
M
A, B, C, D
t
t
PHL
PLH
V
M
BGa
BRb
BGb
V
V
M
YOUT
M
SF00445
Waveform 1. Propagation delay for AND gate to output
t
PHL
V
M
V
V
M
BRn, EN
BGn
M
t
SF00447
Waveform 3. Propagation delay for bus request to bus grant
output
t
PHL
PLH
V
V
M
M
Notes to AC waveforms
1. For all waveforms, V = 1.5V.
SF00446
M
2. a and b represents any of the bus requests or grants. BGa
low–to–high transition and the BGb high–to–low transition occur
simultaneously.
Waveform 2. Propagation delay for bus request or enable to
bus grant output
7
February 14, 1991
Philips Semiconductors
Product specification
4-bit asynchronous bus arbiter
74F786
TEST CIRCUIT AND WAVEFORMS
t
w
AMP (V)
90%
V
CC
90%
NEGATIVE
PULSE
V
V
M
M
10%
10%
V
V
OUT
IN
0V
PULSE
GENERATOR
D.U.T.
t
t )
t
t )
THL ( f
TLH ( r
R
C
R
L
t
t )
T
L
t
t )
TLH ( r
THL ( f
AMP (V)
90%
M
90%
POSITIVE
PULSE
V
V
M
10%
10%
0V
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
R
L
C
L
R
T
=
=
=
Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
Termination resistance should be equal to Z
pulse generators.
family
74F
V
rep. rate
t
t
t
amplitude
M
w
TLH
THL
of
OUT
2.5ns 2.5ns
3.0V
1.5V
1MHz
500ns
SF00006
8
February 14, 1991
Philips Semiconductors
Product specification
4-bit asynchronous bus arbiter
74F786
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
9
1991 Feb 14
Philips Semiconductors
Product specification
4-bit asynchronous bus arbiter
74F786
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
10
1991 Feb 14
Philips Semiconductors
Product specification
4-bit asynchronous bus arbiter
74F786
NOTES
11
1991 Feb 14
Philips Semiconductors
Product specification
4-bit asynchronous bus arbiter
74F786
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 10-98
9397-750-05181
Document order number:
Philips
Semiconductors
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