IP4352CX24/LF,135 [NXP]
IP4352CX24 - 9-channel SD-memory card interface filter with ESD protection to IEC 61000-4-2 level 4 CSP 24-Pin;
| 型号： | IP4352CX24/LF,135 |
| 厂家： | 
NXP |
| 描述： | IP4352CX24 - 9-channel SD-memory card interface filter with ESD protection to IEC 61000-4-2 level 4 CSP 24-Pin LTE |
| 文件： | 总13页 (文件大小：71K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IP4352CX24
9-channel SD-memory card interface filter with ESD
protection to IEC 61000-4-2 level 4
Rev. 01 — 13 August 2009
Product data sheet
1. Product profile
1.1 General description
The IP4352CX24 is a diode array for protecting downstream components from
ElectroStatic Discharge (ESD) voltages up to 8 kV.
The IP4352CX24 is fabricated using monolithic silicon semiconductor technology
integrating 9 pairs of rail-to-rail diodes, 15 resistors and 12 Zener diodes in a single
Wafer-Level Chip-Scale Package (WLCSP). These features make the IP4352CX24 ideal
for applications requiring miniaturized components, such as mobile phone handsets,
cordless telephones and personal digital devices.
1.2 Features
I Pb-free, RoHS compliant, free of halogen and antimony (Dark Green compliant)
I All SD-memory card channels have integrated ESD protection and EMI/RF filters
I 9 channels with > 8 kV ESD protection at output terminals
I 5 channels with integrated EMI/RF filters and pull-up resistors
I 4 channels with integrated EMI/RF filters
I Additional SD-card power supply protection
I WLCSP with 0.4 mm pitch
1.3 Applications
I SD-memory card interfaces in cellular and PCS mobile handsets
I Cordless telephones
I PDAs
IP4352CX24
NXP Semiconductors
9-channel SD-memory card interface filter with ESD protection
2. Pinning information
2.1 Pinning
ball A1
index area
IP4352CX24
1
2
3
4
5
A
B
C
D
E
001aaj785
Transparent top view
Fig 1. Pin configuration IP4352CX24
Table 1.
Pin
A1
Pinning
Description
DATA2: data line 2
A2
DATA3: data line 3
A3
GND1: ground 1
A4
SDDATA2: secure digital data 2
SDDATA3: secure digital data 3
CD: card detect
A5
B1
B2
CMD: command
B3
not connected
B4
SDCD: secure digital card detect
SDCMD: secure digital command
DAT3_PD: data 3 pull-down
WP: write protect
B5
C1
C2
C3
C4
C5
D1
D2
D3
D4
D5
E1
DAT3_PU: data 3 pull-up
SDWP: secure digital write protect
VSD: supply voltage
WP+CD: write protect and card detect
CLK: clock
GND2: ground 2
SDWP+CD: secure digital write protect and card detect
SDCLK: secure digital clock
DATA1: data line 1
IP4352CX24_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 13 August 2009
2 of 13
IP4352CX24
NXP Semiconductors
9-channel SD-memory card interface filter with ESD protection
Table 1.
Pinning …continued
Pin
E2
E3
E4
E5
Description
DATA0: data line 0
GND3: ground 3
SDDATA1: secure digital data 1
SDDATA0: secure digital data 0
3. Ordering information
Table 2.
Ordering information
Type number
Package
Name
Description
Version
IP4352CX24
WLCSP24 wafer level chip-size package; 24 bumps; 2.01 × 2.02 × 0.61 mm
IP4352CX24
4. Functional diagram
VSD
DAT3_PU
R11
R12 R13 R14 R15
R1
R2
R3
R4
R5
R6
R7
R8
R9
CLK
SDCLK
CMD
SDCMD
DATA0
DATA1
DATA2
DATA3
CD
SDDATA0
SDDATA1
SDDATA2
SDDATA3
SDCD
WP
SDWP
WP+CD
SDWP+CD
R21
DAT3_PD
GND_H
GND_C
001aaj750
Fig 2. Schematic diagram IP4352CX24
IP4352CX24_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 13 August 2009
3 of 13
IP4352CX24
NXP Semiconductors
9-channel SD-memory card interface filter with ESD protection
5. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VI
Parameter
Conditions
Min
Max Unit
input voltage
−0.5 +5.0
V
VESD
electrostatic discharge voltage
IEC 61000-4-2, level 4; output pins A4, A5, B4,
B5, C4, C5, D4, D5, E4, E5; pins A3, D3 and E3
connected to ground
[1]
contact discharge
air discharge
−8
+8
kV
kV
−15
+15
IEC 61000-4-2, level 1; all other pins; pins A3,
D3 and E3 connected to ground
contact discharge
air discharge
−2
−2
-
+2
kV
+2
kV
Pch
Ptot
Tstg
channel power dissipation
total power dissipation
storage temperature
continuous power; Tamb = 70 °C
Tamb = 70 °C
25
mW
mW
-
100
−55
-
+150 °C
Treflow(peak) peak reflow temperature
Tamb ambient temperature
10 s maximum
260
+85
°C
°C
−30
[1] Device is tested with 1000 pulses of ± 15 kV contact discharges, each according to the IEC 61000-4-2 model, and far exceeds specified
level 4 (8 kV contact discharge).
6. Characteristics
Table 4.
Channel characteristics
Tamb = 25 °C; unless otherwise specified.
Symbol Parameter Conditions
Min
32
Typ
40
Max Unit
Rs(ch)
channel series
resistance
R1 to R9 ± 20 %
R11 to R14 ± 30 %
R15 ± 30 %
48
65
Ω
35
50
kΩ
10.5 15
19.5 kΩ
R21 ± 30 %
329
470
611
kΩ
Cch
channel capacitance
Vbias(DC) = 0 V; f = 1 MHz; pin DAT3_PU = 0 V; pin
DAT3_PD = 0 V; pin VSD = 0 V
[1]
[1]
SD-card to I/O interface:
pins DAT3_PD, DAT3_PU and VSD
Itest = 1 mA
-
-
20
pF
pF
V
-
30
-
-
VBR
ILR
breakdown voltage
6.0
-
-
reverse leakage current per channel; VI = 3.0 V
-
100
nA
[1] Guaranteed by design.
IP4352CX24_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 13 August 2009
4 of 13
IP4352CX24
NXP Semiconductors
9-channel SD-memory card interface filter with ESD protection
Table 5.
Frequency characteristics
Tamb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max Unit
αil
insertion loss
all channels; Rgen = 50 Ω; RL = 50 Ω
f < 400 MHz
-
-
9
-
dB
dB
dB
dB
400 MHz < f < 800 MHz
800 MHz < f < 2.5 GHz
2.5 GHz < f < 6 GHz
9
-
13
28
-
-
32
-
Table 6.
Time domain characteristics
Rgen = 50 Ω; Rs per channel = 15 Ω; generator tr = tf = 2 ns; Tamb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
3.2
4.4
3.3
5.5
Max Unit
tr
rise time
RL = 20 pF || 100 kΩ
RL = 40 pF || 100 kΩ
RL = 20 pF || 100 kΩ
RL = 40 pF || 100 kΩ
-
-
-
-
3.7
6
ns
ns
ns
ns
tf
fall time
4.3
7.5
[1] Measured using source generator with 0 V to 3 V steps and 20 % to 70 % LOW-to-HIGH limits.
7. Application information
7.1 Insertion loss
The insertion loss was measured with a test PCB utilizing laser-drilled micro-via holes
which connect the PCB ground plane to the ground pins.
The configuration for measuring insertion loss in a 50 Ω system is shown in Figure 3.
IN
OUT
DUT
50 Ω
50 Ω
TEST BOARD
V
gen
001aai755
Fig 3. Frequency response measurement configuration
The frequency response curves measured on pins A1 and A4, E1 and E4 and C2 and C4
at frequencies up to 3 GHz is shown in Figure 4.
IP4352CX24_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 13 August 2009
5 of 13
IP4352CX24
NXP Semiconductors
9-channel SD-memory card interface filter with ESD protection
001aaj787
0
S
21
(dB)
−20
−40
−60
−80
(1)
(2)
(3)
2
3
4
1
10
10
10
10
f (MHz)
(1) Pins A1 to A4.
(2) Pins E1 to E4.
(3) Pins C2 to C4.
Fig 4. Measured insertion loss magnitudes
7.2 Crosstalk
The crosstalk between adjacent channels within the IP4352CX24 for different channel
pairs was measured in a 50 Ω NetWork Analyzer (NWA) system.
The configuration for measuring crosstalk in a 50 Ω system is shown in Figure 5.
IN_1
IN_2
OUT_2
OUT_1
DUT
50 Ω
50 Ω
TEST BOARD
50 Ω
50 Ω
V
gen
001aai756
Fig 5. Crosstalk measurement configuration
The crosstalk measured for five different pairs of channels is shown in Figure 6. In all
cases, all unused connections are terminated with 50 Ω to ground.
IP4352CX24_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 13 August 2009
6 of 13
IP4352CX24
NXP Semiconductors
9-channel SD-memory card interface filter with ESD protection
001aaj788
−10
α
ct
(dB)
−30
(1)
(2)
(3)
−50
−70
2
3
4
1
10
10
10
10
f (MHz)
(1) Pins A1 and B4.
(2) Pins A1 and E4.
(3) Pins A2 and B5.
Fig 6. Measured crosstalk between adjacent channels
IP4352CX24_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 13 August 2009
7 of 13
IP4352CX24
NXP Semiconductors
9-channel SD-memory card interface filter with ESD protection
8. Package outline
WLCSP24: wafer level chip-size package; 24 bumps; 2.01 x 2.02 x 0.61 mm
IP4352CX24
D
bump A1
index area
A
2
E
A
A
1
detail X
e
1
e
b
E
D
C
B
A
e
e
2
bump A1
index area
1
2
3
4
5
X
0
e
1
2 mm
scale
Dimensions
Unit
A
A
A
b
D
E
e
e
2
1
2
1
max 0.66 0.22 0.44 0.31 2.06 2.07 0.45
mm nom 0.61 0.20 0.41 0.26 2.01 2.02 0.40 1.6 1.6
min 0.56 0.18 0.38 0.21 1.96 1.97 0.35
ip4352cx24_po
Issue date
References
Outline
version
European
projection
IEC
JEDEC
JEITA
09-05-27
09-07-06
IP4352CX24
Fig 7. Package outline IP4352CX24 (WLCSP24)
IP4352CX24_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 13 August 2009
8 of 13
IP4352CX24
NXP Semiconductors
9-channel SD-memory card interface filter with ESD protection
9. Soldering of WLCSP packages
9.1 Introduction to soldering WLCSP packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering WLCSP (Wafer Level Chip-Size Packages) can be found in application note
AN10439 “Wafer Level Chip Scale Package” and in application note AN10365 “Surface
mount reflow soldering description”.
Wave soldering is not suitable for this package.
All NXP WLCSP packages are lead-free.
9.2 Board mounting
Board mounting of a WLCSP requires several steps:
1. Solder paste printing on the PCB
2. Component placement with a pick and place machine
3. The reflow soldering itself
9.3 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 8) than a PbSn process, thus
reducing the process window
• Solder paste printing issues, such as smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature), and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic) while being low enough that the packages and/or boards are not
damaged. The peak temperature of the package depends on package thickness and
volume and is classified in accordance with Table 7.
Table 7.
Lead-free process (from J-STD-020C)
Package thickness (mm) Package reflow temperature (°C)
Volume (mm3)
< 350
260
350 to 2000
260
> 2000
260
< 1.6
1.6 to 2.5
> 2.5
260
250
245
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 8.
IP4352CX24_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 13 August 2009
9 of 13
IP4352CX24
NXP Semiconductors
9-channel SD-memory card interface filter with ESD protection
maximum peak temperature
= MSL limit, damage level
temperature
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 8. Temperature profiles for large and small components
For further information on temperature profiles, refer to application note AN10365
“Surface mount reflow soldering description”.
9.3.1 Stand off
The stand off between the substrate and the chip is determined by:
• The amount of printed solder on the substrate
• The size of the solder land on the substrate
• The bump height on the chip
The higher the stand off, the better the stresses are released due to TEC (Thermal
Expansion Coefficient) differences between substrate and chip.
9.3.2 Quality of solder joint
A flip-chip joint is considered to be a good joint when the entire solder land has been
wetted by the solder from the bump. The surface of the joint should be smooth and the
shape symmetrical. The soldered joints on a chip should be uniform. Voids in the bumps
after reflow can occur during the reflow process in bumps with high ratio of bump diameter
to bump height, i.e. low bumps with large diameter. No failures have been found to be
related to these voids. Solder joint inspection after reflow can be done with X-ray to
monitor defects such as bridging, open circuits and voids.
9.3.3 Rework
In general, rework is not recommended. By rework we mean the process of removing the
chip from the substrate and replacing it with a new chip. If a chip is removed from the
substrate, most solder balls of the chip will be damaged. In that case it is recommended
not to re-use the chip again.
IP4352CX24_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 13 August 2009
10 of 13
IP4352CX24
NXP Semiconductors
9-channel SD-memory card interface filter with ESD protection
Device removal can be done when the substrate is heated until it is certain that all solder
joints are molten. The chip can then be carefully removed from the substrate without
damaging the tracks and solder lands on the substrate. Removing the device must be
done using plastic tweezers, because metal tweezers can damage the silicon. The
surface of the substrate should be carefully cleaned and all solder and flux residues
and/or underfill removed. When a new chip is placed on the substrate, use the flux
process instead of solder on the solder lands. Apply flux on the bumps at the chip side as
well as on the solder pads on the substrate. Place and align the new chip while viewing
with a microscope. To reflow the solder, use the solder profile shown in application note
AN10365 “Surface mount reflow soldering description”.
9.3.4 Cleaning
Cleaning can be done after reflow soldering.
10. Abbreviations
Table 8.
Abbreviations
Description
Acronym
DUT
Device Under Test
EMI
ElectroMagnetic Interference
ElectroStatic Discharge
Flame Retard 4
ESD
FR4
LAN
Local Area Network
NSMD
OSP
Non-Solder Mask Design
Organic Solderability Preservative
Printed-Circuit Board
PCB
PCS
Personal Communication System
Personal Digital Assistant
Power Supply Unit
PDA
PSU
RoHS
WAN
WLCSP
Restriction of Hazardous Substances
Wide Area Network
Wafer-Level Chip-Scale Package
11. Revision history
Table 9.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
IP4352CX24_1
20090813
Product data sheet
-
-
IP4352CX24_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 13 August 2009
11 of 13
IP4352CX24
NXP Semiconductors
9-channel SD-memory card interface filter with ESD protection
12. Legal information
12.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
IP4352CX24_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 13 August 2009
12 of 13
IP4352CX24
NXP Semiconductors
9-channel SD-memory card interface filter with ESD protection
14. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1
1.2
1.3
2
2.1
3
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 3
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 4
4
5
6
7
7.1
7.2
Application information. . . . . . . . . . . . . . . . . . . 5
Insertion loss . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Crosstalk. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
9
9.1
9.2
9.3
9.3.1
9.3.2
9.3.3
9.3.4
Soldering of WLCSP packages. . . . . . . . . . . . . 9
Introduction to soldering WLCSP packages . . . 9
Board mounting . . . . . . . . . . . . . . . . . . . . . . . . 9
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . . 9
Stand off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Quality of solder joint . . . . . . . . . . . . . . . . . . . 10
Rework . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Cleaning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
10
11
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11
12
Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
12.1
12.2
12.3
12.4
13
14
Contact information. . . . . . . . . . . . . . . . . . . . . 12
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 13 August 2009
Document identifier: IP4352CX24_1
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