MC35FS6513CAE [NXP]
Grade 0 safety power system basis chip with CAN flexible data transceiver;
| 型号： | MC35FS6513CAE |
| 厂家： | 
NXP |
| 描述： | Grade 0 safety power system basis chip with CAN flexible data transceiver |
| 文件： | 总19页 (文件大小：1000K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible
data transceiver
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
1 General description
The 35FS4500/35FS6500 SMARTMOS devices are a multi-output, power supply,
integrated circuit, including CAN Flexible Data (FD) transceiver, dedicated to harsh
automotive and transportation markets requiring high reliability (Grade 0) and high
functional safety (fit for ASIL D) performance.
Multiple switching and linear voltage regulators, including low-power mode (32 μA) are
available with various wake-up capabilities. An advanced power management scheme
is implemented to maintain high efficiency over a wide range of input voltages (down to
2.7 V) and output current ranges (up to 1.5 A).
The 35FS4500/35FS6500 includes configurable fail-safe/fail silent safety behavior and
features, with two fail-safe outputs, becoming a full part of a safety oriented system
partitioning, to reach a high integrity safety level (up to ASIL D).
The built-in CAN FD interface fulfills the ISO 11898-2 and -5 standards.
High temperature capability up to TA = 150 °C and TJ = 175 °C, compliant with AEC-
Q100 Grade 0 automotive qualification.
2 Features
• Battery voltage sensing and MUX output pin
• Highly flexible SMPS pre-regulator, allowing two topologies: non-inverting buck-boost
and standard buck
• 36 V maximum input operating voltage
• Family of devices to supply MCU core from 1.0 V to 5.0 V, with SMPS (0.8 A or 1.5 A)
or LDO (0.5 A)
• Linear voltage regulator dedicated to auxiliary functions, or to sensor supply (VCCA
tracker or independent), 5.0 V or 3.3 V
• Linear voltage regulator dedicated to MCU A/D reference voltage or I/Os supply (VCCA),
5.0 V or 3.3 V
• 3.3 V keep alive memory supply available in low-power mode
• Long duration timer, counting up to 6 months with 1.0 s resolution
• Multiple wake-up sources in low-power mode: CAN, IOs, LDT
• Five configurable I/Os
3 Applications
• TA up to 150 °C and TJ up to 175 °C
• Drive train electrification (BMS, hybrid EV and HEV, inverter, DCDC, alterno starter)
• Drive train - chassis and safety (active suspension, steering, safety domain gateway)
• Power train (EMS, TCU, gear box)
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
4 Simplified application diagram
Figure 1.ꢀ35FS6500C simplified application diagram - buck boost configuration - FS1B
ꢀ
Figure 2.ꢀ35FS4500C simplified application diagram - buck boost configuration - FS1B
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
2 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
5 Ordering information
5.1 Part numbers definition
MC35FSꢁcꢁ5ꢁxꢁyꢁzꢁAE/R2
Table 1.ꢀPart number breakdown
Code Option
Variable
Description
Linear
c
x
y
4 series
VCORE type
6 series
DCDC
0
1
0
1
2
3
N
C
VCORE current
Functions
0.5 A or 0.8 A
1.5 A
none
FS1B
LDT
FS1B, LDT
none
z
Physical interface
CAN FD
5.2 Part numbers list
Table 2.ꢀOrderable part variations
Part number
Temperature
(TA)
Package
FS1B
LDT
VCORE VCORE VKAM
CAN FD Notes
type
on
MC35FS4500CAE
MC35FS4500NAE
MC35FS4501CAE
MC35FS4501NAE
MC35FS4502CAE
MC35FS4502NAE
MC35FS4503CAE
MC35FS4503NAE
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
0.5 A
0.5 A
0.5 A
0.5 A
0.5 A
0.5 A
0.5 A
0.5 A
Linear
Linear
Linear
Linear
Linear
Linear
Linear
Linear
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
1
0
1
0
48-pin LQFP
exposed pad
[1]
–40 °C to 150 °C
1
0
1
0
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
3 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
Part number
Temperature
(TA)
Package
FS1B
LDT
VCORE VCORE VKAM
CAN FD Notes
type
on
MC35FS6500CAE
MC35FS6500NAE
MC35FS6501CAE
MC35FS6501NAE
MC35FS6502CAE
MC35FS6502NAE
MC35FS6503CAE
MC35FS6503NAE
MC35FS6510CAE
MC35FS6510NAE
MC35FS6511CAE
MC35FS6511NAE
MC35FS6512CAE
MC35FS6512NAE
MC35FS6513CAE
MC35FS6513NAE
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0.8 A
0.8 A
0.8 A
0.8 A
0.8 A
0.8 A
0.8 A
0.8 A
1.5 A
1.5 A
1.5 A
1.5 A
1.5 A
1.5 A
1.5 A
1.5 A
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
DC DC
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
by SPI
1
0
1
0
1
0
1
0
48-pin LQFP
exposed pad
[1]
–40 °C to 150 °C
1
0
1
0
1
0
1
0
[1] To order parts in tape and reel, add the R2 suffix to the part number.
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
4 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
6 Block diagram
Figure 3.ꢀ35FS4500/35FS6500 simplified internal block diagram
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
5 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
7 Pinning information
7.1 Pinning
VSUP1
1
36
BOOT_CORE
SW_CORE
VCORE_SNS
COMP_CORE
FB_CORE
VSUP2
VSENSE
VSUP3
2
3
35
34
4
5
33
32
FS1B
GND_COM
SELECT
6
7
8
9
31
30
29
28
CAN_5V
CANH
VDDIO
INTB
NCS
CANL
IO_4
10
27
SCLK
MOSI
IO_5/VKAM
11
12
26
25
IO_0
MISO
Figure 4.ꢀ35FS6500 pinout with CAN and FS1B
VSUP1
1
36
BOOT_CORE
SW_CORE
VCORE_SNS
COMP_CORE
FB_CORE
VSUP2
VSENSE
VSUP3
2
3
35
34
4
5
33
32
NC
GND_COM
SELECT
6
7
8
9
31
30
29
28
CAN_5V
NC
VDDIO
INTB
NCS
NC
IO_4
10
27
SCLK
MOSI
IO_5/VKAM
11
12
26
25
IO_0
MISO
Figure 5.ꢀ35FS6500 pinout without CAN
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
6 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
VSUP1
1
36
NC
VSUP2
VSENSE
VSUP3
2
3
35
34
VCORE
VCORE_SNS
NC
4
5
33
32
FS1B
FB_CORE
SELECT
GND_COM
6
7
8
9
31
30
29
28
CAN_5V
CANH
VDDIO
INTB
NCS
CANL
IO_4
10
27
SCLK
MOSI
IO_5/VKAM
11
12
26
25
IO_0
MISO
Figure 6.ꢀ35FS4500 pinout with CAN and FS1B
7.2 Pin description
Table 3.ꢀ 35FS4500/35FS6500 pin definition
Pin
Symbol
Type
Definition
1
VSUP1
A_IN
Power supply of the device. An external reverse battery protection diode in
series is mandatory.
2
VSUP2
A_IN
Second power supply. Protected by the external reverse battery protection
diode used for VSUP1. VSUP1 and VSUP2 must be connected together
externally.
3
4
VSENSE
VSUP3
A_IN
A_IN
Sensing of the battery voltage. Must be connected prior to the reverse battery
protection diode.
Third power supply dedicated to the device supply. Protected by the external
reverse battery protection diode used for VSUP1. Must be connected
between the reverse protection diode and the input PI filter.
5
FS1B
D_OUT
Second output of the safety block (active low). The pin is asserted low at
start-up and when a fault condition is detected, with a configurable delay or
duration versus FS0B output terminal. Open drain structure.
6
7
8
9
GND_COM
CAN_5V
CANH
GROUND
A_OUT
Dedicated ground for physical layers
Output voltage for the embedded CAN FD interface
A_IN/OUT
A_IN/OUT
CAN output high. If CAN function is not used, this pin must be left open.
CAN output low. If CAN function is not used, this pin must be left open.
CANL
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
7 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
Pin
Symbol
Type
Definition
10
IO_4
D_IN
Can be used as digital input (load dump proof) with wake-up capability or as
an output gate driver
A_OUT
Digital input: Pin status can be read through the SPI. Can be used to
monitor error signals from another IC for safety purposes (when used in
conjunction with IO_5).
Wake-up capability: Can be selectable to wake-up on edges or levels.
Output gate driver: Can drive a logic level low-side NMOS transistor.
Controlled by the SPI.
11
IO_5/VKAM
A_IN
Can be used as digital input with wake-up capability or as an analog output
providing keep alive memory supply in low-power mode.
D_IN
Analog input: Pin status can be read through the MUX output terminal.
A_OUT
Digital input: Pin status can be read through the SPI. Can be used to
monitor error signals from another IC for safety purposes (when used in
conjunction with IO_4).
Wake-up capability: Can be selectable to wake-up on edges or levels.
Supply output: Provide keep alive memory supply in low-power mode.
12
IO_0
A_IN
D_IN
Can be used as analog or digital input (load dump proof) with wake-up
capability (selectable).
Analog input: Pin status can be read through the MUX output terminal.
Digital input: Pin status can be read through the SPI.
Wake-up capability: Can be selectable to wake-up on edges or levels.
13
14
FCRBM
FS0B
A_IN
Feedback core resistor bridge monitoring: For safety purposes, this pin is
used to monitor the middle point of a redundant resistor bridge connected on
VCORE (in parallel to the one used to set the VCORE voltage). If not used, this
pin must be connected directly to FB_CORE.
D_OUT
First output of the safety block (active low). The pin is asserted low at start-up
and when a fault condition is detected. Open drain structure.
15
16
17
DEBUG
AGND
D_IN
Debug mode entry input
Analog ground connection
GROUND
A_OUT
MUX_OUT
Multiplexed output to be connected to a MCU ADC. Selection of the analog
parameter is available at MUX-OUT through the SPI.
18
19
IO_2:3
D_IN
Digital input pin with wake-up capability (logic level compatible)
Digital input: Pin status can be read through the SPI. Can be used to
monitor FCCU error signals from MCU for safety purposes.
Wake-up capability: Can be selectable to wake-up on edges or levels.
20
21
TXD
RXD
D_IN
Transceiver input from the MCU which controls the state of the CAN bus.
Internal pull-up to VDDIO.
If CAN function is not used, this pin must be left open.
D_OUT
Receiver output which reports the state of the CAN bus to the MCU
If CAN function is not used, this pin must be left open.
22
23
24
VPU_FS
NC
A_OUT
N/A
Pull-up output for FS1B function
Not connected. Pin must be left open.
RSTB
D_OUT
This output is asserted low when the safety block reports a failure. The main
function is to reset the MCU. Reset input voltage is also monitored in order to
detect external reset and fault condition. Open drain structure.
25
MISO
D_OUT
SPI bus. Master input slave output
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
8 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
Pin
26
27
28
29
Symbol
MOSI
SCLK
NCS
Type
Definition
D_IN
SPI bus. Master output slave input
SPI Bus. Serial clock
D_IN
D_IN
Not chip select (active low)
INTB
D_OUT
This output pin generates a low pulse when an Interrupt condition occurs.
Pulse duration is configurable. Internal pull-up to VDDIO.
30
VDDIO
A_IN
Input voltage for MISO output buffer
Allows voltage compatibility with MCU I/Os
31
32
33
SELECT
D_IN
Hardware selection pin for VAUX and VCCA output voltages
VCORE voltage feedback. Input of the error amplifier.
FB_CORE
COMP_CORE
A_IN
A_OUT
Compensation network. Output of the error amplifier.
For FS4500 series, this pin must be left open (NC).
34
35
VCORE_SNS
SW_CORE
or VCORE
A_IN
VCORE input voltage sense
A_OUT
A_OUT
A_IN/OUT
VCORE output switching point for FS6500 series
VCORE output voltage for FS4500 series
36
BOOT_CORE
Bootstrap capacitor for VCORE internal NMOS gate drive.
For FS4500 series, this pin must be left open (NC).
37
38
39
40
41
42
43
44
45
46
47
48
VPRE
A_IN
VPRE input voltage sense
VAUX
A_OUT
A_OUT
A_OUT
A_OUT
A_OUT
A_OUT
A_OUT
GROUND
A_IN/OUT
A_OUT
A_OUT
VAUX output voltage. External PNP ballast transistor. Collector connection
VAUX voltage regulator. External PNP ballast transistor. Base connection
VAUX voltage regulator. External PNP ballast transistor. Emitter connection
VCCA voltage regulator. External PNP ballast transistor. Emitter connection
VCCA voltage regulator. External PNP ballast transistor. Base connection
VCCA output voltage. External PNP ballast transistor. Collector connection
Low-side MOSFET gate drive for non-inverting buck-boost configuration
Digital ground connection
VAUX_B
VAUX_E
VCCA_E
VCCA_B
VCCA
GATE_LS
DGND
BOOT_PRE
SW_PRE2
SW_PRE1
Bootstrap capacitor for the VPRE internal NMOS gate drive
Second pre-regulator output switching point
First pre-regulator output switching point
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
9 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
8 Maximum ratings
Table 4.ꢀ Maximum ratings
All voltages are with respect to ground, unless otherwise specified. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Symbol
Electrical ratings
VSUP1/2/3
VSENSE
Ratings
Value
Unit
Notes
[1]
DC voltage at power supply pins
DC voltage at battery sense pin (with ext R in series mandatory)
DC voltage at SW_PRE1 and SW_PRE2 Pins
DC voltage at VPRE Pin
–1.0 to 40
–14 to 40
–1.0 to 40
–0.3 to 8
–0.3 to 8
–1.0 to 50
–1.0 to 8
0.0 to 8
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
VSW1,2
VPRE
VGATE_LS
VBOOT_PRE
VSW_CORE
VCORE_SNS
VBOOT_CORE
VFB_CORE
VCOMP_CORE
VFCRBM
VAUX_B,E
VAUX
DC voltage at Gate_LS pin
DC voltage at BOOT_PRE pin
DC voltage at SW_CORE pin
DC voltage at VCORE_SNS pin
DC voltage at BOOT_CORE pin
DC voltage at FB_CORE pin
0.0 to 15
–0.3 to 2.5
–0.3 to 2.5
–0.3 to 8
–0.3 to 40
–2.0 to 40
–0.3 to 8
–0.3 to 8
–0.3 to 8
–0.3 to 8
–0.3 to 8
–0.3 to 40
–0.3 to 40
–0.3 to 40
–0.3 to 20
–0.3 to 8
–0.3 to 8
DC voltage at COMP_CORE pin
DC voltage at FCRBM pin
DC voltage at VAUX_B, VAUX_E pins
DC voltage at VAUX pin
VCCA_B,E
VCCA
DC voltage at VCCA_B, VCCA_E pins
DC voltage at VCCA pin
VDDIO
DC voltage at VDDIO pin
VCAN_5V
VPU_FS
DC voltage on CAN_5V pin
DC voltage at VPU_FS pin
VFSxB
DC voltage at FS0B, FS1B pins (with ext R in series mandatory)
DC voltage at DEBUG pin
VDEBUG
VIO_0,4
DC voltage at IO_0, IO_4 pins (with ext R in series mandatory)
DC voltage at IO_5 pin
VIO_5
VKAM
DC voltage at VKAM pin
VDIG
DC voltage at INTB, RSTB, MISO, MOSI, NCS, SCLK, MUX_OUT, RXD,
TXD, IO_2, IO_3 pins
VSELECT
VBUS_CAN
I_ISENSE
I_IO0, 4, 5
DC voltage at SELECT pin
–0.3 to 8
V
DC voltage on CANL, CANH pins
VSENSE maximum current capability
IOs maximum current capability (IO_0, IO_4, IO_5)
–27 to 40
–5.0 to 5.0
–5.0 to 5.0
V
mA
mA
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
10 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
Symbol
Ratings
Value
Unit
Notes
ESD voltage
[2]
Human body model (JESD22/A114) – 100 pF, 1.5 kΩ
VESD-HBM1
VESD-HBM2
VESD-HBM3
• All pins
±2.0
±4.0
±6.0
kV
kV
kV
• VSUP1,2,3, VSENSE, VAUX, IO_0,4, FS0B, FS1B, DEBUG
• CANH, CANL
Charge device model (JESD22/C101):
VESD-CDM1
VESD-CDM2
• All pins
±500
±750
V
V
• Corner pins
System level ESD (gun test)
• VSUP1, 2, 3, VSENSE, VAUX, IO_0, 4, 5, FS0B, FS1B
VESD-GUN1
VESD-GUN2
330 Ω/150 pF unpowered according to IEC61000-4-2
±8.0
±8.0
kV
kV
330 Ω/150 pF unpowered according to OEM LIN, CAN, FLexray
Conformance
VESD-GUN3
VESD-GUN4
2.0 kΩ/150 pF unpowered according to ISO10605.2008
±8.0
±8.0
kV
kV
2.0 kΩ/330 pF powered according to ISO10605.2008
• CANH, CANL
VESD-GUN5
VESD-GUN6
330 Ω/150 pF unpowered according to IEC61000-4-2
±15.0
±12.0
kV
kV
330 Ω/150 pF unpowered according to OEM LIN, CAN, FLexray
Conformance
VESD-GUN7
2.0 kΩ/150 pF unpowered according to ISO10605.2008
2.0 kΩ/330 pF powered according to ISO10605.2008
±15.0
±12.0
kV
kV
VESD-GUN8
Thermal ratings
TA
Ambient temperature
Junction temperature
Storage temperature
–40 to 150
–40 to 175
–55 to 150
°C
°C
°C
TJ
TSTG
Thermal resistance
[3]
[4]
[5]
RθJA
Thermal resistance junction to ambient
30
°C/W
°C/W
°C/W
RθJCTOP
RθJCBOTTOM
Thermal resistance junction to case top
Thermal resistance junction to case bottom
23.8
0.9
[1] All VSUPs (VSUP1/2/3) must be connected to the same supply
[2] Compared to AGND
[3] Per JEDEC JESD51-6 with the board (JESD51-7) horizontal
[4] Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC - 883 Method 1012.1).
[5] Thermal resistance between the die and the solder par on the bottom of the packaged based on simulation without any interface resistance.
9 Packaging
9.1 Package mechanical dimensions
Package dimensions are provided in package drawings. To find the most current
package outline drawing, go to www.nxp.com and perform a keyword search for the
drawing's document number.
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
11 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
Table 5.ꢀPackage mechanical dimensions
Package
Suffix
Package outline drawing number
7.0 × 7.0, 48–Pin LQFP exposed pad,
with 0.5 mm pitch, and a 4.5 × 4.5
exposed pad
AE
98ASA00173D
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
12 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
13 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
14 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
10 References
The following are URLs where you can obtain information on related NXP products and
application solutions.
NXP.com support pages
AN5238
Description
URL
Hardware design and product guidelines
Quad flat package (QFP)
http://www.nxp.com/AN5238-DOWNLOAD
http://www.nxp.com/files/analog/doc/app_note/AN4388.pdf
AN4388
Power dissipation tool (Excel file)
http://www.nxp.com/files/analog/software_tools/FS6500-FS4500-power-
dissipation-calculator.xlsx
VCORE compensation network simulation tool (CNC)
Upon demand
Upon demand
FMEDA
35FS6500/35FS4500 FMEDA
35FS4500-35FS6500SMUG 35FS4500/35FS6500 Safety Manual – user guide
https://www.nxp.com/webapp/Download?
colCode=35FS4500-35FS6500SMUG
FS6500-FS4500
Power System Basis Chip with CAN Flexible Data https://www.nxp.com/webapp/Download?colCode=FS6500-FS4500
and LIN Transceivers data sheet
KITFS4503CAEEVM
KITFS6523CAEEVM
FS4500 evaluation board with FS1B
FS6500 evaluation board with FS1B
http://www.nxp.com/KITFS4503CAEEVM
http://www.nxp.com/KITFS6523CAEEVM
http://www.nxp.com/FS4500
35FS4500 product summary page
35FS6500 product summary page
Analog power management home page
http://www.nxp.com/FS6500
http://www.nxp.com/products/power-management
11 Revision history
Table 6.ꢀRevision history
Document ID
Release date
20171215
Data sheet status
Change notice
Supersedes
35FS4500-35FS6500SDS
v.1.0
Data sheet: advance
information
—
—
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
15 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
12 Legal information
12.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
[short] Data sheet: product preview
Development
This document contains certain information on a product under development.
NXP reserves the right to change or discontinue this product without notice.
[short] Data sheet: advance information
[short] Data sheet: technical data
Qualification
Production
This document contains information on a new product. Specifications and
information herein are subject to change without notice.
This document contains the product specification. NXP Semiconductors
reserves the right to change the detail specifications as may be required to
permit improvements in the design of its products.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple
devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
12.2 Definitions
to the publication hereof.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes
modifications or additions. NXP Semiconductors does not give any
no representation or warranty that such applications will be suitable
representations or warranties as to the accuracy or completeness of
for the specified use without further testing or modification. Customers
information included herein and shall have no liability for the consequences
are responsible for the design and operation of their applications and
of use of such information.
products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
Short data sheet — A short data sheet is an extract from a full data sheet
design. It is customer’s sole responsibility to determine whether the NXP
with the same product type number(s) and title. A short data sheet is
Semiconductors product is suitable and fit for the customer’s applications
intended for quick reference only and should not be relied upon to contain
and products planned, as well as for the planned application and use of
detailed and full information. For detailed and full information see the
customer’s third party customer(s). Customers should provide appropriate
relevant full data sheet, which is available on request via the local NXP
design and operating safeguards to minimize the risks associated with
Semiconductors sales office. In case of any inconsistency or conflict with the
their applications and products. NXP Semiconductors does not accept any
short data sheet, the full data sheet shall prevail.
liability related to any default, damage, costs or problem which is based
on any weakness or default in the customer’s applications or products, or
the application or use by customer’s third party customer(s). Customer is
Product specification — The information and data provided in a
technical data data sheet shall define the specification of the product as
responsible for doing all necessary testing for the customer’s applications
agreed between NXP Semiconductors and its customer, unless NXP
and products using NXP Semiconductors products in order to avoid a
Semiconductors and customer have explicitly agreed otherwise in writing.
default of the applications and the products or of the application or use by
In no event however, shall an agreement be valid in which the NXP
customer’s third party customer(s). NXP does not accept any liability in this
Semiconductors product is deemed to offer functions and qualities beyond
respect.
those described in the technical data data sheet.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
12.3 Disclaimers
Limited warranty and liability — Information in this document is believed
Characteristics sections of this document is not warranted. Constant or
to be accurate and reliable. However, NXP Semiconductors does not
repeated exposure to limiting values will permanently and irreversibly affect
give any representations or warranties, expressed or implied, as to the
accuracy or completeness of such information and shall have no liability
the quality and reliability of the device.
for the consequences of use of such information. NXP Semiconductors
takes no responsibility for the content in this document if provided by an
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
information source outside of NXP Semiconductors. In no event shall NXP
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
Semiconductors be liable for any indirect, incidental, punitive, special or
agreed in a valid written individual agreement. In case an individual
consequential damages (including - without limitation - lost profits, lost
agreement is concluded only the terms and conditions of the respective
savings, business interruption, costs related to the removal or replacement
agreement shall apply. NXP Semiconductors hereby expressly objects to
of any products or rework charges) whether or not such damages are based
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
on tort (including negligence), warranty, breach of contract or any other
legal theory. Notwithstanding any damages that customer might incur for
any reason whatsoever, NXP Semiconductors’ aggregate and cumulative
liability towards customer for the products described herein shall be limited
in accordance with the Terms and conditions of commercial sale of NXP
Semiconductors.
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
Right to make changes — NXP Semiconductors reserves the right to
make changes to information published in this document, including without
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
16 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
12.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
NXP — is a trademark of NXP B.V.
SafeAssure — is a trademark of NXP B.V.
SMARTMOS — is a trademark of NXP B.V.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
17 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
Tables
Tab. 1.
Tab. 2.
Tab. 3.
Part number breakdown ....................................3
Orderable part variations ...................................3
35FS4500/35FS6500 pin definition ................... 7
Tab. 4.
Tab. 5.
Tab. 6.
Maximum ratings .............................................10
Package mechanical dimensions .................... 12
Revision history ...............................................15
Figures
Fig. 1.
Fig. 2.
35FS6500C simplified application diagram -
Fig. 3.
35FS4500/35FS6500 simplified internal
buck boost configuration - FS1B .......................2
35FS4500C simplified application diagram -
buck boost configuration - FS1B .......................2
block diagram ....................................................5
35FS6500 pinout with CAN and FS1B ..............6
35FS6500 pinout without CAN ..........................6
35FS4500 pinout with CAN and FS1B ..............7
Fig. 4.
Fig. 5.
Fig. 6.
35FS4500-35FS6500SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2017. All rights reserved.
Short data sheet: advance information
Rev. 1.0 — 15 December 2017
18 / 19
NXP Semiconductors
35FS4500, 35FS6500
Grade 0 safety power system basis chip with CAN flexible data transceiver
Contents
1
2
General description ............................................ 1
Features ............................................................... 1
3
4
5
5.1
5.2
6
Applications .........................................................1
Simplified application diagram ..........................2
Ordering information .......................................... 3
Part numbers definition ......................................3
Part numbers list ............................................... 3
Block diagram ..................................................... 5
Pinning information ............................................ 6
Pinning ...............................................................6
Pin description ...................................................7
Maximum ratings ...............................................10
Packaging .......................................................... 11
Package mechanical dimensions .................... 11
References .........................................................15
Revision history ................................................ 15
Legal information ..............................................16
7
7.1
7.2
8
9
9.1
10
11
12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
© NXP B.V. 2017.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 15 December 2017
Document identifier: 35FS4500-35FS6500SDS
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