MMG2401R2 [NXP]
2400MHz - 2500MHz RF/MICROWAVE NARROW BAND MEDIUM POWER AMPLIFIER, 3 X 3 MM, CASE 1483- 01, QFN-12;
| 型号： | MMG2401R2 |
| 厂家： | 
NXP |
| 描述： | 2400MHz - 2500MHz RF/MICROWAVE NARROW BAND MEDIUM POWER AMPLIFIER, 3 X 3 MM, CASE 1483- 01, QFN-12 放大器 射频 微波 功率放大器 |
| 文件： | 总12页 (文件大小：179K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MMG2401
Rev. 0, 11/2004
Freescale Semiconductor
Technical Data
Indium Gallium Phosphorus HBT
WLAN Power Amplifier
Designed for 802.11g and dual mode applications with frequencies from
2400 to 2500 MHz
MMG2401R2
• 26.5 dBm P1dB @ 2450 MHz
• Power Gain: 27.5 dB Typ (@ f = 2450 MHz, Class AB)
• High Gain, High Efficiency and High Linearity
• EVM = 3% Typ @ Pout = +19 dBM, 14% PAE
• In Tape and Reel. R2 Suffix = 1,500 Units per 12 mm, 7 inch Reel.
2400-2500 MHz, 27.5 dB, 26.5 dBm
802.11g WLAN POWER AMPLIFIER
InGaP HBT
CASE 1483-01
QFN 3x3
Table 1. Maximum Ratings
Rating
Symbol
Value
Unit
V
Collector Supply
V
CC
5
5
Base Supply First Stage
Base Supply Second Stage
Detector Bias Supply
DC Current
V
V
V
B1
5
V
B2
V
BIAS
5
V
I
171
mA
DC
Table 2. Thermal Characteristics
Characteristic
Symbol
Value
Unit
°C/W
°C
(1)
Thermal Resistance, Junction to Ambient
Case Operating Temperature Range
Storage Temperature Range
R
185
θ
JA
T
C
- 40 to +85
T
stg
- 55 to +150
°C
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22-A114-G)
Machine Model (per EIA/JESD22-A115-A)
Charge Device Model (per JESD22-C101-A)
2 (Minimum)
A (Minimum)
II (Minimum)
Table 4. Moisture Sensitivity Level
Test Methodology
Per JESD 22-A113D, IPC/JEDEC J-STD-020C
1. Simulated.
Rating
Package Peak Temperature
Unit
1
245
°C
Freescale Semiconductor, Inc., 2004. All rights reserved.
Table 5. Electrical Characteristics (T = 25°C unless otherwise noted.) V = 3.3 Vdc, V
= 3 Vdc, I = 83 mA, f = 2450 MHz
CQ
A
CC
BIAS
Characteristic
Output Power at 1dB Compression
Power Gain
Symbol
Min
24
Typ
26.5
27.5
Max
—
Unit
dBm
dB
P1dB
G
26
29
p
(P = 19 dBm)
out
Error Vector Magnitude
(P = 19 dBm, 64 QAM/54 Mbps)
out
EVM
—
—
3
—
—
%
Total Current
I
210
mA
Ctotal
(P = 19 dBm)
out
Quiescent Current
I
—
—
156
8.4
—
—
mA
mA
DCQ
Bias Control Reference Current
I
ref
(I = 66 mA)
CQ
Gain Flatness
(Over 100 MHz)
G
—
—
0.2
1
—
—
dB
dB
F
Gain Variation over Temperature
—
(-40 to 85°C)
Input Return Loss
Reverse Isolation
Second Harmonic
IRL
—
—
—
—
-10
-35
-45
-7.5
—
dB
dB
—
—
dBc
(P = 19 dBm)
out
Third Harmonic
(P = 19 dBm)
out
—
—
—
-35
100
—
—
dBc
ns
Ramp-On Time (10-90%)
t
ON
MMG2401R2
RF Device Data
Freescale Semiconductor
2
Table 6. Functional Pin Description
Name
Pin
Description
Number
V
CC1
N.C. V
B2
V
B1
1
Base power supply for first stage amplifier.
10
12 11
RF
2, 3
RF input for the power amplifier. This pin is DC-shorted to
GND and AC-coupled to the transistor base of the first
stage.
in
1
2
3
9
8
7
V
RF
RF
V
B1
out
RF
out
in
V
BIAS
4
5
Detector bias voltage supply.
RF
in
CC2
V
REF
Detector output voltage reference. V - V
is useful for
out
REF
4
5
6
tracking detector performance over temperature.
V
V
V
BIAS REF out
V
6
7
Detector output voltage.
out
V
CC2
Collector power supply for second stage amplifier.
(Top View)
RF
8, 9
RF output for the power amplifier. This pin is DC-coupled
and requires a DC-blocking series capacitor.
OUT
Figure 1. Pin Connections
V
10
11
12
Base power supply for second stage amplifier.
Not connected.
B2
N.C.
V
CC1
Collector power supply for first stage amplifier.
GND
Backside
Center
Metal
The center metal base of the QFN 3x3 package provides
both DC and RF ground as well as heat sink contact for the
power amplifier.
MMG2401R2
RF Device Data
Freescale Semiconductor
3
V
B1
V
CC1
V
B2
V
CC2
C11
C1
C2
C3
C4
C5
C12
C10
C9
C8
C7
C6
L1
RF
INPUT
RF
OUTPUT
Z1
Z2
C14
C15
C13
V
BIAS
V
OUT
V
REF
Z1, Z2
PCB
0.10″ x 0.5395″ Microstrip
Getek ML200M, 0.005″, ε = 3.8
r
Figure 2. MMG2401R2 Test Circuit Schematic
Table 7. MMG2401R2 Test Circuit Component Designations and Values
Part
Description
1 µF Chip Capacitor
Part Number
12065A105JAT2A
12065A104JAT2A
12065A103JAT2A
08055A101FAT2A
12065A200CAT2A
0402CS-7N5XJBC
Manufacturer
AVX
C1, C6
C2, C7
C3, C8
0.1 µF Chip Capacitor
0.01 µF Chip Capacitor
100 pF Chip Capacitor
20 pF Chip Capacitor
7.5 nH Chip Inductor
AVX
AVX
C4, C9, C11, C12
C5, C10, C13, C14, C15
L1
AVX
AVX
Coilcraft
MMG2401R2
RF Device Data
Freescale Semiconductor
4
C1
C2
C3
C4
C5
C11
C12
V
BA2
V
BA1
V
CC1
LAN5
V
CC2
V
bias
V
ref
V
out
L1
C14
C10
C9
C15
C13
C8
C7
C6
Freescale has begun the transition of marking Printed Circuit Boards (PCBs) with the Freescale Semiconductor
signature/logo. PCBs may have either Motorola or Freescale markings during the transition period. These changes will have
no impact on form, fit or function of the current product.
Figure 3. MMG2401R2 Test Circuit Component Layout
MMG2401R2
RF Device Data
Freescale Semiconductor
5
TYPICAL CHARACTERISTICS
29
28
27
7
V
V
= 3.3 Vdc
= 2.9 Vdc
CC
6
5
4
3
2
B1
f = 2450 MHz
T = 25_C
C
−40_C
85_C
26
25
24
85_C
T = 25_C
V
= 3.3 Vdc
= 2.9 Vdc
f = 2450 MHz
C
CC
1
0
V
B1
−40_C
0
5
10
15
20
25
25
30
0
5
10
P , OUTPUT POWER (dBm)
out
15
20
25
P
, OUTPUT POWER (dBm)
out
Figure 4. Power Gain versus Output Power
Figure 5. Error Vector Magnitude versus
Output Power
10
1
25
T = −40_C
C
20
15
25_C
85_C
T = 85_C
C
10
0.1
−40_C
25_C
V
V
= 3.3 Vdc
= 2.9 Vdc
CC
V
V
= 3.3 Vdc
= 2.9 Vdc
5
0
CC
B1
B1
f = 2450 MHz
f = 2450 MHz
0.01
0
5
10
15
20
25
0
5
10
15
20
P , OUTPUT POWER (dBm)
out
P
, OUTPUT POWER (dBm)
out
Figure 7. Detector Output Voltage versus
Output Power
Figure 6. Efficiency versus Output Power
4
250
200
150
100
V
V
= 3.3 Vdc
= 2.9 Vdc
CC
3
2
B1
f = 2450 MHz
T = 85_C
C
1
25_C
0
−1
−2
−40_C
V
V
= 3.3 Vdc
= 2.9 Vdc
CC
50
0
B1
−3
−4
f = 2450 MHz
0
5
10
15
20
25
0
5
10
P , OUTPUT POWER (dBm)
out
15
20
25
P
, OUTPUT POWER (dBm)
out
Figure 8. AM to PM versus Output Power
Figure 9. Total Current versus Output Power
MMG2401R2
RF Device Data
Freescale Semiconductor
6
TYPICAL CHARACTERISTICS
35
30
25
20
0
−5
−10
−15
−20
15
10
V
V
= 3.3 Vdc
= 2.9 Vdc
V
V
= 3.3 Vdc
= 2.9 Vdc
CC
CC
B1
B1
−25
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
f, FREQUENCY (GHz)
f, FREQUENCY (GHz)
Figure 10. Power Gain (S21) versus
Frequency
Figure 11. Input Return Loss (S11) versus
Frequency
0
−5
−20
−30
−40
−50
−10
−15
−20
−25
−60
−70
V
V
= 3.3 Vdc
= 2.9 Vdc
V
V
= 3.3 Vdc
= 2.9 Vdc
CC
CC
B1
B1
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
f, FREQUENCY (GHz)
f, FREQUENCY (GHz)
Figure 13. Output Return Loss (S22) versus
Frequency
Figure 12. Reverse Transconductance
Isolation (S12) versus Frequency
MMG2401R2
RF Device Data
Freescale Semiconductor
7
A
4X D
1
b
C
E
E/2
PIN1 ID
N=12
4X D
2
1
2
3
0.45
(Ny-1)e
1
2
3
F
F/2
B
L
0.25 MIN.
0.25 MIN.
e
(Nx-1)e
2
SEATING
PLANE
TOP VIEW
SIDE VIEW
BOTTOM VIEW
NOTES:
1. DIMENSION b APPLIES TO PLATED TERMINAL AND IS
MEASURED BETWEEN 0.20 AND 0.25 MM FROM
TERMINAL TIP.
2. N IS THE NUMBER OF TERMINALS (12).
Nx IS THE NUMBER OF TERMINALS IN X−DIRECTION
AND
Ny IS THE NUMBER OF TERMINALS IN Y−DIRECTION.
3. ALL DIMENSIONS ARE IN MILLIMETERS.
DIM MIN
A
B
NOM
3.00 BSC
3.00 BSC
0.85
MAX
C
D
−
0.24
1.00
0.60
0.42
STANDARD
E
F
SEE EXPOSED PAD
SEE EXPOSED PAD
0.18
0.23
0.50 BSC
0.30
b
e
DETAIL ”A” - PIN #1 ID AND TIE BAR MARK OPTION
Nx
Ny
3
3
E
F
SYMBOLS
MIN
1.15
NOM
1.30
MAX
1.45
MIN
1.15
NOM
1.30
MAX
1.45
EXPOSED PAD
Figure 14. MMG2401R2 Specific Mechanical Outline Information
MMG2401R2
RF Device Data
Freescale Semiconductor
8
PACKAGE DIMENSIONS
A
3
M
PIN 1 INDEX
AREA
2X
0.1 C
3
DETAIL G
B
M
2X
0.1 C
1.55
1.25
12
10
EXPOSED DIE
ATTACH PAD
DETAIL M
PIN 1 INDEX
9
7
1
1.55
1.25
3
DETAIL N
NOTES:
1. ALL DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND
TOLERANCES PER ASME Y14.5M, 1994.
3. THE COMPLETE JEDEC DESIGNATOR FOR
THIS PACKAGE IS: HF−PQFP−N.
6
4
0.75
0.50
12X
12X 0.30
0.18
9
4. FOR ANVIL SINGULATED QFN PACKAGES,
MAXIMUM DRAFT ANGLED IS 12 .
8X 0.5
_
5. PACKAGE WARPAGE MAX 0.05 MM.
6. CORNER CHAMFER MAY NOT BE PRESENT.
DIMENSIONS OF OPTIONAL FEATURES ARE
FOR REFERENCE ONLY.
M
0.10
C A B
7. CORNER LEADS CAN BE USED FOR
THERMAL OR GROUND AND ARE TIED TO
THE DIE ATTACH PAD. THESE LEADS ARE
NOT INCLUDED IN THE LEAD COUNT.
8. COPLANARITY APPLIES TO LEAD, CORNER
LEADS, AND DIE ATTACH PAD.
VIEW M - M
9. THIS DIMENSION APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.20 MM AND 0.25 MM FROM TERMINAL TIP.
CASE 1483-01
ISSUE O
QFN 3x3
Page 1 of 3
MMG2401R2
RF Device Data
Freescale Semiconductor
9
0.60
0.24
_
(45 )
(0.25)
(0.25)
0.60
0.24
DETAIL N
DETAIL N
PREFERRED CORNER CONFIGURATION
CORNER CONFIGURATION
6
6
0.1 C
1.00
1.0
0.75
0.8
0.05 C
8
0.05
0.00
C
SEATING
PLANE
DETAIL G
_
VIEW ROTATED 90 CW
CASE 1483-01
ISSUE O
QFN 3x3
Page 2 of 3
MMG2401R2
RF Device Data
Freescale Semiconductor
10
0.217
0.137
DETAIL S
(0.25)
0.217
0.137
(0.1)
(0.25)
DETAIL S
BACKSIDE PIN 1 INDEX
DETAIL M
PREFERRED BACKSIDE PIN 1 INDEX
7
TIE BAR MARK OPTION
PIN 1 ID
4X 0.23
0.13
_
(45 )
0.65
0.30
4X
(0.45)
(0.35)
R0.2
PIN 1 ID
DETAIL M
BACKSIDE PIN 1 INDEX OPTION
DETAIL M
BACKSIDE PIN 1 INDEX OPTION
CASE 1483-01
ISSUE O
QFN 3x3
Page 3 of 3
MMG2401R2
RF Device Data
Freescale Semiconductor
11
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MMG2401
Rev. 0, 11/2004
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