MPC5516GMVL [NXP]

MPC5516GMVL;


型号：	MPC5516GMVL
厂家：	NXP
描述：	MPC5516GMVL PC
文件：	总2页 (文件大小：202K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Power Architecture 32-bit Microcontroller

MPC5510

Combining high-performance

and low-power for automotive

body electronics

System Integration

VReg

Crossbar Masters

Debug

JTAG

Power

Architecture™

e200z1

Nexus Class 2+

The MPC5510 family is the first automotive

32-bit microcontroller, built on Power

Core

Osc/PLL

e200z0

Core

FlexRay™ Controller

Architecture™ technology, featuring flexible

low-power modes. This high-performance

MCU inherits the single cycle access flash

memory and advanced peripherals from

the existing MPC5500 product families. It

reuses the same proven 130 nm automotive

flash technology and enjoys the outstanding

development tools and software support built

around the Power Architecture technology in

automotive applications. The family approach

offers scalability from low memory size, low

pin count, reduced feature set devices up to

80 MHz dual-core, 1 MB of embedded flash

and 208 MAPBGA full featured derivatives.

The MPC5510 aims at reducing the number

of modules in the car cockpit area through

higher integration of body electronics and

gateway functions.

eDMA

MMU

Interrupt Controller

Crossbar Switch

Memory Protection Unit (MPU)

Boot Assist

Module (BAM)

External Bus

(optional)

Up to 64K

SRAM

I/O

Bridge

Up to 1 MB

Flash

Crossbar Slaves

eMIOSLite

16–24 ch.

2–6

FlexCAN

3–6

2–3

16–40 ch.

ATD

eSCI

DSPI

I²C

Applications

• Central body controller

Architecture

Memory

• Gateway

• Power Architecture Book E-compliant 32-bit • Up to 1 MB of flash with Error Correction

• Instrument cluster

• Center stack display

• Smart junction box

e200z1 core with 16/32-bit Variable Length

Encoding (VLE)

Coding (ECC)

• The flash module features Read While Write

(RWW) and small partitions for optimal

• Optional VLE-only e200z0 secondary core,

subset of the e200z1 instruction set

bootloader and EEPROM emulation support

• 16-channel enhanced Direct Memory

Access (eDMA)

• Up to 64 KB of SRAM with ECC

• Memory Protection Unit (MPU) with up to

16 regions and 32-bytes granularity

• Memory Management Unit (MMU) with

4-entry translation look-aside buffer (TLB)

• Multiple low-power modes

• JTAG and Nexus Class 2+ debug support

Proposed Product Family*

Body Electronics Challenges

• Integration of more functionality

• Low power management

Key

Features

Device

Flash RAM Core Speed

Package Temp.

• Networking complexity

FlexRay™, 6 FlexCAN,

4 eSCI, 3 DSPI, Ext.

Bus

66/80

MHz

• Increasing traffic on communication buses

• Diversity of architectures requires flexibility

• New software and tools methodologies

MPC5516G

1 MB

64 KB z1+z0

144/208

C/V

5 FlexCAN, 6 eSCI,

3 DSPI, Ext. Bus

48/66

MHz

MPC5516E

MPC5516S

Benefits

3 FlexCAN, 5 eSCI,

2 DSPI, 40-ch. ADC

48/66

MHz

Excellent System Performance

Superscalar dual-core architecture, delivering

more than 100 Dhrystone MIPS (DMIPS)

combined with flexible eDMA for maximum

processing efficiency

48 KB

FlexRay, 6 FlexCAN,

4 eSCI, 3 DSPI, Ext.

Bus

512

66/80

MHz

MPC5514G

64 KB z1+z0

* This table reﬂects Freescale product plans at

the time of printing this brochure. These plans are

subject to change without notice.

Flexibility

C -40º to +85ºC

V -40º to +105ºC

M -40º to +105ºC

Multiple low-power modes, up to

four levels of I/O multiplexing, variety of

communication peripherals

Communication Peripherals

I/O

• Up to six FlexCAN modules supporting

both FIFO and mailbox modes

• Single 5V supply and 5V ADC

Scalability

• Extensive I/O multiplexing capabilities

offering maximum flexibility for a

platform approach

Across family derivatives and other

microcontrollers built on Power

Architecture technology

• Optional dual-channel controller compliant

with FlexRay Protocol Specification v2.1

• Up to six Serial Communication Interfaces

(eSCI) with integrated LIN state machine

• eMIOS timer offering up to 24-ch. input

capture, output compare or PWM capability

Safety and Dependability

Beyond protecting the application against

software runaway type failures, the MPC5510

supports a lot of features to help keep the

application out of dead-lock situations

• Up to three Serial Peripheral Interface

(DSPI) modules with multiple chip selects

• 12-bit queued analog-to-digital converter

(QADC) offering up to 40-ch. analog inputs

• One Inter IC Communication (I²C) module

• External bus interface (EBI)

Development Support

Leverages the comprehensive suite of

hardware and software development tools

available for the MPC5500 family and

extending it with AUTOSAR support

Clocks and Power Management

Package Options

• Two external resonators: 4 to 40 MHz

and 32 kHz

• 144 LQFP 20x20 mm

• 208 MAPBGA 17x17 mm

• Two internal resonators: 16 MHz and

32 kHz for real-time clock and

low-power support

Committed to Innovation

System Support

Freescale understands your design goals.

This advanced family enables major system

cost reductions through higher integration in

the automotive body electronics space.

• Windowed watchdog

• Phase-locked-loop (PLL)

• Loss of clock detection and recovery

• Static SLEEP mode current consumption

<25 µA @ 25ºC

Our Partners Network

LAUTERBACH

Learn More: For more information about our Power

Architecture based products, please visit

www.freescale.com.

Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service

names are the property of their respective owners. The Power Architecture and Power.org word marks and the Power

and Power.org logos and related marks are trademarks and service marks licensed by Power.org.

Document Number: MPC5510FAMFS

REV 0

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