MPC9447FAR2 [NXP]
9447 SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, PLASTIC, LQFP-32;
| 型号： | MPC9447FAR2 |
| 厂家： | 
NXP |
| 描述： | 9447 SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, PLASTIC, LQFP-32 驱动 输出元件 逻辑集成电路 |
| 文件： | 总8页 (文件大小：245K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Freescale Semiconductor, Inc.
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MPC947/D
The MPC947 is a 1:9 low voltage clock distribution chip. The device
features the capability to select between two LVTTL compatible inputs
and fans the signal out to 9 LVCMOS or LVTTL compatible outputs.
These 9 outputs were designed and optimized to drive 50Ω series
terminated transmission lines. With output–to–output skews of 500ps, the
MPC947 is ideal as a clock distribution chip for synchronous systems
which need a tight level of skew at a relatively low cost. For a similar
product targeted at a higher price/performance point, consult the
MPC948 data sheet.
LOW VOLTAGE
1:9 CLOCK
DISTRIBUTION CHIP
• 2 Selectable LVCMOS/LVTTL Clock Inputs
• 500ps Maximum Output–to–Output Skew
• Drives Up to 18 Independent Clock Lines
• Maximum Output Frequency of 110MHz
• Synchronous Output Enable
• Tristatable Outputs
FA SUFFIX
32–LEAD LQFP PACKAGE
CASE 873A–02
• 32–Lead LQFP Packaging
• 3.3V V
CC
Supply Voltage
With an output impedance of approximately 7Ω, in both the HIGH and
LOW logic states, the output buffers of the MPC947 are ideal for driving
series terminated transmission lines. More specifically, each of the 9
MPC947 outputs can drive two series terminated 50Ω transmission lines.
With this capability, the MPC947 has an effective fanout of 1:18 in
applications using point–to–point distribution schemes. With this level of
fanout, the MPC947 provides enough copies of low skew clocks for high
performance synchronous systems, including use as a clock distribution
chip for the L2 cache of a PowerPC 620 based system.
Two independent LVCMOS/LVTTL compatible clock inputs are available. Designers can take advantage of this feature to
provide redundant clock sources or the addition of a test clock into the system design. With the select input pulled HIGH, the
TTL_CLK1 input will be selected.
All of the control inputs are LVCMOS/LVTTL compatible. The MPC947 provides a synchronous output enable control to allow
for starting and stopping of the output clocks. A logic high on the Sync_OE pin will enable all of the outputs. Because this control
is synchronized to the input clock, potential output glitching or runt pulse generation is eliminated. In addition, for board level test,
the outputs can be tristated via the tristate control pin. A logic LOW applied to the Tristate input will force all of the outputs into
high impedance. Note that all of the MPC947 inputs have internal pullup resistors.
The MPC947 is fully 3.3V compatible. The 32–lead LQFP package was chosen to optimize performance, board space and
cost of the device. The 32–lead LQFP has a 7x7mm body size with a conservative 0.8mm pin spacing.
06/00
For More Information On This Product,
Go to: www.freescale.cRoEmV 4
Motorola, Inc. 2000
Freescale Semiconductor, Inc.
MPC947
TTL_CLK0
0
1
9
Q0–Q8
TTL_CLK1
TTL_CLK1_Sel
D
Q
Sync_OE
Tristate
Figure 1. Logic Diagram
FUNCTION TABLES
24 23 22 21 20 19 18 17
GND
Q2
25
26
27
28
29
30
31
32
16
15
14
13
12
11
10
9
GND
Q6
TTL_CLK1_Sel
Input
0
1
TTL_CLK0
TTL_CLK1
VCCO
Q1
VCCO
Q7
Sync_OE
Outputs
0
1
Disabled
Enabled
MPC947
GND
Q0
GND
Q8
Tristate
Outputs
0
1
Tristate
Enabled
VCCO
GND
VCCO
GND
1
2
3
4
5
6
7
8
Figure 2. 32–Lead Pinout (Top View)
TTL_CLK
Sync_OE
Q
Figure 3. Sync_OE Timing Diagram
For More Information On This Product,
MOTOROLA
2
TIMING SOLUTIONS
Go to: www.freescale.com
Freescale Semiconductor, Inc.
MPC947
ABSOLUTE MAXIMUM RATINGS*
Symbol
Parameter
Min
–0.3
–0.3
Max
Unit
V
V
V
Supply Voltage
Input Voltage
Input Current
4.6
CC
V
+ 0.3
V
I
DD
I
IN
(CMOS Inputs)
±20
mA
°C
T
Stor
Storage Temperature Range
–40
125
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or
conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is
not implied.
DC CHARACTERISTICS (T = 0° to 70°C, V
CC
= 3.3V ±0.3V)
A
Symbol
Characteristic
Input HIGH Voltage
Min
Typ
Max
3.6
Unit
V
Condition
V
V
V
V
2.0
2.5
IH
Input LOW Voltage
Output HIGH Voltage
Output LOW Voltage
Input Current
0.8
V
IL
V
I
I
= –20mA (Note 1.)
= 20mA (Note 1.)
OH
OL
OH
0.4
–100
28
V
OL
I
I
µA
mA
pF
pF
Note 2.
IN
Maximum Quiescent Supply Current
Input Capacitance
21
25
CC
C
C
4
IN
Power Dissipation Capacitance
Per Output
pd
1. The MPC947 can drive 50Ω transmission lines on the incident edge. Each output drives one 50Ω parallel terminated transmission line to
V
= V /2. Alternately, the device drives up to two 50Ω series terminated transmission lines per output.
TT
CC
2. I current is a result of internal pull–up resistors.
IN
AC CHARACTERISTICS (T = 0° to 70°C, V
CC
= 3.3V ±0.3V)
A
Symbol
Characteristic
Maximum Input Frequency
Propagation Delay
Min
Typ
Max
Unit
MHz
ns
Condition
Note 3.
F
110
max
t
t
t
t
TCLK to Q
4.75
9.25
500
2.0
Note 3.
pd
Output–to–Output Skew
Part–to–Part Skew
ps
Note 3.
sk(o)
sk(pr)
pwo
ns
Notes 3., 4.
Output Pulse Width
t
/2
t
/2
ps
Note 3.,
Measured at V /2
CC
CYCLE
– 800
CYCLE
+ 800
t
t
t
t
Setup Time
Sync_OE to Input Clk
Input Clk to Sync_OE
0.0
1.0
ns
ns
ns
ns
ns
Notes 3., 5.
Notes 3., 5.
s
Hold Time
h
, t
PZL PZH
Output Enable Time
Output Disable Time
Output Rise/Fall Time
11
11
, t
PLZ PHZ
t , t
r f
0.2
1.0
0.8V to 2.0V
3. Driving 50Ω terminated to V /2.
CC
4. Part–to–part skew at a given temperature and voltage.
5. Setup and Hold times are relative to the falling edge of the input clock.
For More Information On This Product,
3
MOTOROLA
Go to: www.freescale.com
Freescale Semiconductor, Inc.
MPC947
APPLICATIONS INFORMATION
Driving Transmission Lines
line impedances. The voltage wave launched down the two
lines will equal:
The MPC947 clock driver was designed to drive high
speed signals in a terminated transmission line environment.
To provide the optimum flexibility to the user the output
drivers were designed to exhibit the lowest impedance
possible. With an output impedance of approximately 10Ω
the drivers can drive either parallel or series terminated
transmission lines. For more information on transmission
lines the reader is referred to application note AN1091 in the
Timing Solutions brochure (BR1333/D).
VL = VS ( Zo / Rs + Ro +Zo) = 3.0 (25/53.5) = 1.40V
At the load end the voltage will double, due to the near
unity reflection coefficient, to 2.8V. It will then increment
towards the quiescent 3.0V in steps separated by one round
trip delay (in this case 4.0ns).
3.0
In most high performance clock networks point–to–point
distribution of signals is the method of choice. In a
point–to–point scheme either series terminated or parallel
terminated transmission lines can be used. The parallel
technique terminates the signal at the end of the line with a
50Ω resistance to VCC/2. This technique draws a fairly high
level of DC current and thus only a single terminated line can
be driven by each output of the MPC947 clock driver. For the
series terminated case however there is no DC current draw,
thus the outputs can drive multiple series terminated lines.
Figure 4 illustrates an output driving a single series
terminated line vs two series terminated lines in parallel.
When taken to its extreme the fanout of the MPC947 clock
driver is effectively doubled due to its capability to drive
multiple lines.
OutA
= 3.8956
OutB
= 3.9386
t
D
2.5
2.0
1.5
1.0
0.5
0
t
D
In
2
4
6
8
10
12
14
TIME (nS)
MPC947
OUTPUT
BUFFER
Figure 5. Single versus Dual Waveforms
Z
= 50Ω
O
R = 43Ω
S
Since this step is well above the threshold region it will not
cause any false clock triggering, however designers may be
uncomfortable with unwanted reflections on the line. To
better match the impedances when driving multiple lines the
situation in Figure 6 should be used. In this case the series
terminating resistors are reduced such that when the parallel
combination is added to the output buffer impedance the line
impedance is perfectly matched.
7Ω
IN
IN
OutA
MPC947
OUTPUT
BUFFER
Z
O
= 50Ω
= 50Ω
R = 43Ω
S
OutB0
OutB1
7Ω
Z
O
R = 43Ω
S
MPC947
OUTPUT
Z
O
= 50Ω
= 50Ω
R = 36Ω
S
BUFFER
7Ω
Figure 4. Single versus Dual Transmission Lines
Z
O
R = 36Ω
S
The waveform plots of Figure 5 show the simulation
results of an output driving a single line vs two lines. In both
cases the drive capability of the MPC947 output buffers is
more than sufficient to drive 50Ω transmission lines on the
incident edge. Note from the delay measurements in the
simulations a delta of only 43ps exists between the two
differently loaded outputs. This suggests that the dual line
driving need not be used exclusively to maintain the tight
output–to–output skew of the MPC947. The output waveform
in Figure 5 shows a step in the waveform, this step is caused
by the impedance mismatch seen looking into the driver. The
parallel combination of the 43Ω series resistor plus the output
impedance does not match the parallel combination of the
7Ω + 36Ω 36Ω = 50Ω 50Ω
25Ω = 25Ω
Figure 6. Optimized Dual Line Termination
SPICE level output buffer models are available for
engineers who want to simulate their specific interconnect
schemes. In addition IV characteristics are in the process of
being generated to support the other board level simulators in
general use.
For More Information On This Product,
MOTOROLA
4
TIMING SOLUTIONS
Go to: www.freescale.com
Freescale Semiconductor, Inc.
MPC947
OUTLINE DIMENSIONS
FA SUFFIX
LQFP PACKAGE
CASE 873A–02
ISSUE A
4X
A
A1
0.20 (0.008) AB T–U Z
32
25
1
–U–
–T–
B
V
AE
AE
P
B1
DETAIL Y
–Z–
V1
17
8
DETAIL Y
9
4X
0.20 (0.008) AC T–U Z
9
NOTES:
S1
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
S
2. CONTROLLING DIMENSION: MILLIMETER.
3. DATUM PLANE –AB– IS LOCATED AT BOTTOM OF
LEAD AND IS COINCIDENT WITH THE LEAD
WHERE THE LEAD EXITS THE PLASTIC BODY AT
THE BOTTOM OF THE PARTING LINE.
4. DATUMS –T–, –U–, AND –Z– TO BE DETERMINED
AT DATUM PLANE –AB–.
DETAIL AD
G
5. DIMENSIONS S AND V TO BE DETERMINED AT
SEATING PLANE –AC–.
–AB–
–AC–
6. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE PROTRUSION IS
0.250 (0.010) PER SIDE. DIMENSIONS A AND B
DO INCLUDE MOLD MISMATCH AND ARE
DETERMINED AT DATUM PLANE –AB–.
7. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. DAMBAR PROTRUSION SHALL
NOT CAUSE THE D DIMENSION TO EXCEED
0.520 (0.020).
SEATING
PLANE
0.10 (0.004) AC
BASE
METAL
N
8. MINIMUM SOLDER PLATE THICKNESS SHALL BE
0.0076 (0.0003).
9. EXACT SHAPE OF EACH CORNER MAY VARY
FROM DEPICTION.
F
D
8X M
MILLIMETERS
DIM MIN MAX
7.000 BSC
INCHES
MIN MAX
0.276 BSC
0.138 BSC
0.276 BSC
0.138 BSC
R
J
A
A1
B
3.500 BSC
7.000 BSC
3.500 BSC
1.400 1.600 0.055 0.063
0.300 0.450 0.012 0.018
1.350 1.450 0.053 0.057
0.300 0.400 0.012 0.016
SECTION AE–AE
E
C
B1
C
D
E
F
W
G
H
J
K
M
N
P
0.800 BSC
0.031 BSC
Q
H
K
X
0.050 0.150 0.002 0.006
0.090 0.200 0.004 0.008
0.500 0.700 0.020 0.028
12 REF
0.090 0.160 0.004 0.006
0.400 BSC 0.016 BSC
12 REF
DETAIL AD
Q
R
1
5
1
5
0.150 0.250 0.006 0.010
S
9.000 BSC
4.500 BSC
9.000 BSC
4.500 BSC
0.200 REF
1.000 REF
0.354 BSC
0.177 BSC
0.354 BSC
0.177 BSC
0.008 REF
0.039 REF
S1
V
V1
W
X
For More Information On This Product,
5
MOTOROLA
Go to: www.freescale.com
Freescale Semiconductor, Inc.
MPC947
NOTES
For More Information On This Product,
MOTOROLA
6
TIMING SOLUTIONS
Go to: www.freescale.com
Freescale Semiconductor, Inc.
MPC947
NOTES
For More Information On This Product,
7
MOTOROLA
Go to: www.freescale.com
Freescale Semiconductor, Inc.
MPC947
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or
guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the
applicationor use of any product or circuit, and specifically disclaims any and all liability, includingwithoutlimitationconsequentialorincidental
damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in differentapplications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are
not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where
personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application,
BuyershallindemnifyandholdMotorolaanditsofficers, employees, subsidiaries, affiliates, anddistributorsharmlessagainstallclaims, costs,
damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated
with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the
part. Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;
JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center, 3–20–1,
P.O. Box 5405, Denver, Colorado 80217. 1–303–675–2140 or 1–800–441–2447 Minami–Azabu. Minato–ku, Tokyo 106–8573 Japan. 81–3–3440–3569
Technical Information Center: 1–800–521–6274
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre,
2, Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong.
852–26668334
HOME PAGE: http://www.motorola.com/semiconductors/
For More Information On This Product,
◊
MPC947/D
Go to: www.freescale.com
相关型号：
MPC9448AC
9448 SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, LEAD FREE, LQFP-32
NXP
MPC9448FA
Low Skew Clock Driver, 12 True Output(s), 0 Inverted Output(s), ECL, PQFP32, PLASTIC, LQFP-32
MOTOROLA
MPC9448FA
Low Skew Clock Driver, 9448 Series, 12 True Output(s), 0 Inverted Output(s), ECL, PQFP32, LQFP-32
IDT
MPC9448FAR2
Low Skew Clock Driver, 12 True Output(s), 0 Inverted Output(s), ECL, PQFP32, PLASTIC, LQFP-32
MOTOROLA
MPC9449AER2
9449 SERIES, LOW SKEW CLOCK DRIVER, 15 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52, PLASTIC, LQFP-52
IDT
©2020 ICPDF网 联系我们和版权申明