N74ALS574ADB [NXP]
IC ALS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, PLASTIC, SSOP2-20, Bus Driver/Transceiver;
| 型号： | N74ALS574ADB |
| 厂家： | 
NXP |
| 描述： | IC ALS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, PLASTIC, SSOP2-20, Bus Driver/Transceiver 驱动 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总16页 (文件大小：182K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74ALS573B/74ALS574A
Latch flip–flop
Product specification
IC05 Data Handbook
1991 Feb 08
Philips
Semiconductors
Philips Semiconductors
Product specification
Latch/flip-flop
74ALS573B/74ALS574A
74ALS573B Octal transparent latch (3-State)
74ALS574A Octal D flip-flop (3-State)
It is an 8-bit edge triggered register coupled to eight 3-State output
buffers. The two sections of the device are controlled independently
by clock (CP) and output enable (OE) control gates.
FEATURES
• 74ALS573B is broadside pinout version of 74ALS373
• 74ALS574A is broadside pinout version of 74ALS374
The register is fully edge triggered. The state of the D input, one
setup time before the Low-to-High clock transition is transferred to
the corresponding flip-flop’s Q output.
• Inputs and outputs on opposite side of package allow easy
interface to microprocessors
The active-Low output enable (OE) controls all eight 3-State buffers
independent of the latch operation. When OE is Low, latched or
transparent data appears at the output.
• Useful as an input or output port for microprocessors
• 3-State outputs for bus interfacing
• Common output enable
When OE is High, the outputs are in high impedance “off” state,
which means they will neither drive nor load the bus.
• 74ALS563A and 74ALS564A are inverting version of 74ALS573B
and 74ALS574A respectively
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
TYPE
DESCRIPTION
The 74ALS573B is an octal transparent latch coupled to eight
3-State output devices. The two sections of the device are controlled
independently by enable (E) and output enable (OE) control gates.
74ALS573B
74ALS574A
5.0ns
6.0ns
12mA
15mA
The 74ALS573B is functionally identical to the 74ALS373 but has a
broadside pinout configuration to facilitate PC board layout and
allow easy interface with microprocessors.
ORDERING INFORMATION
ORDER CODE
The data on the D inputs is transferred to the latch outputs when the
enable (E) input is High. The latch remains transparent to the data
input while E is High, and stores the data that is present one setup
time before the High-to-Low enable transition.
DRAWING
NUMBER
COMMERCIAL RANGE
V
amb
= 5V ±10%,
= 0°C to +70°C
DESCRIPTION
CC
T
20-pin plastic DIP
20-pin plastic SOL
74ALS573BN, 74ALS574AN SOT146-1
74ALS573BD, 74ALS574AD SOT163-1
The 74ALS574A is functionally identical to the 74ALS374 but has a
broadside pinout configuration to facilitate PC board layout and
allow easy interface with microprocessors.
20-pin plastic SSOP
Type II
74ALS573BDB,
SOT339-1
74ALS574ADB
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
74ALS (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
PINS
DESCRIPTION
D0 – D7
E (74ALS573B)
OE
Data inputs
1.0/1.0
1.0/1.0
1.0/1.0
1.0/2.0
130/240
20µA/0.2mA
20µA/0.1mA
20µA/0.1mA
20µA/0.2mA
2.6mA/24mA
Latch enable input
Output Enable input (active-Low)
Clock pulse input (active rising edge)
Data outputs
CP (74ALS574A)
Q0 – Q7
NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.
2
1991 Feb 08
853–1307 01670
Philips Semiconductors
Product specification
Latch/flip-flop
74ALS573B/74ALS574A
PIN CONFIGURATION – 74ALS573B
PIN CONFIGURATION – 74ALS574A
OE
D0
D1
D2
D3
D4
D5
D6
D7
1
2
3
4
5
6
7
8
9
20
19
V
OE
D0
D1
D2
D3
D4
D5
D6
D7
1
20
V
CC
CC
Q0
2
19 Q0
18 Q1
3
4
5
6
7
8
9
18 Q1
17 Q2
17
16
15
14
13
12
11
Q2
Q3
Q4
Q5
Q6
Q7
E
16
15
14
13
12
11
Q3
Q4
Q5
Q6
Q7
CP
GND 10
GND 10
SF01073
SF01074
LOGIC SYMBOL – 74ALS573B
LOGIC SYMBOL – 74ALS574A
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
2
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
11
1
E
11
1
CP
OE
OE
Q0
19
Q1
18
Q2
17
Q3
16
Q4
15
Q5
14
Q6
13
Q7
12
Q0
19
Q1
18
Q2
17
Q3
16
Q4
15
Q5
14
Q6
13
Q7
12
V
=Pin 20
V
=Pin 20
CC
CC
GND=Pin 10
GND=Pin 10
SF01075
SF01076
IEC/IEEE SYMBOL – 74ALS573B
IEC/IEEE SYMBOL – 74ALS574A
1
1
EN1
EN1
11
11
EN2
C2
2
19
18
17
16
2
19
18
17
16
2D
1
2D
1
3
3
4
5
4
5
15
14
6
7
15
14
6
7
13
12
8
9
13
12
8
9
SF01077
SF01078
3
1991 Feb 08
Philips Semiconductors
Product specification
Latch/flip-flop
74ALS573B/74ALS574A
LOGIC DIAGRAM – 74ALS573B
D0
D1
D2
D3
D4
D5
D6
D7
2
3
4
5
6
7
8
9
D
E
D
E
D
E
D
E
D
E
D
E
D
E
D
E
Q
Q
Q
Q
Q
Q
Q
Q
11
1
E
OE
19
Q0
18
Q1
17
Q2
16
Q3
15
Q4
14
Q5
13
Q6
12
Q7
V
= Pin 20
CC
GND = Pin 10
SC00109
FUNCTION TABLE – 74ALS573B
INPUTS
INTERNAL
OUTPUTS
REGISTER
OPERATING MODE
OE
L
E
H
H
↓
Dn
L
Q0 – Q7
L
H
L
H
Enable and read register
L
H
l
L
L
L
Latch and read register
Hold
L
↓
h
H
H
L
L
X
NC
NC
Dn
NC
Z
H
H
L
X
Disable outputs
H
Dn
Z
H = High-voltage level
h
L
l
=
=
=
High state must be present one setup time before the High-to-Low enable transition
Low-voltage level
Low state must be present one setup time before the High-to-Low enable transition
NC= No change
X
Z
↓
=
=
=
Don’t care
High impedance “off” state
High-to-Low enable transition
LOGIC DIAGRAM – 74ALS574A
D0
D1
D2
D3
D4
D5
D6
D7
9
2
3
4
5
6
7
8
D
CP
D
CP
D
CP
D
CP
D
CP
D
CP
D
CP
D
CP
Q
Q
Q
Q
Q
Q
Q
Q
11
1
CP
OE
19
Q0
18
Q1
17
Q2
16
Q3
15
Q4
14
Q5
13
Q6
12
Q7
V
= Pin 20
CC
GND = Pin 10
SC00110
4
1991 Feb 08
Philips Semiconductors
Product specification
Latch/flip-flop
74ALS573B/74ALS574A
FUNCTION TABLE – 74ALS574A
INPUTS
INTERNAL
OUTPUTS
REGISTER
OPERATING MODE
OE
L
CP
↑
Dn
l
Q0 – Q7
L
L
H
Latch and read register
Hold
L
↑
h
H
L
↑
X
NC
NC
Dn
NC
Z
H
H
↑
X
Disable outputs
↑
Dn
Z
H = High-voltage level
h
L
l
=
=
=
High state must be present one setup time before the Low-to-High clock transition
Low-voltage level
Low state must be present one setup time before the Low-to-High clock transition
NC= No change
X
Z
↑
=
=
=
=
Don’t care
High impedance “off” state
Low-to-High clock transition
Not Low-to-High clock transition
↑
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
UNIT
V
V
CC
Supply voltage
Input voltage
Input current
V
V
IN
IN
I
mA
V
V
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
–0.5 to V
48
OUT
OUT
CC
I
mA
°C
°C
T
amb
0 to +70
T
stg
–65 to +150
RECOMMENDED OPERATING CONDITIONS
LIMITS
NOM
5.0
SYMBOL
PARAMETER
UNIT
MIN
4.5
MAX
V
CC
Supply voltage
5.5
V
V
V
IH
High-level input voltage
Low-level input voltage
Input clamp current
2.0
V
0.8
–18
–2.6
24
V
IL
IK
I
mA
mA
mA
°C
I
High-level output current
Low-level output current
Operating free-air temperature range
OH
I
OL
T
amb
0
+70
5
1991 Feb 08
Philips Semiconductors
Product specification
Latch/flip-flop
74ALS573B/74ALS574A
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
1
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
2
MIN
– 2
TYP
MAX
I
= –0.4mA
V
V
V
OH
CC
V
V
= ±10%, V = MAX,
IL
CC
IH
V
OH
High-level output voltage
= MIN
I
= MAX
= 12mA
= 24mA
2.4
3.2
0.25
0.35
–0.73
OH
I
I
0.40
0.50
–1.2
0.1
V
OL
OL
V
V
= MIN, V = MAX,
IL
= MIN
CC
IH
V
OL
Low-level output voltage
V
V
IK
Input clamp voltage
V
CC
V
CC
V
CC
V
CC
V
CC
= MIN, I = I
IK
V
I
I
I
Input current at minimum input voltage
High-level input current
= MAX, V = 7.0V
mA
µA
mA
mA
I
I
IH
= MAX, V = 2.7V
20
I
74ALS573B
74ALS574A
= MAX, V = 0.4V
–0.1
–0.2
I
I
IL
Low-level input current
= MAX, V = 0.4V
I
Off-state output current,
High-level voltage applied
I
V
= MAX, V = 2.7V
20
µA
µA
OZH
CC
I
Off-state output current,
Low-level voltage applied
I
V
V
= MAX, V = 0.4V
–20
OZL
CC
I
3
I
O
Output current
= MAX, V = 2.25V
–30
–112
12
mA
mA
mA
mA
mA
mA
mA
CC
O
I
7
CCH
I
13
15
10
17
18
21
74ALS573B
74ALS574A
V
CC
= MAX
= MAX
CCL
CCZ
CCH
I
24
I
Supply current (total)
CC
I
16
I
27
V
CC
CCL
I
28
CCZ
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V = 5V, T = 25°C.
CC
amb
3. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
.
OS
6
1991 Feb 08
Philips Semiconductors
Product specification
Latch/flip-flop
74ALS573B/74ALS574A
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
V
= 0°C to +70°C
= +5.0V ± 10%
amb
CC
SYMBOL
PARAMETER
TEST CONDITION
UNIT
C = 50pF, R = 500Ω
L
L
MIN
MAX
t
t
Propagation delay
Dn to Qn
2.0
2.0
10.0
10.0
PLH
PHL
Waveform 3
Waveform 2
ns
ns
ns
t
t
Propagation delay
E to Qn
4.0
4.0
12.0
12.0
PLH
PHL
74ALS573B
t
Output enable time
to High or Low level
Waveform 6
Waveform 7
2.0
4.0
9.0
11.0
PZH
t
PZL
t
t
Output disable time
from High or Low level
Waveform 6
Waveform 7
1.0
2.0
9.0
11.0
PHZ
PLZ
ns
MHz
ns
f
Maximum clock frequency
Waveform 1
Waveform 1
45
MAX
t
t
Propagation delay
CP to Qn
3.0
4.0
12.0
12.0
PLH
PHL
74ALS574A
t
t
Output enable time
to High or Low level
Waveform 6
Waveform 7
2.0
4.0
9.0
11.0
PZH
PZL
ns
ns
t
Output disable time
from High or Low level
Waveform 6
Waveform 7
1.0
2.0
9.0
11.0
PHZ
t
PLZ
AC SETUP CHARACTERISTICS
LIMITS
T
V
= 0°C to +70°C
= +5.0V ± 10%
amb
CC
SYMBOL
PARAMETER
TEST CONDITION
UNIT
C = 50pF, R = 500Ω
L
L
MIN
MAX
t
t
(H)
Setup time, High or Low
Dn to E
6.0
6.0
su
Waveform 4
ns
(L)
su
74ALS573B
74ALS574A
t (H)
t (L)
h
Hold time, High or Low
Dn to E
6.0
6.0
h
Waveform 4
Waveform 1
Waveform 5
ns
ns
ns
t (H)
w
E Pulse width, High
10.0
t
t
(H)
Setup time, High or Low
Dn to CP
6.0
6.0
su
(L)
su
t (H)
Hold time, High or Low
Dn to CP
1.0
1.0
h
Waveform 5
Waveform 5
ns
ns
t (L)
h
t (H)
CP Pulse width,
High or Low
8.0
12.0
w
t (L)
w
7
1991 Feb 08
Philips Semiconductors
Product specification
Latch/flip-flop
74ALS573B/74ALS574A
AC WAVEFORMS
For all waveforms, V = 1.3V.
M
The shaded areas indicate when the input is permitted to change for predictable output performance.
1/f
max
t
(H)
w
CP
Qn
V
V
E
V
M
M
V
M
V
M
V
t
M
M
t
(H)
w
t
t
(L)
t
PHL
PLH
w
t
PHL
PLH
V
Qn
V
V
V
M
M
M
M
SF00258
SF00259
Waveform 1. Propagation Delay for Clock Input to Output,
Clock Pulse Widths, and Maximum Clock Frequency
Waveform 2. Propagation Delay for Enable to Output and
Enable Pulse Width
Dn
V
V
t
M
M
t
PHL
PLH
Qn
V
V
M
M
SF00260
Waveform 3. Propagation Delay for Data to Output
Dn
E
Dn
CP
V
V
V
V
V
V
V
V
M
M
M
M
M
M
M
M
t
(L)
t
(L)
t
(L)
t (L)
h
t
(H)
t
(H)
t
(H)
t (H)
h
su
h
su
su
h
su
V
M
V
V
M
V
M
M
SF00261
SF00262
Waveform 4. Data Setup Time and Hold Times
Waveform 5. Data Setup Time and Hold Times
OE
Qn
OE
Qn
V
V
V
V
M
M
t
M
t
M
t
V
-0.3V
OH
t
PZH
PHZ
PZL
PLZ
3.5V
V
V
M
M
0V
V
+0.3V
OL
SC00099
SC00100
Waveform 6. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
Waveform 7. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
8
1991 Feb 08
Philips Semiconductors
Product specification
Latch/flip-flop
74ALS573B/74ALS574A
TEST CIRCUIT AND WAVEFORMS
t
w
AMP (V)
0.3V
V
CC
90%
90%
7.0V
NEGATIVE
PULSE
V
V
M
M
10%
10%
V
V
OUT
R
R
IN
L
L
PULSE
GENERATOR
D.U.T.
t
t )
f
t
t )
THL ( f
TLH ( r
R
C
L
T
t
t )
t
t )
TLH ( r
THL ( f
AMP (V)
0.3V
90%
90%
POSITIVE
PULSE
V
V
M
M
Test Circuit for 3-State Outputs
SWITCH POSITION
10%
10%
t
w
TEST
, t
SWITCH
closed
Input Pulse Definition
INPUT PULSE REQUIREMENTS
t
PLZ PZL
All other
open
Family
V
M
Rep.Rate
t
w
t
t
THL
Amplitude
DEFINITIONS:
TLH
R
L
C
L
R
T
=
=
=
Load resistor;
see AC electrical characteristics for value.
Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
Termination resistance should be equal to Z
pulse generators.
2.0ns
2.0ns
74ALS
3.5V
1.3V
1MHz
500ns
of
OUT
SC00072
9
1991 Feb 08
Philips Semiconductors
Product specification
Latch/flip–flop
74ALS573B/74ALS574A
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
10
1991 Feb 08
Philips Semiconductors
Product specification
Latch/flip–flop
74ALS573B/74ALS574A
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
11
1991 Feb 08
Philips Semiconductors
Product specification
Latch/flip–flop
74ALS573B/74ALS574A
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
12
1991 Feb 08
Philips Semiconductors
Product specification
Latch/flip–flop
74ALS573B/74ALS574A
DEFINITIONS
Data Sheet Identification
Product Status
Definition
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Objective Specification
Formative or in Design
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Preliminary Specification
Product Specification
Preproduction Product
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1997
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
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The 74ALS573B is an octal transparent latch coupled to eight 3-State output devices. The two sections of the device are controlled
independently by enable (E) and output enable (OE) control gates. The 74ALS573B is functionally identical to the 74ALS373 but has a
broadside pinout configuration to facilitate PC board layout and allow easy interface with microprocessors.
PC/PC-peripherals
Cross reference
The data on the D inputs is transferred to the latch outputs when the enable (E) input is High. The latch remains transparent to the data
input while E is High, and stores the data that is present one setup time before the High-to-Low enable transition.
Models
Packages
Application notes
Selection guides
Other technical documentation
End of Life information
Datahandbook system
The 74ALS574A is functionally identical to the 74ALS374 but has a broadside pinout configuration to facilitate PC board layout and allow
easy interface with microprocessors.
It is an 8-bit edge triggered register coupled to eight 3-State output buffers. The two sections of the device are controlled independently by
clock (CP) and output enable (OE) control gates.
The register is fully edge triggered. The state of the D input, one setup time before the Low-to-High clock transition is transferred to the
corresponding flip-flop’s Q output.
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The active-Low output enable (OE) controls all eight 3-State buffers independent of the latch operation. When OE is Low, latched or
transparent data appears at the output.
When OE is High, the outputs are in high impedance 'off' state, which means they will neither drive nor load the bus.
74ALS573B,
74ALS574A
74ALS573B,
74ALS574A
Features
l 74ALS573B is broadside pinout version of 74ALS373
l 74ALS574A is broadside pinout version of 74ALS374
l Inputs and outputs on opposite side of package allow easy interface to microprocessors
l Useful as an input or output port for microprocessors
l 3-State outputs for bus interfacing
l Common output enable
l 74ALS563A and 74ALS564A are inverting version of 74ALS573B and 74ALS574A respectively
Datasheet
File
size
(kB)
Publication
release date Datasheet status
Page
count
Type nr.
Title
Datasheet
Download
74ALS573B,
74ALS574A
Latch flip-flop
08-Feb-91
Product
Specification
13
143
Products, packages, availability and ordering
North American
Partnumber
Order code
(12nc)
Partnumber
marking/packing
package device status buy online
SOT163 Full production
SOT163 Full production
SOT146 Full production
SOT163 Full production
SOT163 Full production
Standard Marking * Tube
(Signetics)
N74ALS573BD N74ALS573BD
N74ALS573BD-T
9338 607 90602
Standard Marking * Reel Pack,
SMD, 13" (Signetics)
9338 607 90623
9338 603 10602
9338 608 00602
9338 608 00623
Standard Marking * Tube
(Signetics)
N74ALS573BN N74ALS573BN
N74ALS574AD N74ALS574AD
Standard Marking * Tube
(Signetics)
Standard Marking * Reel Pack,
SMD, 13" (Signetics)
N74ALS574AD-T
N74ALS574ADB
9352 159 70112 Standard Marking * Bulk Pack
SOT339 Full production
SOT339 Full production
-
-
Standard Marking * Reel Pack,
9352 159 70118
SMD, 13"
Standard Marking * Tube
9338 603 20602
N74ALS574AN N74ALS574AN
SOT146 Full production
(Signetics)
Find similar products:
74ALS573B, 74ALS574A links to the similar products page containing an overview of products that are similar in function or related to
the part number(s) as listed on this page. The similar products page includes products from the same catalog tree(s) , relevant selection
guides and products from the same functional category.
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Royal Philips Electronics
All rights reserved.
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