N74F240N,602 [NXP]

74F240 - Octal inverting buffer (3-state) DIP 20-Pin;
N74F240N,602
型号: N74F240N,602
厂家: NXP    NXP
描述:

74F240 - Octal inverting buffer (3-state) DIP 20-Pin

驱动 光电二极管 输出元件 逻辑集成电路
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INTEGRATED CIRCUITS  
74F240  
Octal inverting buffer (3-state)  
Product data  
2004 Feb 25  
Supersedes data of 2002 Mar 18  
Philips  
Semiconductors  
Philips Semiconductors  
Product data  
Octal inverting buffer  
74F240  
FEATURES  
Octal bus interface  
DESCRIPTION  
The 74F240 is an octal inverting buffer that is ideal for driving bus  
lines of buffer memory address registers. The outputs are all  
capable of sinking 64 mA and sourcing up to 15 mA. The device  
features two output enables, each controlling four of the 3-state  
outputs.  
3-state buffer outputs sink 64 mA  
15 mA source current  
TYPE  
TYPICAL PROPAGATION DELAY  
4.3 ns  
TYPICAL SUPPLY CURRENT (TOTAL)  
74F240  
37 mA  
ORDERING INFORMATION  
ORDER CODE  
COMMERCIAL RANGE  
DESCRIPTION  
PKG DWG #  
V
CC  
= 5 V ±10%, T = 0 °C to +70 °C  
amb  
20-pin plastic DIP  
20-pin plastic SOL  
20-pin plastic SSOP II  
N74F240N  
N74F240D  
N74F240DB  
SOT146-1  
SOT163-1  
SOT339-1  
INPUT AND OUTPUT LOADING AND FAN OUT TABLE  
74F (U.L.)  
HIGH/LOW  
LOAD VALUE  
HIGH/LOW  
PINS  
DESCRIPTION  
Ian, Ibn  
OEa, OEb  
Yan, Ybn  
Data inputs  
1.0/1.67  
1.0/0.33  
20 µA/1.0 mA  
20 µA/0.2 mA  
15 mA/64 mA  
Output enable inputs (Active-LOW)  
Data outputs  
750/106.7  
Note to input and output loading and fan out table  
One (1.0) FAST unit load is defined as: 20 µA in the HIGH state and 0.6 mA in the LOW state.  
PIN CONFIGURATION  
LOGIC SYMBOL  
OEa  
Ia0  
1
2
3
4
5
6
7
8
9
20 V  
CC  
2
4
6
8
17 15 13 11  
19 OEb  
18 Ya0  
17 Ib0  
16 Ya1  
15 Ib1  
14 Ya2  
13 Ib2  
12 Ya3  
11 Ib3  
Yb0  
Ia1  
Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3  
OEa  
OEb  
Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3  
1
Yb1  
Ia2  
19  
Yb2  
Ia3  
Yb3  
18 16 14 12  
3
5
7
9
GND 10  
V
= Pin 20  
CC  
GND = Pin 10  
SF00320  
SF00321  
2
2004 Feb 25  
Philips Semiconductors  
Product data  
Octal inverting buffer  
74F240  
IEC/IEEE SYMBOL  
LOGIC DIAGRAM  
2
18  
16  
17  
15  
3
1
EN1  
Ia0  
Ya0  
Ya1  
Ib0  
Ib1  
Yb0  
19  
EN2  
4
5
Ia1  
Yb1  
2
18  
16  
14  
12  
2D  
1
2
4
6
14  
12  
13  
11  
7
Ia2  
Ya2  
Ya3  
Ib2  
Ib3  
Yb2  
6
8
8
9
Ia3  
Yb3  
17  
3
5
15  
13  
11  
1
10  
OEa  
OEb  
7
9
V
= Pin 20  
CC  
GND = Pin 10  
SF00322  
SF00323  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
OEa  
Ia  
L
OEb  
Ib  
L
Ya  
Yb  
H
L
L
L
L
H
L
L
H
H
X
H
X
H
Z
Z
NOTES:  
H = High voltage level  
L
X
Z
=
=
=
Low voltage level  
Don’t care  
High impedance “off” state  
ABSOLUTE MAXIMUM RATINGS  
(Operation beyond the limit set forth in this table may impair the useful life of the device.  
Unless otherwise noted these limits are over the operating free air temperature range.)  
SYMBOL  
PARAMETER  
RATING  
–0.5 to +7.0  
–0.5 to +7.0  
–30 to +5  
UNIT  
V
Supply voltage  
V
CC  
V
IN  
Input voltage  
Input current  
V
I
IN  
mA  
V
V
Voltage applied to output in high output state  
Current applied to output in low output state  
Operating free air temperature range  
Storage temperature range  
–0.5 to V  
128  
OUT  
OUT  
CC  
I
mA  
°C  
°C  
T
amb  
0 to +70  
T
stg  
–65 to +150  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
SYMBOL  
PARAMETER  
UNIT  
MIN  
4.5  
NOM  
MAX  
V
Supply voltage  
5.0  
5.5  
V
V
CC  
IH  
IL  
V
V
High-level input voltage  
Low-level input voltage  
Input clamp current  
2.0  
0.8  
–18  
–15  
64  
V
I
I
I
mA  
mA  
mA  
°C  
Ik  
High-level output current  
Low-level output current  
OH  
OL  
T
amb  
Operating free air temperature range  
0
+70  
3
2004 Feb 25  
Philips Semiconductors  
Product data  
Octal inverting buffer  
74F240  
DC ELECTRICAL CHARACTERISTICS  
(Over recommended operating free-air temperature range unless otherwise noted.)  
1
SYMBOL  
PARAMETER  
TEST CONDITIONS  
LIMITS  
UNIT  
2
MIN  
2.4  
2.7  
2.0  
2.0  
TYP  
MAX  
V
±10%V  
±5%V  
CC  
I
I
= –3 mA  
OH  
OH  
I
V
= MIN; V  
3.4  
V
CC  
IL  
IL  
CC  
V
High-level output voltage  
Low-level output voltage  
= MAX; V  
MIN  
=
OH  
IH  
±10%V  
V
CC  
CC  
= –15 mA  
±5%V  
V
V
CC  
= MIN; V  
±10%V  
0.50  
V
CC  
V
OL  
= MAX  
OL  
= MAX; V  
MIN  
=
IH  
±5%V  
0.42  
0.50  
–1.2  
100  
20  
V
V
CC  
V
Input clamp voltage  
V
CC  
V
CC  
V
CC  
V
CC  
= MIN; I = I  
IK  
–0.73  
IK  
I
I
I
I
Input current at maximum input voltage  
High-level input current  
= MAX; V = 7.0 V  
µA  
µA  
mA  
I
I
= MAX; V = 2.7 V  
IH  
IL  
I
Low-level input current  
= MAX; V = 0.5 V  
–1.0  
I
Off-state output current,  
high-level voltage applied  
I
V
= MAX, V = 2.7 V  
50  
µA  
µA  
OZH  
CC  
O
Off-state output current,  
low-level voltage applied  
I
I
V
V
= MAX, V = 0.5 V  
–50  
OZL  
CC  
O
3
Short-circuit output current  
= MAX  
–100  
–225  
18  
mA  
mA  
mA  
mA  
OS  
CC  
I
12  
50  
35  
CCH  
I
Supply current (total)  
V
CC  
= MAX  
I
70  
CC  
CCL  
I
45  
CCZ  
NOTES:  
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.  
2. All typical values are at V = 5 V, T = 25 °C.  
CC  
amb  
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold  
OS  
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged  
shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In  
any sequence of parameter tests, I tests should be performed last.  
OS  
4
2004 Feb 25  
Philips Semiconductors  
Product data  
Octal inverting buffer  
74F240  
AC ELECTRICAL CHARACTERISTICS  
LIMITS  
T
amb  
= +25 °C  
T
amb  
= 0 °C to +70 °C  
SYMBOL  
PARAMETER  
TEST  
V
CC  
= +5.0 V  
V
CC  
= +5.0 V ± 10%  
UNIT  
CONDITION  
C = 50 pF; R = 500 Ω  
C = 50 pF; R = 500 Ω  
L L  
L
L
MIN  
TYP  
MAX  
MIN  
MAX  
t
t
Propagation delay  
Ian, Ibn to Yn  
3.0  
2.0  
4.5  
3.0  
6.5  
4.5  
3.0  
2.0  
7.5  
5.0  
PLH  
PHL  
Waveform 1  
Waveform 2 & 3  
Waveform 2 & 3  
ns  
ns  
ns  
t
t
Output enable time  
to high or low level  
3.0  
4.5  
5.0  
6.5  
7.5  
8.5  
3.0  
4.0  
9.0  
10.0  
PZH  
PZL  
t
t
Output disable time  
from high or low level  
3.0  
3.0  
5.5  
5.0  
7.0  
7.0  
3.0  
3.0  
7.5  
7.5  
PHZ  
PLZ  
NOTES:  
1. | t actual – t actual| for any output compared to any other output where N and M are either LH or HL.  
PN  
PM  
5
2004 Feb 25  
Philips Semiconductors  
Product data  
Octal inverting buffer  
74F240  
AC WAVEFORMS  
OEn  
OEb  
Ian, Ibn  
V
V
M
M
V
t
V
M
M
t
t
PHL  
PLH  
t
PZL  
PLZ  
3.5V  
V
V
V
M
Yn  
M
M
Yn, Yn  
SF00328  
V
+0.3V  
OL  
SF00331  
Waveform 1. Propagation delay for inverting outputs  
Waveform 3. 3-state output enable time to low level and output  
disable time from low level  
OEn  
OEb  
V
V
M
M
V
-0.3V  
0V  
Notes to AC waveforms  
OH  
t
t
PHZ  
PZH  
1. For all waveforms, V = 1.5 V.  
M
Yn, Yn  
V
M
SF00330  
Waveform 2. 3-state output enable time to high level  
and output disable time from high level  
TEST CIRCUIT AND WAVEFORMS  
V
CC  
t
AMP (V)  
0 V  
w
7.0 V  
90%  
90%  
NEGATIVE  
PULSE  
V
V
M
R
M
L
V
V
OUT  
IN  
10%  
10%  
PULSE  
GENERATOR  
D.U.T.  
t
t )  
t
t )  
THL ( f  
TLH ( r  
R
C
R
L
T
L
t
t )  
t
t )  
TLH ( r  
THL ( f  
AMP (V)  
0 V  
90%  
M
90%  
POSITIVE  
PULSE  
V
V
M
Test Circuit for Open Collector Outputs  
10%  
10%  
t
SWITCH POSITION  
TEST  
w
SWITCH  
closed  
closed  
open  
Input Pulse Definition  
t
t
PLZ  
PZL  
All other  
DEFINITIONS:  
R
=
=
=
Load resistor;  
L
INPUT PULSE REQUIREMENTS  
see AC electrical characteristics for value.  
Load capacitance includes jig and probe capacitance;  
see AC electrical characteristics for value.  
Termination resistance should be equal to Z  
pulse generators.  
family  
C
L
V
M
rep. rate  
t
w
t
t
THL  
amplitude  
TLH  
R
T
of  
OUT  
2.5 ns 2.5 ns  
500 ns  
74F  
3.0 V  
1.5 V 1 MHz  
SF00128  
6
2004 Feb 25  
Philips Semiconductors  
Product data  
Octal inverting buffer  
74F240  
DIP20: plastic dual in-line package; 20 leads (300 mil)  
SOT146-1  
7
2004 Feb 25  
Philips Semiconductors  
Product data  
Octal inverting buffer  
74F240  
SO20: plastic small outline package; 20 leads; body width 7.5 mm  
SOT163-1  
8
2004 Feb 25  
Philips Semiconductors  
Product data  
Octal inverting buffer  
74F240  
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm  
SOT339-1  
9
2004 Feb 25  
Philips Semiconductors  
Product data  
Octal inverting buffer  
74F240  
REVISION HISTORY  
Rev  
Date  
Description  
_4  
20040225  
Product data (9397 750 12941); supersedes data sheet 74F240_241_241A_3 of 2002 Mar 18 (9397 750  
09571).  
Modifications:  
Delete all references to 74F241A (product discontinued).  
Separate 74F240 and 74F241 into standalone data sheets.  
_3  
20020318  
Product data (9397 750 09571); supersedes previous version.  
10  
2004 Feb 25  
Philips Semiconductors  
Product data  
Octal inverting buffer  
74F240  
Data sheet status  
Product  
status  
Definitions  
[1]  
Level  
Data sheet status  
[2] [3]  
I
Objective data  
Development  
Qualification  
This data sheet contains data from the objective specification for product development.  
Philips Semiconductors reserves the right to change the specification in any manner without notice.  
II  
Preliminary data  
Product data  
This data sheet contains data from the preliminary specification. Supplementary data will be published  
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in  
order to improve the design and supply the best possible product.  
III  
Production  
This data sheet contains data from the product specification. Philips Semiconductors reserves the  
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant  
changes will be communicated via a Customer Product/Process Change Notification (CPCN).  
[1] Please consult the most recently issued data sheet before initiating or completing a design.  
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL  
http://www.semiconductors.philips.com.  
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see  
the relevant data sheet or data handbook.  
LimitingvaluesdefinitionLimiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting  
values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given  
in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no  
representation or warranty that such applications will be suitable for the specified use without further testing or modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be  
expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree  
to fully indemnify Philips Semiconductors for any damages resulting from such application.  
Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described  
or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated  
viaaCustomerProduct/ProcessChangeNotification(CPCN).PhilipsSemiconductorsassumesnoresponsibilityorliabilityfortheuseofanyoftheseproducts,conveys  
nolicenseortitleunderanypatent, copyright, ormaskworkrighttotheseproducts, andmakesnorepresentationsorwarrantiesthattheseproductsarefreefrompatent,  
copyright, or mask work right infringement, unless otherwise specified.  
Koninklijke Philips Electronics N.V. 2004  
Contact information  
All rights reserved. Printed in U.S.A.  
For additional information please visit  
http://www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
Date of release: 02-04  
9397 750 12941  
For sales offices addresses send e-mail to:  
sales.addresses@www.semiconductors.philips.com.  
Document order number:  
Philips  
Semiconductors  

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