NE5241D [NXP]
Dolby ADM digital audio decoder; 杜比数字ADM音频解码器
| 型号： | NE5241D |
| 厂家： | 
NXP |
| 描述： | Dolby ADM digital audio decoder |
| 文件： | 总6页 (文件大小：55K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Philips Semiconductors
Product specification
Dolby ADM digital audio decoder
NE5241
DESCRIPTION
PIN CONFIGURATION
The NE5241 is a complete stereo digital to audio converter for the
Dolby ADM digital audio system, which allows CD quality stereo
audio to be delivered with data rates on the order of 400 to 600kb/s.
The NE5241 is intended for use in high quality consumer digital
audio equipment for the reproduction of broadcast (or pre-recorded)
digital audio. The IC contains channel de-multiplexing data input
latches, control signal filter drivers and buffers, variable gain
integrators, and variable de-emphasis filters. Precision, temperature
compensated voltage reference circuitry assures accurate
performance over temperature. The IC is implemented in a bipolar
process to achieve low noise, low distortion, and wide dynamic
range. The NE5241 is an improved version of the NE5240, which
has been discontinued.
N, D Packages
MULTI OUT 1
MULTI OUT 2
1
2
28
27
V
A
CC
GND
VARZ 1
3
26 VARZ 2
OUT 1
OUT 2
4
25
24
23
FEEDBACK 1
INT IN 1
FEEDBACK 2
INT IN 2
5
6
EM FILT IN 1
EM FILT OUT 1
SS FILT IN 1
7
22 EM FILT IN 2
EM FILT OUT 2
SS FILT IN 2
8
21
20
19
18
9
SS FILT OUT 1
SS FILT OUT 2
10
11
Note:
The NE5241 is available only to licensees of Dolby Laboratories Licensing Corporation,
from who licensing and applications information must be obtained. Dolby is a registered
trademark of Dolby Laboratories Licensing Corporation, San Francisco, California.
V
D
DD
GND
SS 12
17 REX
AD
EM
13
14
16
15
V
REF
CK
APPLICATIONS
TOP VIEW
• High quality digital audio transmission systems
SR01021
• Pre-recorded digital audio
Figure 1. Pin Configuration
• Satellite delivered digital audio
• Cable TV delivered digital audio
• Microwave delivered digital audio
• Terrestrial delivered digital audio
• Digital audio for advanced television sound
FEATURES
• Wide dynamic range: >95dB
• Low distortion: <0.1% @ 1kHz, 0dB
• TTL, CMOS compatible logic inputs
• Wide bandwidth: DC to > 20kHz
• Complete decoder implementation in one IChip
ORDERING INFORMATION
DESCRIPTION
TEMPERATURE RANGE
0 to +70°C
ORDER CODE
NE5241N
DWG #
28-Pin Plastic Dual In-Line Package (DIP)
28-Pin Small Outline Large (SOL) Package
SOT117-2
SOT136-1
0 to +70°C
NE5241D
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
RATING
UNIT
V
V
CC
V
DD
Analog supply voltage
Logic supply voltage
+15
+7
V
T
Operating ambient temperature range
Storage temperature range
0 to +70
–65 to +150
–65 to +150
+300
°C
°C
°C
°C
A
T
STG
J
T
T
Junction temperature
Lead temperature (soldering 60 sec)
SOLD
Thermal impedance
N package
θ
48
70
°C/W
°C/W
JA
D package
1
March 19, 1992
853-1602 06126
Philips Semiconductors
Product specification
Dolby ADM digital audio decoder
NE5241
PIN DESCRIPTIONS
PIN #
SYMBOL
DESCRIPTION
1
MULTI OUT 1
Multiplier output, channel 1
Analog supply voltage
2
V
CC
3
VARZ 1
OUT 1
Variable impedance, channel 1
Main output, channel 1
4
5
FEEDBACK 1
INT IN 1
Summing amp input, channel 1
Integrator amp input, channel 1
Emphasis filter buffer input, channel 1
Emphasis filter driver output, channel 1
Step-size filter buffer input, channel 1
Step-size filter driver output, channel 1
Logic supply voltage
6
7
EM FILTER IN 1
EM FILTER OUT 1
SS FILTER IN 1
SS FILTER OUT 1
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
V
DD
SS
AD
EM
CK
Step-size data input
Audio data input
Emphasis data input
Data clock input
V
REF
Reference voltage bypass
Variable impedance reference resistor
Digital ground
REX
D
GND
SS FILTER OUT 2
Step-size filter driver output, channel 2
Step-size filter buffer input, channel 2
Emphasis filter driver output, channel 2
Emphasis filter buffer input, channel 2
Integrator amp input, channel 2
Summing amp input, channel 2
Main output, channel 2
SS FILTER IN 2
EM FILTER OUT 2
EM FILTER IN 2
INT IN 2
FEEDBACK 2
OUT 2
VARZ 2
Variable impedance, channel 2
Analog ground
A
GND
MULT OUT 2
Multiplier output, channel 2
2
March 19, 1992
Philips Semiconductors
Product specification
Dolby ADM digital audio decoder
NE5241
DC ELECTRICAL CHARACTERISTICS
All specifications are at T =25°C, V =5V, V =12V. Test circuit Figure 1.
A
DD
CC
LIMITS
Typ
12
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
Max
Min
10.8
4.7
V
CC
Analog supply voltage
Digital supply voltage
Analog supply current
Digital supply current
HIGH level input voltage
LOW level input voltage
HIGH level input current
LOW level input current
Data setup time
13.2
5.3
40
V
V
V
DD
5
I
I
25
mA
mA
V
CC
DD
12
20
V
IH
V
IL
2.0
Pins SS, AD, EM
Pins SS, AD, EM = 2V
Pins SS, AD, EM = 0.8V
0.8
10
5
V
I
I
t
t
I
1
1
µA
µA
ns
ns
nA
dB
IH
IL
S
H
B
150
150
Data hold time
Control signal buffer bias current
Integrating amp gain
10
22
30
AC ELECTRICAL CHARACTERISTICS
All specifications are at T =25°C, V =5V, V =12V, Audio data rate = 204kHz. 0dB is defined as 0.775V
. Test circuit Figure 4.
A
DD
CC
RMS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
Min
Typ
–4.5
0.2
Max
–2.5
1.2
1
Output voltage (reference level)
–6
dBu
dB
dB
dB
dB
dB
1
Channel balance (reference level)
2
Channel balance change
20% < SS < 80%
10% < SS < 90%
20% < SS < 80%
10% < SS < 90%
0.2
1.0
2
Channel balance change
0.4
1.5
3
Step-size tracking error
0.5
3.0
3
Step-size tracking error
1.0
4.0
4
Headroom
13
5
Noise
20Hz – 20kHz
CCIR/ARM
CCIR/ARM
–80
–89
–93
98
–78
–85
–88
dBu
dBu
dBu
5
Noise
6
Mute noise
7
Dynamic range
1
THD
THD
Total harmonic distortion
0dB (ref level)
0.8
0.2
0.5
1
%
8
Total harmonic distortion
+13dB (max level)
0.13
0.2
%
9
Variable de-emph calibration error
Freq. response error
8kHz E = 40%
–1
dB
dB
dB
dB
dB
dB
dB
M
2kHz E = 10%
–1.8
–2.3
–2.5
0.2
1.5
2.3
2.5
–30
–24
M
Freq. response error
12kHz E = 60%
0.25
0.5
M
Freq. response error
15kHz E = 70%
M
10
Dynamic offset, emphasis
AC measurement
AC measurement
1kHz
–43
–39
75
11
Dynamic offset, step-size
Channel separation
NOTES: Test patterns referred to are produced by the Dolby Cat. No. 346 ADM Test Data Generator.
1. Dolby ADM reference level, Dolby test pattern 00. This is 10dB below the nominal 100% modulation level.
2. The channel balance may change over the operating range. This specification is the channel balance change from the intial channel
balance which was measured at reference level.
3. The gain should change by 36.12dB as the step-size data is changed from 20% to 80% duty cycle, or 48.16dB as the data changes from
10% to 90%. The tracking error is the amount by which the gain change deviates from the desired value.
4. This is headroom over Dolby ADM reference level.
5. Idling data patterns, Dolby test pattern 02 with respect to test 01.
6. Muted data patterns, Dolby test pattern 04.
7. Difference between output voltage plus headroom, and CCIR/ARM weighted mute noise level.
8. Test level is 13dB over Dolby ADM reference level. Dolby test pattern 08.
9. Measured at 8.00kHz, with emphasis data at 40% duty cycle. This may be trimmed to zero by adjusting the resistor at Pin 17.
10.Dolby test pattern 48 relative to test 00. Duty cycle alternates from 10 to 70%.
11. Dolby test pattern 49 relative to test 00. Duty cycle alternates from 10 to 70%.
3
March 19, 1992
Philips Semiconductors
Product specification
Dolby ADM digital audio decoder
NE5241
desirable to place a ground plane under the NE5241. This reduces
the inevitable cross-talk of the digital data (with several volts of
swing) into the audio (which has a noise level on the order of 40µV).
A ground plane is necessary to obtain the ultimate in noise
performance.
APPLICATIONS INFORMATION
The application diagram shows the complete Dolby ADM decoder
using the NE5241. The decoder is followed by a line driving
amplifier, which, depending on the application, may not be
necessary. For best frequency response accuracy, the following
parts should be tight tolerance: R13 to R21 should be 1%, and C13
to C20 should be 2.5%. The variable de-emphasis pole position
may be trimmed by adjusting the value of R17. The variable
impedance Pins 3 and 26 are very sensitive to noise pickup. Keep
the lead to C15 and C18 as short as possible. Excessive stray
capacitance on the multiplier output, Pins 1 and 28, will adversely
affect performance. Keep the leads to R13 and R19 short. It is
The timing diagram illustrates how the data is clocked into the
NE5241. The two audio channels share the three data input lines:
audio data, step-size data, and emphasis data. During the
low-to-high clock transition, the data is clocked into channel 1.
During the high-to-low clock transition, the data is clocked into
channel 2. The data must be stable during the clock transition.
TIMING DIAGRAM
CLOCK
t
t
H
S
AUDIO DATA
STEP-SIZE DATA
EMPHASIS DATA
CH 1
CH 2
CH 1
CH 2
CH 1
SR01022
Figure 2. Timing Diagram
4
March 19, 1992
Philips Semiconductors
Product specification
Dolby ADM digital audio decoder
NE5241
BLOCK DIAGRAM AND TEST CIRCUIT
R1
4.3k
R2
43k
R3
360k
R15
4.87k
C1
0.47µF
C2
47nF
C3
4.7nF
R13
4.99k
R14
499k
R4
4.3k
R5
43k
R6
360k
C13
0.1µF
C14
10nF
V
DD
11
C4
0.47µF
C5
47nF
C6
4.7nF
10
8
9
5
7
1
6
INTEGRATOR
AMP
SUMMING
AMP
V
R16 OUT
22dB
–
+
6.34k
CH.A
4
X
V
e
DD
14dB
C16
3.9nF
C15
220pF
12
13
14
15
NE5241
SSD
AD
3
2
V
REFERENCE
GENERATOR
CC
17
16
REX
V
V
V
H
R
L
INPUT
LOGIC
R17
V
220µF
118k
REF
SBD
CK
27 C17
A
GND
26
SUMMING
AMP
C18
220pF
X
e
V
CH.B
D
OUT
GND
INTEGRATOR
AMP
+
–
25 R18
6.34k
C19
3.9nF
18
19
24
22
23
21
20
28
NOTE:
One channel of the application shown with external components.
SR01023
Figure 3. Block Diagram and Test Circuit
5
March 19, 1992
Philips Semiconductors
Product specification
Dolby ADM digital audio decoder
NE5241
DOLBY ADM DECODER
R1
4.3k
R2
43k
R3
360k
C1
0.47µF
C2
47nF
C3
4.7nF
LINE DRIVE AMPLIFIER
R14
499
R22
1k
R4
4.3k
R5
R6
360k
43k
C14
10nF
1nF
C4
0.47µF
C5
47nF
C6
4.7nF
R13
0.1µF
R15
4.99k
4.87k
R24
100
CH 1
OUT
IC
C24
22µF
–
+
10
8
7
9
DATA INPUT
6.3k
SS EM
FILTER
OUT 1
EM SS
FILTER
IN 1
FEED–
MULT
OUT 1
INT
BACK 1
IN 1
R26
22k
4
3
C16
3.9nF
12
OUT 1
VARZ
STEP-SIZE DATA
AUDIO DATA
SS
AD
13
C15
220pF
14
15
EMPHASIS DATA
DATA CLOCK
EM
CK
16
NE5241
2
11
27
12VDC
V
CC
100µF
5VDC
V
DD
A
D
GND
GND
VARZ
18
17
C18
220pF
C18
3.9nF
FILTER
OUT 2
FILTER
IN 2
EM SS
OUT 2
C26
22µF
REX
6.3k
2
MULT
OUT 2
INT FEED–
IN 2 BACK 2
CH 2
OUT
+
–
R17
118k
SS EM
19 21
28
23
24
22 20
R25
100
4.87k
R27
22k
R19
4.99k
R10
4.3k
R11
43k
R12
360k
1nF
R21
499
C10
0.47µF
0.1µF
C11
47nF
C12
4.7nF
R23
1k
10nF
R7
4.3k
R8
43k
R9
360k
C7
C8
C9
0.47µF
47nF
4.7nF
SR01024
Figure 4. NE5241 Application Circuit
6
March 19, 1992
相关型号：
NE527H
IC COMPARATOR, 10000 uV OFFSET-MAX, 16 ns RESPONSE TIME, MBCY10, HERMETIC SEALED, METAL CAN, TO-5, 10 PIN, Comparator
NXP
©2020 ICPDF网 联系我们和版权申明