NX3L1G3157GM-G [NXP]
IC,ANALOG SWITCH,SINGLE,SPDT,CMOS,LLCC,6PIN,PLASTIC;
| 型号： | NX3L1G3157GM-G |
| 厂家： | 
NXP |
| 描述： | IC,ANALOG SWITCH,SINGLE,SPDT,CMOS,LLCC,6PIN,PLASTIC 开关 |
| 文件： | 总18页 (文件大小：119K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NX3L1G3157
Low-ohmic, single-pole, double-throw switch
Rev. 01 — 8 October 2007
Product data sheet
1. General description
The NX3L1G3157 provides one, low-ohmic, single-pole, double-throw analog switch
suitable for use as an analog or digital multiplexer/demultiplexer. It has a digital select
input (S) with Schmitt-trigger action, two independent inputs/outputs (Y0, Y1) and a
common input/output (Z).
Schmitt-trigger action at the select input (S) makes the circuit tolerant to slower input rise
and fall times across the entire VCC range from 1.4 V to 3.6 V.
The NX3L1G3157 allows signals with amplitude up to VCC to be transmitted from Z to Y0
or Y1; or from Y0 or Y1 to Z. It’s low ON resistance (0.5 Ω) and flatness (0.13 Ω) ensures
minimal attenuation and distortion of transmitted signals.
2. Features
■ Wide supply voltage range from 1.4 V to 3.6 V
■ Very low ON resistance:
◆ 1.6 Ω (typical) at VCC = 1.4 V
◆ 1.0 Ω (typical) at VCC = 1.65 V
◆ 0.55 Ω (typical) at VCC = 2.3 V
◆ 0.50 Ω (typical) at VCC = 2.7 V
■ Break-before-make switching
■ High noise immunity
■ ESD protection:
◆ HBM JESD22-A114E Class 3A exceeds 7500 V
◆ MM JESD22-A115-A exceeds 200 V
◆ CDM AEC-Q100-011 revision B exceeds 1000 V
■ CMOS low-power consumption
■ Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
■ Direct interface with TTL levels at 3.0 V
■ Control input accepts voltages above supply voltage
■ High current handling capability (350 mA continuous current under 3.3 V supply)
■ Specified from −40 °C to +85 °C and from −40 °C to +125 °C
3. Applications
■ Cell phone
■ PDA
■ Portable media player
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
4. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
NX3L1G3157GM
−40 °C to +125 °C
XSON6 plastic extremely thin small outline package; no leads; SOT886
6 terminals; body 1 × 1.45 × 0.5 mm
5. Marking
Table 2.
Marking
Type number
Marking code
NX3L1G3157GM
MJ
6. Functional diagram
Y1
S
Z
S
Z
6
4
1
3
Y1
Y0
Y0
001aac354
001aac355
Fig 1. Logic symbol
Fig 2. Logic diagram
7. Pinning information
7.1 Pinning
NX3L1G3157
Y1
GND
Y0
1
2
3
6
5
4
S
V
Z
CC
001aag562
Transparent top view
Fig 3. Pin configuration SOT886 (XSON6)
NX3L1G3157_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 8 October 2007
2 of 18
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
7.2 Pin description
Table 3.
Symbol
Y1
Pin description
Pin
1
Description
independent input or output
ground (0 V)
GND
Y0
2
3
independent input or output
common output or input
supply voltage
Z
4
VCC
S
5
6
select input
8. Functional description
Table 4.
Function table[1]
Input S
Channel on
L
Y0
Y1
H
[1] H = HIGH voltage level;
L = LOW voltage level.
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
VI
Parameter
Conditions
Min
−0.5
−0.5
−0.5
−50
-
Max
+4.6
+4.6
Unit
V
supply voltage
input voltage
[1]
[2]
V
VSW
IIK
switch voltage
input clamping current
VCC + 0.5 V
VI < −0.5 V
-
mA
ISK
switch clamping current VI < −0.5 V or VI > VCC + 0.5 V
±50
±350
mA
mA
ISW
switch current
VSW > −0.5 V or VSW < VCC + 0.5 V;
-
source or sink current
VSW > −0.5 V or VSW < VCC + 0.5 V;
pulsed at 1 ms duration, < 10 % duty cycle;
peak current
-
±500
mA
Tstg
Ptot
storage temperature
total power dissipation
−65
+150
250
°C
[3]
Tamb = −40 °C to +125 °C
-
mW
[1] The minimum input voltage rating may be exceeded if the input current rating is observed.
[2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed.
[3] For XSON6 packages: above 45 °C the value of Ptot derates linearly with 2.4 mW/K.
NX3L1G3157_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 8 October 2007
3 of 18
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
10. Recommended operating conditions
Table 6.
Recommended operating conditions
Symbol Parameter
Conditions
Min
1.4
0
Typ
Max
3.6
Unit
V
VCC
VI
supply voltage
-
-
-
-
-
input voltage
select input S
3.6
V
[1]
[2]
VSW
Tamb
∆t/∆V
switch voltage
0
VCC
+125
200
V
ambient temperature
input transition rise and fall rate
−40
-
°C
ns/V
VCC = 1.4 V to 3.6 V
[1] To avoid sinking GND current from terminal Z when switch current flows in terminal Yn, the voltage drop across the bidirectional switch
must not exceed 0.4 V. If the switch current flows into terminal Z, no GND current will flow from terminal Yn. In this case, there is no limit
for the voltage drop across the switch.
[2] Applies to control signal levels.
11. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground 0 V).
Symbol Parameter
Conditions
25 °C
−40 °C to +125 °C
Unit
Min
Typ
Max
Min
Max
Max
(85 °C) (125 °C)
VIH
HIGH-level
input voltage
VCC = 1.4 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 1.4 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
0.65VCC
-
-
-
-
-
-
-
-
0.65VCC
-
-
-
-
-
-
V
1.7
-
1.7
V
2.0
-
0.35VCC
0.7
2.0
V
VIL
LOW-level
input voltage
-
-
-
-
-
-
-
-
0.35VCC 0.35VCC
V
0.7
0.8
0.7
0.8
±1
V
0.8
V
II
input leakage select input S;
-
±0.5
µA
current
VI = GND to 3.6 V;
CC = 1.4 V to 3.6 V
V
IS(OFF)
IS(ON)
ICC
OFF-state
leakage
current
Y0 and Y1 port;
CC = 1.4 V to 3.6 V;
see Figure 4
-
-
-
-
-
-
±5
±5
100
-
-
-
-
-
±50
±50
690
-
±500 nA
±500 nA
6000 nA
V
ON-state
leakage
current
Z port;
VCC = 1.4 V to 3.6 V;
see Figure 5
supply current VI = VCC or GND;
-
VCC = 3.6 V;
VSW = GND or VCC
CI
input
1.0
-
pF
capacitance
NX3L1G3157_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 8 October 2007
4 of 18
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
Table 7.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground 0 V).
Symbol Parameter
Conditions
25 °C
−40 °C to +125 °C
Unit
Min
Typ
Max
Min
Max
Max
(85 °C) (125 °C)
CS(OFF) OFF-state
capacitance
-
-
35
-
-
-
-
-
-
pF
pF
CS(ON)
ON-state
130
-
-
capacitance
11.1 Test circuits
switch
S
V
CC
1
2
V
IH
V
IL
S
Z
Y0
Y1
1
2
V
or V
IH
IL
switch
I
S
V
V
O
I
GND
001aac358
VI = 0.3 V or VCC − 0.3 V; VO = VCC − 0.3 V or 0.3 V.
Fig 4. Test circuit for measuring OFF-state leakage current
switch
S
V
CC
1
2
V
IH
V
IL
S
Z
Y0
Y1
1
2
V
or V
IH
IL
switch
I
S
V
V
I
O
GND
001aac359
VI = 0.3 V or VCC − 0.3 V; VO = VCC − 0.3 V or 0.3 V.
Fig 5. Test circuit for measuring ON-state leakage current
NX3L1G3157_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 8 October 2007
5 of 18
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
11.2 ON resistance
Table 8.
ON resistance
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 7 to Figure 12.
Symbol Parameter
Conditions
−40 °C to +85 °C
−40 °C to +125 °C Unit
Min Typ[1] Max
Min
Max
RON(peak) ON resistance (peak)
VI = GND to VCC
;
I
SW = 100 mA;
see Figure 6
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
-
-
-
-
1.6
1.0
4.5
2.0
-
-
-
-
5.5
2.5
1.0
0.9
Ω
Ω
Ω
Ω
0.55
0.5
0.8
0.75
[2]
∆RON
ON resistance mismatch VI = GND to VCC
;
;
between channels
I
SW = 100 mA
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
-
-
-
-
0.08
0.08
0.07
0.07
0.3
0.2
0.2
0.2
-
-
-
-
0.3
0.3
0.2
0.2
Ω
Ω
Ω
Ω
[3]
RON(flat)
ON resistance (flatness) VI = GND to VCC
I
SW = 100 mA
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
-
-
-
-
1.0
0.5
4.0
1.5
0.3
0.3
-
-
-
-
4.0
1.5
Ω
Ω
Ω
Ω
0.15
0.13
0.35
0.35
[1] Typical values are measured at Tamb = 25 °C.
[2] Measured at identical VCC, temperature and input voltage.
[3] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and
temperature.
NX3L1G3157_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 8 October 2007
6 of 18
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
11.3 ON resistance test circuit and graphs
001aag564
1.6
R
ON
(Ω)
1.2
(1)
(2)
V
SW
V
0.8
0.4
0
switch
S
V
CC
1
2
V
IL
V
IH
S
Z
Y0
Y1
1
2
V
or V
IH
IL
switch
(3) (4)
(5)
V
I
SW
I
GND
0
1
2
3
4
V (V)
I
001aag563
RON = VSW/ISW
.
(1) VCC = 1.5 V.
(2) VCC = 1.8 V.
(3) VCC = 2.5 V.
(4) VCC = 2.7 V.
(5) VCC = 3.3 V.
Measured at Tamb = 25 °C.
Fig 6. Test circuit for measuring ON resistance
Fig 7. Typical ON resistance as a function of input
voltage
001aag565
001aag566
1.6
1.0
R
(Ω)
ON
R
(Ω)
ON
0.8
1.2
(1)
(2)
(3)
(4)
0.6
0.4
0.2
0
(1)
(2)
(3)
(4)
0.8
0.4
0
0
1
2
3
0
1
2
3
V (V)
I
V (V)
I
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
Fig 8. ON resistance as a function of input voltage;
CC = 1.5 V
Fig 9. ON resistance as a function of input voltage;
VCC = 1.8 V
V
NX3L1G3157_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 8 October 2007
7 of 18
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
001aag567
001aag568
1.0
1.0
R
ON
R
ON
(Ω)
(Ω)
0.8
0.8
0.6
0.4
0.2
0
0.6
0.4
0.2
0
(1)
(2)
(3)
(4)
(1)
(2)
(3)
(4)
0
1
2
3
0
1
2
3
V (V)
V (V)
I
I
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
Fig 10. ON resistance as a function of input voltage;
CC = 2.5 V
Fig 11. ON resistance as a function of input voltage;
VCC = 2.7 V
V
001aag569
1.0
R
ON
(Ω)
0.8
0.6
0.4
0.2
0
(1)
(2)
(3)
(4)
0
1
2
3
4
V (V)
I
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
Fig 12. ON resistance as a function of input voltage; VCC = 3.3 V
NX3L1G3157_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 8 October 2007
8 of 18
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
12. Dynamic characteristics
Table 9.
Dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 15.
Symbol Parameter
Conditions
25 °C
−40 °C to +125 °C
Unit
Min Typ[1] Max
Min
Max
Max
(85 °C) (125 °C)
[2]
[3]
[4]
ten
enable time
S to Z or Yn;
see Figure 13
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
-
-
-
-
28
23
17
14
43
35
27
25
-
-
-
-
48
38
29
27
52
42
32
30
ns
ns
ns
ns
tdis
disable time
S to Z or Yn;
see Figure 13
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
-
-
-
-
9
6
5
4
20
15
11
10
-
-
-
-
25
20
14
12
30
23
16
14
ns
ns
ns
ns
tb-m
break-before-make see Figure 14
time
VCC = 1.4 V to 1.6 V
-
-
-
-
19
17
13
10
-
-
-
-
4
4
2
2
-
-
-
-
-
-
-
-
ns
ns
ns
ns
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.5 V, 1.8 V, 2.5 V and 3.3 V respectively.
[2] ten is the same as tPZH and tPZL
[3] tdis is the same as tPLZ and tPHZ
[4] Break-before-make guaranteed by design.
NX3L1G3157_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 8 October 2007
9 of 18
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
12.1 Waveform and test circuits
V
I
V
M
S input
GND
t
t
en
dis
V
OH
V
V
X
X
Z output
OFF to HIGH
HIGH to OFF
Y1 connected to V
EXT
GND
t
t
en
dis
V
OH
V
V
X
X
Z output
Y0 connected to V
EXT
HiGH to OFF
OFF to HIGH
001aag570
GND
Measurement points are given in Table 10.
Logic level: VOH is typical output voltage level that occurs with the output load.
Fig 13. Enable and disable times
Table 10. Measurement points
Supply voltage
VCC
Input
VM
Output
VX
1.4 V to 3.6 V
0.5VCC
0.9VOH
NX3L1G3157_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 8 October 2007
10 of 18
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
V
CC
S
Z
Y0
Y1
G
V
= 1.5 V
EXT
V
V
R
L
C
L
V
I
O
GND
001aag571
a. Test circuit
V
I
0.5V
I
0.9V
O
0.9V
O
V
O
t
b-m
001aag572
b. Input and output pulse definitions
Fig 14. Test circuit for measuring break-before-make timing
V
CC
S
Z
Y0
Y1
1
2
switch
G
V
V
V
R
L
C
L
V
= 1.5 V
EXT
I
O
GND
001aag642
Test data is given in Table 11.
Definitions test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
VEXT = External voltage for measuring switching times.
Fig 15. Load circuit for switching times
Table 11. Test data
Supply voltage
VCC
Input
VI
Load
CL
tr, tf
RL
1.4 V to 3.6 V
VCC
≤ 2.5 ns
35 pF
50 Ω
NX3L1G3157_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 8 October 2007
11 of 18
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
12.2 Additional dynamic characteristics
Table 12. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
25 °C
−40 °C to +125 °C
Max Min Max Max
(85 °C) (125 °C)
Unit
Min
Typ
THD
total harmonic distortion fi = 20 Hz to 20 KHz;
RL = 32 Ω; see Figure 16
VCC = 1.4 V;
VI = 1 V (p-p)
-
-
-
-
0.15
0.10
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
%
%
%
%
VCC = 1.65 V;
VI = 1.2 V (p-p)
VCC = 2.3 V;
VI = 1.5 V (p-p)
0.015
0.024
VCC = 2.7 V;
VI = 2 V (p-p)
f(-3dB)
−3 dB frequency
RL = 50 Ω; see Figure 17
response
VCC = 1.4 V to 3.6 V
-
-
60
-
-
-
-
-
-
-
-
MHz
dB
αiso
isolation (OFF-state)
RL = 50 Ω; fi = 100 KHz;
see Figure 18
VCC = 1.4 V to 3.6 V
−90
Qinj
charge injection
CL = 0.1 nF; Vgen = 0 V;
R
gen = 0 Ω; fi = 1 MHz;
RL = 1 MΩ; see Figure 19
VCC = 1.5 V
-
-
-
-
3
4
6
9
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
pC
pC
pC
pC
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
12.3 Test circuits
V
0.5V
CC
CC
switch
S
R
L
1
2
V
IL
S
Z
Y0
Y1
1
2
V
or V
IH
IL
switch
V
IH
0.1 µF
10 µF
f
D
i
GND
001aag573
Fig 16. Test circuit for measuring total harmonic distortion
NX3L1G3157_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 8 October 2007
12 of 18
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
V
0.5V
CC
CC
switch
S
R
L
1
2
V
IL
S
Z
Y0
Y1
1
2
V
or V
IH
IL
switch
V
IH
0.1 µF
f
i
dB
GND
001aag574
Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads −3 dB.
Fig 17. Test circuit for measuring the frequency response when channel is in ON-state
0.5V
V
0.5V
CC
CC
CC
switch
S
R
L
R
L
1
2
V
IH
S
Z
Y0
Y1
1
2
V
or V
IH
IL
switch
V
IL
0.1 µF
f
dB
i
GND
001aag561
Adjust fi voltage to obtain 0 dBm level at input.
Fig 18. Test circuit for measuring isolation (OFF-state)
NX3L1G3157_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 8 October 2007
13 of 18
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
V
CC
S
Z
Y0
Y1
1
2
switch
R
gen
G
V
V
R
L
C
L
I
O
V
gen
GND
001aac366
a. Test circuit
logic
input
(S) off
on
off
V
O
∆V
O
001aac478
b. Input and output pulse definitions
Definition: Qinj = ∆VO × CL.
∆VO = output voltage variation.
Rgen = generator resistance.
Vgen = generator voltage.
Fig 19. Test circuit for measuring charge injection
NX3L1G3157_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 8 October 2007
14 of 18
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
13. Package outline
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
b
1
2
3
4×
(2)
L
L
1
e
6
5
4
e
1
e
1
6×
(2)
A
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
A
1
UNIT
b
D
E
e
e
L
L
1
1
max max
0.25
0.17
1.5
1.4
1.05
0.95
0.35 0.40
0.27 0.32
mm
0.5 0.04
0.6
0.5
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
REFERENCES
JEDEC JEITA
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
04-07-15
04-07-22
SOT886
MO-252
Fig 20. Package outline SOT886 (XSON6)
NX3L1G3157_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 8 October 2007
15 of 18
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
14. Abbreviations
Table 13. Abbreviations
Acronym
CDM
CMOS
DUT
Description
Charged Device Model
Complementary Metal Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
HBM
MM
Machine Model
PDA
Personal Digital Assistant
Transistor-Transistor Logic
TTL
15. Revision history
Table 14. Revision history
Document ID
Release date
20071008
Data sheet status
Change notice
Supersedes
NX3L1G3157_1
Product data sheet
-
-
NX3L1G3157_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 8 October 2007
16 of 18
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
malfunction of a NXP Semiconductors product can reasonably be expected to
16.2 Definitions
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
16.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
17. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
NX3L1G3157_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 8 October 2007
17 of 18
NX3L1G3157
NXP Semiconductors
Low-ohmic, single-pole, double-throw switch
18. Contents
1
2
3
4
5
6
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
7
7.1
7.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
8
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 4
9
10
11
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
ON resistance. . . . . . . . . . . . . . . . . . . . . . . . . . 6
ON resistance test circuit and graphs. . . . . . . . 7
11.1
11.2
11.3
12
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveform and test circuits . . . . . . . . . . . . . . . 10
Additional dynamic characteristics . . . . . . . . . 12
Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
12.1
12.2
12.3
13
14
15
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 17
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 17
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 8 October 2007
Document identifier: NX3L1G3157_1
相关型号：
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