NX3L4051 [NXP]
Single low-ohmic 8-channel analog switch; 单低欧姆8通道模拟开关型号: | NX3L4051 |
厂家: | NXP |
描述: | Single low-ohmic 8-channel analog switch |
文件: | 总23页 (文件大小:222K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NX3L4051
Single low-ohmic 8-channel analog switch
Rev. 2 — 12 August 2010
Product data sheet
1. General description
The NX3L4051 is an 8-channel analog switch, suitable for use as an analog or digital
multiplexer/demultiplexer. The NX3L4051 has three digital select inputs (S1 to S3), eight
independent inputs/outputs (Y0 to Y7) and a common input/output (Z). All eight switches
share an enable input (E). A HIGH on E causes all switches into the high impedance
OFF-state, independent of Sn. Schmitt trigger action at the select input (Sn and E) makes
the circuit tolerant to slower input rise and fall times across the entire VCC range from
1.4 V to 4.3 V.
A low input voltage threshold allows pin Sn and E to be driven by lower level logic signals
without a significant increase in supply current ICC. This makes it possible for the
NX3L4051 to switch 4.3 V signals with a 1.8 V digital controller, eliminating the need for
logic level translation. The NX3L4051 allows signals with amplitude up to VCC to be
transmitted from Z to Yn or from Yn to Z. Its low ON resistance (0.5 ) and flatness
(0.13 ) ensures minimal attenuation and distortion of transmitted signals.
2. Features and benefits
Wide supply voltage range from 1.4 V to 4.3 V
Very low ON resistance (peak):
1.7 (typical) at VCC = 1.4 V
1.0 (typical) at VCC = 1.65 V
0.6 (typical) at VCC = 2.3 V
0.5 (typical) at VCC = 2.7 V
0.5 (typical) at VCC = 4.3 V
Break-before-make switching
High noise immunity
ESD protection:
HBM JESD22-A114F Class 3A exceeds 7500 V
MM JESD22-A115-A exceeds 200 V
CDM AEC-Q100-011 revision B exceeds 1000 V
CMOS low-power consumption
Latch-up performance exceeds 100 mA per JESD 78B Class II Level A
1.8 V control logic at VCC = 3.6 V
Control input accepts voltages above supply voltage
Very low supply current, even when input is below VCC
High current handling capability (350 mA continuous current under 3.3 V supply)
Specified from 40 C to +85 C and from 40 C to +125 C
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
3. Applications
Cell phone
PDA
Portable media player
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
4. Ordering information
Table 1.
Ordering information
Type number Package
Temperature range Name
Description
Version
NX3L4051HR 40 C to +125 C
HXQFN16U plastic thermal enhanced extremely thin quad flat
package; no leads; 16 terminals; UTLP based;
body 3 3 0.5 mm
SOT1039-1
NX3L4051PW 40 C to +125 C
TSSOP16
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
5. Marking
Table 2.
Marking codes
Type number
NX3L4051HR
NX3L4051PW
Marking code
M41
X3L4051
NX3L4051
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 12 August 2010
2 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
6. Functional diagram
V
CC
16
13 Y0
14 Y1
15 Y2
12 Y3
S1 11
S2 10
S3
9
1-OF-8
DECODER
LOGIC
1
5
2
4
3
Y4
Y5
Y6
Y7
Z
13
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
11
10
9
14
15
12
1
S1
S2
S3
5
E
6
2
6
4
E
3
Z
8
GND
001aal658
001aal657
Pin numbers are shown for TSSOP16 package only.
Pin numbers are shown for TSSOP16 package only.
Fig 1. Logic symbol
Fig 2. Functional diagram
NX3L4051
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 12 August 2010
3 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
7. Pinning information
7.1 Pinning
terminal 1
index area
NX3L4051
Z
Y7
Y5
E
1
2
3
4
12 Y1
11 Y0
10 Y3
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Y4
Y6
V
CC
NX3L4051
Y2
Y1
Y0
Y3
S1
S2
S3
Z
Y7
9
S1
Y5
E
n.c.
GND
001aal659
Transparent top view
001aal660
Fig 3. Pin configuration SOT1039-1 (HXQFN16U)
Fig 4. Pin configuration SOT403-1 (TSSOP16)
7.2 Pin description
Table 3.
Symbol
Pin description
Pin
Description
SOT403-1
SOT1039-1
Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 11, 12, 13, 10, 15, 3, 16, 2 13, 14, 15, 12, 1, 5, 2, 4
independent input or output
independent output or input
enable input (active LOW)
not connected
Z
1
3
E
4
6
n.c.
5
7
GND
S1, S2, S3
VCC
6
8
ground (0 V)
9, 8, 7
14
11, 10, 9
16
select input
supply voltage
NX3L4051
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 12 August 2010
4 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
8. Functional description
Table 4.
Function table[1]
Input
Channel ON
E
L
L
L
L
L
L
L
L
H
S3
L
S2
L
S1
L
Y0 = Z
Y1 = Z
Y2 = Z
Y3 = Z
Y4 = Z
Y5 = Z
Y6 = Z
Y7 = Z
switches off
L
L
H
L
L
H
H
L
L
H
L
H
H
H
H
X
L
H
L
H
H
X
H
X
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
VI
Parameter
Conditions
Sn and E
Min
0.5
0.5
0.5
50
-
Max
+4.6
+4.6
Unit
V
supply voltage
input voltage
[1]
[2]
V
VSW
IIK
switch voltage
input clamping current
VCC + 0.5 V
VI < 0.5 V
-
mA
ISK
switch clamping current VI < 0.5 V or VI > VCC + 0.5 V
50
350
mA
mA
ISW
switch current
VSW > 0.5 V or VSW < VCC + 0.5 V;
-
source or sink current
VSW > 0.5 V or VSW < VCC + 0.5 V;
pulsed at 1 ms duration, < 10 % duty cycle;
peak current
-
500
mA
Tstg
Ptot
storage temperature
total power dissipation
65
+150
C
Tamb = 40 C to +125 C
HXQFN16U
[3]
[4]
-
-
250
500
mW
mW
TSSOP16
[1] The minimum input voltage rating may be exceeded if the input current rating is observed.
[2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed but may not
exceed 4.6 V.
[3] For HXQFN16U package: above 135 C the value of Ptot derates linearly with 16.9 mW/K.
[4] For TSSOP16 package: above 60 C the value of Ptot derates linearly with 5.5 mW/K above.
NX3L4051
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 12 August 2010
5 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
10. Recommended operating conditions
Table 6.
Recommended operating conditions
Symbol Parameter
Conditions
Min
1.4
0
Max
4.3
Unit
V
VCC
VI
supply voltage
input voltage
Sn and E
4.3
V
[1]
VSW
Tamb
t/V
switch voltage
0
VCC
+125
200
V
ambient temperature
input transition rise and fall rate
40
-
C
ns/V
Sn and E; VCC = 1.4 V to 4.3 V
[1] To avoid sinking GND current from terminal Z when switch current flows in terminal Yn, the voltage drop across the bidirectional switch
must not exceed 0.4 V. If the switch current flows into terminal Z, no GND current will flow from terminal Yn. In this case, there is no limit
for the voltage drop across the switch.
11. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground 0 V).
Symbol Parameter
Conditions
Tamb = 25 C
Tamb = 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Max
(85 C) (125 C)
VIH
HIGH-level
input voltage
VCC = 1.4 V to 1.6 V
0.9
0.9
1.1
1.3
1.4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.9
0.9
1.1
1.3
1.4
-
-
-
-
-
V
V
V
V
V
V
V
V
V
V
A
VCC = 1.65 V to 1.95 V
V
CC = 2.3 V to 2.7 V
-
-
-
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 4.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 4.3 V
-
-
-
-
-
-
VIL
LOW-level
input voltage
0.3
0.4
0.4
0.5
0.6
-
0.3
0.4
0.4
0.5
0.6
0.5
0.3
0.3
0.4
0.5
0.6
1
-
-
-
-
-
-
-
-
II
input leakage Sn and E;
-
-
current
VI = GND to 4.3 V;
CC = 1.4 V to 4.3 V
V
IS(OFF)
OFF-state
leakage
current
Yn ports; see Figure 5
VCC = 1.4 V to 3.6 V
VCC = 3.6 V to 4.3 V
-
-
-
-
5
-
-
50
50
500 nA
500 nA
10
IS(ON)
ON-state
leakage
current
Z port;
VCC = 1.4 V to 3.6 V;
see Figure 6
VCC = 1.4 V to 3.6 V
VCC = 3.6 V to 4.3 V
-
-
-
-
20
40
-
-
200
200
2000 nA
2000 nA
ICC
supply current VI = VCC or GND;
VSW = GND or VCC
VCC = 3.6 V
VCC = 4.3 V
-
-
-
-
100
150
-
-
500
800
5000 nA
6000 nA
NX3L4051
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 12 August 2010
6 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
Table 7.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground 0 V).
Symbol Parameter
Conditions
Tamb = 25 C
Tamb = 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Max
(85 C) (125 C)
ICC
additional
supply current
VSW = GND or VCC
VI = 2.6 V; VCC = 4.3 V
VI = 2.6 V; VCC = 3.6 V
VI = 1.8 V; VCC = 4.3 V
VI = 1.8 V; VCC = 3.6 V
VI = 1.8 V; VCC = 2.5 V
Sn and E
-
-
-
-
-
-
2.0
0.35
7.0
2.5
50
4.0
0.7
10.0
4.0
200
-
-
-
-
-
-
-
7
1
7
1
A
A
A
A
nA
pF
15
5
15
5
300
-
500
-
CI
input
1.0
capacitance
CS(OFF) OFF-state
capacitance
-
-
35
-
-
-
-
-
-
-
-
pF
pF
CS(ON)
ON-state
350
capacitance
11.1 Test circuits
V
CC
Sn
Z
V
or V
IH
IL
Yn
I
S
E
V
V
O
I
V
IH
GND
001aal661
VI = 0.3 V or VCC 0.3 V; VO = VCC 0.3 V or 0.3 V.
Fig 5. Test circuit for measuring OFF-state leakage current
V
CC
Sn
Z
V
or V
IH
IL
Yn
I
S
E
V
V
O
I
V
IL
GND
001aal662
VI = 0.3 V or VCC 0.3 V; VO = VCC 0.3 V or 0.3 V.
Fig 6. Test circuit for measuring ON-state leakage current
NX3L4051
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 12 August 2010
7 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
11.2 ON resistance
Table 8.
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 8 to Figure 14.
ON resistance[1]
Symbol Parameter Conditions Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit
Min
Typ[2]
Max
Min
Max
RON(peak) ON resistance VI = GND to VCC
;
(peak)
I
SW = 100 mA; see Figure 7
VCC = 1.4 V
-
-
-
-
-
1.7
1.0
0.6
0.5
0.5
3.7
1.6
-
-
-
-
-
4.1
1.7
0.9
0.9
0.9
VCC = 1.65 V
VCC = 2.3 V
0.8
VCC = 2.7 V
0.75
0.75
VCC = 4.3 V
[3]
RON
ON resistance VI = GND to VCC;
mismatch
between
channels
ISW = 100 mA
VCC = 1.4 V; VSW = 0.4 V
VCC = 1.65 V; VSW = 0.5 V
VCC = 2.3 V; VSW = 0.7 V
VCC = 2.7 V; VSW = 0.8 V
VCC = 4.3 V; VSW = 0.8 V
-
-
-
-
-
0.18
0.18
0.07
0.07
0.07
0.30
0.20
0.10
0.10
0.10
-
-
-
-
-
0.30
0.30
0.13
0.13
0.13
[4]
RON(flat)
ON resistance VI = GND to VCC;
(flatness)
ISW = 100 mA
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 4.3 V
-
-
-
-
-
1.0
0.5
3.3
1.2
0.3
0.3
0.4
-
-
-
-
-
3.6
1.3
0.15
0.13
0.2
0.35
0.35
0.45
[1] For NX3L4051PW (TSSOP16 package), all ON resistance values are up to 0.05 higher.
[2] Typical values are measured at Tamb = 25 C.
[3] Measured at identical VCC, temperature and input voltage.
[4] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and
temperature.
NX3L4051
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 12 August 2010
8 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
11.3 ON resistance test circuit and graphs
001aag564
1.6
R
ON
(Ω)
1.2
V
SW
V
(1)
0.8
0.4
0
V
CC
(2)
(3)
Sn
Z
V
or V
IH
IL
(4)
(5)
(6)
Yn
E
V
I
SW
I
V
IL
GND
0
1
2
3
4
5
V (V)
I
001aal663
RON = VSW / ISW
.
(1) VCC = 1.5 V.
(2) CC = 1.8 V.
V
(3) VCC = 2.5 V.
(4) VCC = 2.7 V.
(5)
(6) VCC = 4.3 V.
Measured at Tamb = 25 C.
VCC = 3.3 V.
Fig 7. Test circuit for measuring ON resistance
Fig 8. Typical ON resistance as a function of input
voltage
NX3L4051
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 12 August 2010
9 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
001aag565
001aag566
1.6
1.0
R
(Ω)
ON
R
(Ω)
ON
0.8
1.2
(1)
(2)
(3)
(4)
0.6
0.4
0.2
0
(1)
(2)
(3)
(4)
0.8
0.4
0
0
1
2
3
0
1
2
3
V (V)
I
V (V)
I
(1) Tamb = 125 C.
(2) amb = 85 C.
(1) Tamb = 125 C.
(2) amb = 85 C.
T
T
(3) Tamb = 25 C.
(4) Tamb = 40 C.
(3) Tamb = 25 C.
(4) Tamb = 40 C.
Fig 9. ON resistance as a function of input voltage;
VCC = 1.5 V
Fig 10. ON resistance as a function of input voltage;
VCC = 1.8 V
001aag567
001aag568
1.0
1.0
R
ON
R
ON
(Ω)
(Ω)
0.8
0.8
0.6
0.4
0.2
0
0.6
0.4
0.2
0
(1)
(2)
(3)
(4)
(1)
(2)
(3)
(4)
0
1
2
3
0
1
2
3
V (V)
V (V)
I
I
(1) Tamb = 125 C.
(2) amb = 85 C.
(1) Tamb = 125 C.
(2) amb = 85 C.
T
T
(3) Tamb = 25 C.
(4) Tamb = 40 C.
(3) Tamb = 25 C.
(4) Tamb = 40 C.
Fig 11. ON resistance as a function of input voltage;
VCC = 2.5 V
Fig 12. ON resistance as a function of input voltage;
VCC = 2.7 V
NX3L4051
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 12 August 2010
10 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
001aag569
001aaj896
1.0
1.0
R
ON
R
ON
(Ω)
(Ω)
0.8
0.8
(1)
(2)
(3)
(4)
0.6
0.4
0.2
0
0.6
0.4
0.2
0
(1)
(2)
(3)
(4)
0
1
2
3
4
0
1
2
3
4
5
V (V)
I
V (V)
I
(1) Tamb = 125 C.
(2) amb = 85 C.
(1) Tamb = 125 C.
(2) amb = 85 C.
T
T
(3) Tamb = 25 C.
(4) Tamb = 40 C.
(3) Tamb = 25 C.
(4) Tamb = 40 C.
Fig 13. ON resistance as a function of input voltage;
VCC = 3.3 V
Fig 14. ON resistance as a function of input voltage;
VCC = 4.3 V
12. Dynamic characteristics
Table 9.
Dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 17.
Symbol Parameter
Conditions
25 C
40 C to +125 C
Unit
Min Typ[1] Max
Min
Max
Max
(85 C) (125 C)
ten
enable time
E, Sn to Z or Yn;
see Figure 15
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 4.3 V
-
-
-
-
-
45
32
21
19
19
100
75
-
-
-
-
-
120
85
125
95
ns
ns
ns
ns
ns
50
45
55
60
45
45
50
45
50
tdis
disable time
E, Sn to Z or Yn;
see Figure 15
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 4.3 V
-
-
-
-
-
25
15
9
80
65
30
25
25
-
-
-
-
-
90
70
35
30
30
105
75
ns
ns
ns
ns
ns
40
35
8
8
35
NX3L4051
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 12 August 2010
11 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
Table 9.
Dynamic characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 17.
Symbol Parameter
Conditions
25 C
40 C to +125 C
Unit
Min Typ[1] Max
Min
Max
Max
(85 C) (125 C)
[2]
tb-m
break-before-make see Figure 16
time
VCC = 1.4 V to 1.6 V
-
-
-
-
-
19
17
12
10
9
-
-
-
-
-
9
7
4
3
2
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 4.3 V
[1] Typical values are measured at Tamb = 25 C and VCC = 1.5 V, 1.8 V, 2.5 V, 3.3 V and 4.3 V respectively.
[2] Break-before-make guaranteed by design.
12.1 Waveform and test circuits
V
I
Sn, E input
V
V
t
M
M
GND
t
dis
en
V
OH
V
V
X
X
output
OFF to HIGH
HIGH to OFF
GND
t
t
en
dis
V
OH
V
V
X
X
output
HIGH to OFF
OFF to HIGH
GND
001aal664
Measurement points are given in Table 10.
Logic level: VOH is typical output voltage level that occurs with the output load.
Fig 15. Enable and disable times
Table 10. Measurement points
Supply voltage
VCC
Input
VM
Output
VX
1.4 V to 4.3 V
0.5VCC
0.9VOH
NX3L4051
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Product data sheet
Rev. 2 — 12 August 2010
12 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
V
CC
V
or V
IH
IL
Sn
Z
Yn
E
G
V
V
= 1.5 V
EXT
V
R
L
C
L
I
V
O
V
IL
GND
001aal665
a. Test circuit
V
I
0.5V
I
0.9V
O
0.9V
O
V
O
t
b-m
001aag572
b. Input and output measurement points
Fig 16. Test circuit for measuring break-before-make timing
V
CC
V
or V
IH
IL
Sn
Z
Yn
E
G
V
V
= 1.5 V
EXT
V
R
L
C
L
I
V
O
V
IL
GND
001aal666
Test data is given in Table 11.
Definitions test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
VEXT = External voltage for measuring switching times.
VI may be connected to Sn or E.
Fig 17. Test circuit for measuring switching times
Table 11. Test data
Supply voltage
VCC
Input
VI
Load
CL
tr, tf
2.5 ns
RL
1.4 V to 4.3 V
VCC
35 pF
50
NX3L4051
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 12 August 2010
13 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
12.2 Additional dynamic characteristics
Table 12. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise
specified); tr = tf 2.5 ns; Tamb = 25 C.
Symbol Parameter
Conditions
Min
Typ
Max Unit
[1]
THD
total harmonic
distortion
fi = 20 Hz to 20 kHz; RL = 32 ; see Figure 18
VCC = 1.4 V; VI = 1 V (p-p)
VCC = 1.65 V; VI = 1.2 V (p-p)
VCC = 2.3 V; VI = 1.5 V (p-p)
VCC = 2.7 V; VI = 2 V (p-p)
VCC = 4.3 V; VI = 2 V (p-p)
RL = 50 ; see Figure 19
VCC = 1.4 V to 4.3 V
-
-
-
-
-
0.15
-
-
-
-
-
%
%
%
%
%
0.10
0.02
0.02
0.02
[1]
[1]
f(3dB)
3 dB frequency
response
-
-
15
-
-
MHz
dB
iso
isolation (OFF-state)
crosstalk voltage
fi = 100 kHz; RL = 50 ; see Figure 20
VCC = 1.4 V to 4.3 V
90
Vct
between digital inputs and switch;
fi = 1 MHz; CL = 50 pF; RL = 50 ; see Figure 21
VCC = 1.4 V to 3.6 V
VCC = 3.6 V to 4.3 V
-
-
0.2
0.3
-
-
V
V
[1]
Xtalk
Qinj
crosstalk
between switches;
fi = 100 kHz; RL = 50 ; see Figure 22
VCC = 1.4 V to 4.3 V
-
90
-
dB
charge injection
fi = 1 MHz; CL = 0.1 nF; RL = 1 M; Vgen = 0 V;
Rgen = 0 ; see Figure 23
VCC = 1.5 V
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
VCC = 4.3 V
-
-
-
-
-
3
4
-
-
-
-
-
pC
pC
pC
pC
pC
6
9
15
[1] fi is biased at 0.5VCC
.
12.3 Test circuits
V
0.5V
CC
CC
Sn
Z
R
L
V
or V
IH
IL
Yn
E
f
D
i
V
IL
GND
001aal667
Fig 18. Test circuit for measuring total harmonic distortion
NX3L4051
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 12 August 2010
14 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
V
0.5V
CC
CC
Sn
Z
R
L
V
or V
IH
IL
Yn
E
f
dB
i
V
IL
GND
001aal668
Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads 3 dB.
Fig 19. Test circuit for measuring the frequency response when channel is in ON-state
0.5V
0.5V
CC
CC
V
CC
R
L
R
L
Sn
Z
V
or V
IH
IL
Yn
E
f
dB
i
V
IH
GND
001aal669
Adjust fi voltage to obtain 0 dBm level at input.
Fig 20. Test circuit for measuring isolation (OFF-state)
NX3L4051
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Product data sheet
Rev. 2 — 12 August 2010
15 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
0.5V
0.5V
CC
CC
V
CC
R
L
R
L
Sn
V
or V
IL
IH
Z
E
Yn
logic
input
G
V
I
C
L
V
O
V
GND
001aal670
a. Test circuit
logic input
(Sn, E)
off
on
off
V
O
V
ct
001aal671
b. Input and output pulse definitions
Fig 21. Test circuit for measuring crosstalk voltage between digital inputs and switch
0.5V
0.5V
CC
CC
V
CC
R
L
R
L
Sn
Z
Y0
Yn
V
or V
IL
IH
E
f
dB
i
V
IH
GND
001aal672
Fig 22. Test circuit for measuring crosstalk between switches
NX3L4051
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 12 August 2010
16 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
V
CC
Sn
Z
Yn
E
R
gen
V
IL
G
V
V
V
R
L
C
L
I
gen
V
O
GND
001aal673
a. Test circuit
logic input
(Sn, E)
off
on
off
V
V
O
O
001aal674
b. Input and output pulse definitions
Definition: Qinj = VO CL.
VO = output voltage variation.
Rgen = generator resistance.
Vgen = generator voltage.
VI may be connected to Sn or E.
Fig 23. Test circuit for measuring charge injection
NX3L4051
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 12 August 2010
17 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
13. Package outline
HXQFN16U: plastic thermal enhanced extremely thin quad flat package; no leads;
16 terminals; UTLP based; body 3 x 3 x 0.5 mm
SOT1039-1
D
B
A
terminal 1
index area
E
A
A
1
detail X
e
1
e
1/2 e
C
M
v
C A
C
B
b
L
1
y
1
y
M
w
C
5
8
L
9
4
1
e
E
e
2
h
1/2 e
12
terminal 1
index area
16
13
X
D
h
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNIT
A
b
D
D
h
E
E
h
e
e
1
e
2
L
L
v
w
y
y
1
1
1
max
0.05 0.35
0.00 0.25
3.1
2.9
1.95
1.75
3.1
2.9
1.95
1.75
0.35
0.25
0.1
0.0
mm
0.5
0.5
1.5
1.5
0.1
0.05 0.05
0.1
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
- - -
JEDEC
JEITA
07-11-14
07-12-01
SOT1039-1
- - -
Fig 24. Package outline SOT1039-1 (HXQFN16U)
NX3L4051
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Product data sheet
Rev. 2 — 12 August 2010
18 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
Fig 25. Package outline SOT403-1 (TSSOP16)
NX3L4051
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Product data sheet
Rev. 2 — 12 August 2010
19 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
14. Abbreviations
Table 13. Abbreviations
Acronym
CDM
Description
Charged Device Model
Complementary Metal-Oxide Semiconductor
ElectroStatic Discharge
Human Body Model
CMOS
ESD
HBM
MM
Machine Model
PDA
Personal Digital Assistant
15. Revision history
Table 14. Revision history
Document ID
NX3L4051 v.2
Modifications:
NX3L4051 v.1
Release date
20100812
Data sheet status
Change notice
Supersedes
Product data sheet
-
NX3L4051 v.1
• Marking code corrected.
20100415
Product data sheet
-
-
NX3L4051
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Product data sheet
Rev. 2 — 12 August 2010
20 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
suitable for use in medical, military, aircraft, space or life support equipment,
16.2 Definitions
nor in applications where failure or malfunction of an NXP Semiconductors
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. NXP Semiconductors accepts no
liability for inclusion and/or use of NXP Semiconductors products in such
equipment or applications and therefore such inclusion and/or use is at the
customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
16.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. The product is not designed, authorized or warranted to be
NX3L4051
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 12 August 2010
21 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NX3L4051
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Product data sheet
Rev. 2 — 12 August 2010
22 of 23
NX3L4051
NXP Semiconductors
Single low-ohmic 8-channel analog switch
18. Contents
1
2
3
4
5
6
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
7
7.1
7.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
8
Functional description . . . . . . . . . . . . . . . . . . . 5
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions. . . . . . . . 6
9
10
11
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
ON resistance. . . . . . . . . . . . . . . . . . . . . . . . . . 8
ON resistance test circuit and graphs. . . . . . . . 9
11.1
11.2
11.3
12
Dynamic characteristics . . . . . . . . . . . . . . . . . 11
Waveform and test circuits . . . . . . . . . . . . . . . 12
Additional dynamic characteristics . . . . . . . . . 14
Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
12.1
12.2
12.3
13
14
15
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 20
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 20
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 21
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 22
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 12 August 2010
Document identifier: NX3L4051
相关型号:
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