P2020NXN2MHC [NXP]
QorIQ, 32-Bit Power Arch SoC, 2 X 1.2GHz, DDR2/3 w/ECC, GbE, PCIe, SRIO, USB, -40 to 125C, R2.1;
| 型号： | P2020NXN2MHC |
| 厂家： | 
NXP |
| 描述： | QorIQ, 32-Bit Power Arch SoC, 2 X 1.2GHz, DDR2/3 w/ECC, GbE, PCIe, SRIO, USB, -40 to 125C, R2.1 时钟 PC 双倍数据速率 外围集成电路 |
| 文件： | 总2页 (文件大小：121K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ommunications Platforms
QorIQ P2010 and
P2020 Processors
Overview
The QorIQ mid-performance tier, which
includes the P2020 (dual-core processor) and
P2010 (single-core processor) communications
processors, delivers high single-threaded
performance per watt for a wide variety of
applications in the networking, telecom,
military and industrial markets. These
P2 devices deliver dual- and single-core
frequencies up to 1.2 GHz on a 45 nm
technology low-power platform.
The P2020 and P2010 processors have an
Target Applications
advanced set of features for ease of use. The
optional integrated security engine supports
the cryptographic algorithms commonly used
in IPsec, SSL, 3GPP and other networking
and wireless security protocols. The 64-bit
memory controller offers future proofing against
memory technology migration with support for
both DDR2 and DDR3. It also supports error
correction codes, a baseline requirement for
any high-reliability system. Other memory types
such as flash are supported through the 16-bit
local bus, USB, SD/MMC and SPI.
The P2010 and P2020 processors serve in a
wide range of applications, notably those with
tight thermal constraints. With an available
junction temperature range of –40 °C to
+125 °C, the devices can be used in
power-sensitive defense, aerospace and
industrial applications, and less protected
outdoor environments. They enable various
combinations of data plane and control
plane workloads in networking and telecom
applications that require higher performance
but want to avoid the complexity of partitioning
the application across many cores. The
devices’ primary target applications are
networking and telecom linecards. The P2
devices, with their low power budget and high
single-threaded performance, are uniquely well-
suited for control plane applications.
The QorIQ P2020 and P2010 dual- and
single-core products are pin compatible with
the QorIQ P1 family devices in the value-
performance tier, offering four interchangeable
cost-effective solutions. Scaling from a single-
core processor at 533 MHz (P1011) to a dual-
core processor at 1.2 GHz (P2020), the two
tiers of devices together deliver an impressive
4.5x aggregate frequency range within the
same pinout.
The P2010 and P2020 processors integrate a
rich set of interfaces, including SerDes, Gigabit
Ethernet, PCI Express®, RapidIO® technology
and USB. The three 10/100/1000 Ethernet
ports support advanced packet parsing, flow
control and quality of service features, as well
as IEEE® 1588 time stamping.
The P2010 and P2020 devices are software
compatible, sharing the e500 Power
QorIQ P1 and P2 Family Comparison Chart
Architecture® core and peripherals, as well
as being fully software compatible with the
existing PowerQUICC processors. This enables
customers to create a product with multiple
performance points from a single board
design. The P2020 and P1020 dual-core
processors support symmetric and asymmetric
multiprocessing, enabling customers to scale
performance through either thread-level or
application-level parallelism.
Device Cores Top Core L2
Frequency Size
DDR 2/3
Support
GE
Ports
SerDes PCI
Serial
TDM
Express® RapidIO®
P1011
P1020
P2010
P2020
1
2
1
2
800 MHz
800 MHz
1200 MHz
1200 MHz
256 KB 32-bit with ECC 3
256 KB 32-bit with ECC 3
512 KB 64-bit with ECC 3
512 KB 64-bit with ECC 3
4
4
4
4
2
2
3
3
N/A
N/A
2
Yes
Yes
N/A
N/A
2
QorIQ P2020/P2010 Communication Processors
Power Architecture®
e500-v2 Core
512 KB
Frontside
Cache
64/32-bit
32 KB
D Cache
32 KB
I Cache
DDR2/3
Memory Controller
2x USB 2.0
eLBC
P2010–Single Core Only
Coherent System Bus
TDM
SD/MMC
DUART
2x I2C
SRIO
Security
3.3
SRIO
DMA
SPI, GPIO
1 GE
1 GE
1 GE
PCIe
PCIe
PCle
4-Lane 2.5/3 GHz SerDes
Core Complex (CPU and L2 Cache)
Accelerators and Memory Control
Basic Peripherals and Interconnect
Networking Elements
Control plane applications tend to be more
sequential in nature and thus lose scaling
efficiency with increasing number of threads or
cores. Both P2 devices, with their low power,
efficient dual-issue out-of-order e500 core,
Power Architecture technology and high 1.2
GHz frequency, offer a level of single-threaded
performance that is a perfect fit for control
plane applications.
• Serial peripheral interface
Technical Specifications
• Dual (P2020) or single (P2010) high-
performance Power Architecture
e500 cores
• Integrated security engine (SEC 3.1)
(optional)
Crypto algorithm support includes
3DES, AES, RSA/ECC, MD5/SHA,
ARC4, Kasumi, Snow 3G and FIPS
deterministic RNG
36-bit physical addressing
Double-precision floating-point support
32 KB L1 instruction cache and 32 KB
L1 data cache for each core
Single pass encryption/message
authentication for common security
protocols (IPsec, SSL, SRTP, WiMAX)
The networking linecard requires an optimal
combination of good performance to manage
a large amount of control plane traffic balanced
against low power and cost. With convenient
I/O, flexible core configurations and an
800 MHz to 1.2 GHz clock frequency
• 512 KB L2 cache with ECC. Also
configurable as SRAM and stashing
memory.
XOR acceleration
• 64-bit DDR2/DDR3 SDRAM memory
controller with ECC support
onboard security block, the P2010 and P2020
processors are well-suited for this application,
which involves controlling ASICs, managing
exceptions and routing table maintenance.
• Three 10/100/1000 Mb/s enhanced three-
speed Ethernet controllers
• Programmable interrupt controller compliant
with OpenPIC standard
TCP/IP acceleration and
classification capabilities
• Two four-channel DMA controllers
• Two I2C controllers, DUART, timers
• Enhanced local bus controller
• 16 general-purpose I/O signals
The P2010 and P2020 processors are also
well-suited for LTE and WiMAX channel card
applications. With dual-core performance in
single-core power budgets, the P2 devices
facilitate the “flattening” of the wireless
network hierarchy. The dual Serial RapidIO
interfaces allow direct connection to the DSPs
(such as the MSC8156 DSP) that implement
layer 1 processing as well as redundant
backplane connections.
IEEE 1588 support
Lossless flow control
R/G/MII, R/TBI, SGMII
FIFO interfaces
• Package: 689-pin wirebond power-BGA
(TEPBGA2)
• High-speed interfaces supporting various
multiplexing options
Software and Tools Support
• Enea®: Real-time operating system support
Four SerDes to 3.125 GHz multiplexed
across controllers
• Green Hills®: Complete portfolio of software
and hardware development tools, trace
tools and real-time operating systems
Three PCI Express interfaces
Two Serial RapidIO interfaces
Two SGMII interfaces
• Mentor Graphics®: Commercial-grade
Linux® solution
• High-Speed USB controller (USB 2.0)
Host and device support
• P2020 development system, P2020
reference design board and P2020 COM
Express development board
Enhanced host controller interface
ULPI interface to PHY
• Enhanced secure digital host controller
(SD/MMC)
For more information, visit freescale.com/QorIQ
Freescale, the Freescale logo, CoreNet, PowerQUICC and QorIQ and the Freescale logo are trademarks of Freescale Semiconductor,
Inc., Reg. U.S. Pat. & Tm. Off. All other product or service names are the property of their respective owners. The Power Architecture
and Power.org word marks and the Power and Power.org logos and related marks are trademarks and service marks licensed by
Power.org. © 2009, 2013 Freescale Semiconductor, Inc.
Document Number: QP20XXFS REV 4
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