PCA1070T-T [NXP]
IC SPECIALTY TELECOM CIRCUIT, PDSO24, Telecom IC:Other;
| 型号： | PCA1070T-T |
| 厂家： | 
NXP |
| 描述： | IC SPECIALTY TELECOM CIRCUIT, PDSO24, Telecom IC:Other |
| 文件： | 总36页 (文件大小：179K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
PCA1070
Multistandard programmable
analog CMOS transmission IC
1997 Jun 20
Product specification
Supersedes data of 1996 Mar 06
File under Integrated Circuits, IC03
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
FEATURES
• Line interface with:
– Voltage regulator with programmable DC voltage
drop
– Programmable set impedance
– Output to control an external switching MOS
transistor for pulse dialling
• Facility to regulate parameters with line current:
– Value of DC line current (bit code) readable via the
I2C-bus
– Programmable DC voltage during pulse dialling
– Circuitry for short DC settling time
– Line loss compensation with fully software
programmable characteristics (control range, stop
current) of microphone/earpiece/DTMF amplifiers
• Interface to peripheral circuits with:
– Supply for microcontroller and DTMF diallers
– Input to sense supply voltage of microcontroller and
output for reset of microcontroller
– I2C-bus (programming of parameters, control of all
logic signals)
– Fully software programmable control of sidetone
balance and DC voltage drop as a function of line
length.
– High impedance DTMF signal input
APPLICATIONS
– Input for external oscillator signal with on-chip DC
blocking
– Power-down via the I2C-bus
• Wired telephony (basic till feature phones)
• Combi-terminals (e.g. telephone and answering
machine or FAX)
– Stabilized supply for electret microphone
• Microphone and DTMF amplifiers:
• Modems and base units of cordless telephones.
– Low-noise microphone preamplifier suitable for
various types of microphones
GENERAL DESCRIPTION
The PCA1070 is a CMOS integrated circuit performing all
speech and line interface functions in fully electronic
telephone sets. The device requires a minimum of external
components. The transmission parameters are
programmable via the I2C-bus. This makes the IC
adaptable to nearly all worldwide country requirements
and to a various range of speech transducers, without
changing the (few) external components.
– Symmetrical high impedance microphone
preamplifier inputs
– Programmable gain for microphone and DTMF
channels
– Sending mute via the I2C-bus to disable microphone
amplifier and enable DTMF amplifier
– Sending mute also to be used as privacy switch
The parameters are stored in the EEPROM of a
microcontroller and are loaded into the PCA1070 during
the start-up phase of the transmission IC after hook-off.
– Dynamic limiting (speech controlled) to prevent
distortion of line signal and sidetone; programmable
maximum sending level
The PCA1070 also allows adaptation to the connected
telephone line by reading the line current via the I2C-bus
and processing it in the microcontroller.
• Receiving amplifier:
– Suitable for various types of earpieces (including
piezo)
– Programmable gain and hearing protection level
– Receiving mute via the I2C-bus to disable receiving
amplifier and enable DTMF confidence tone
– On-chip anti-sidetone circuit with programmable
sidetone balance
– Confidence tone in the earpiece during DTMF dialling
1997 Jun 20
2
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
PCA1070P
PCA1070T
DIP24
SO24
plastic dual in-line package; 24 leads (600 mil)
SOT101-1
SOT137-1
plastic small outline package; 24 leads; body width 7.5 mm
BLOCK DIAGRAM
positive line
peripheral supply
V
(1)
V
7
SLPE LN
24
REG LSI
DOC
3
DD VMC RMC
23 22 18
OREC
8
ref
5
2
4
TX
1
6
14 QR
BIAS
AND
REFERENCE
BTL RECEIVE
OUTPUT
LINE INTERFACE
POWER CONTROL
SCR
15
QR
maximum level
load select
V
PRES
PD
DPI
RRG
SLPE
Z
set
V
SS 13
DST
(0 dB)
ANTI
SIDETONE
RECEIVE
PROG-AMP
(2)
(-6 dB)
(−25 dB)
PCA1070
sidetone
balance
gain G
ra
SEND
receive mute
PROG-AMP
DTMF
17
10
(2)
(15 dB)
I
line
GAIN
CONTROL
V
P
MICROPHONE
SUPPLY
gain G
ma
(0 dB)
MIC
MIC
12
11
line current
MICROPHONE
PREAMPLIFIER
(20 dB)
DYNAMIC
LIMITER
(0 dB)
2
CLOCK
INTERFACE
TEST
CONTROL
send mute
I C-BUS
threshold
INTERFACE
19
21
20
16
9
CLK
SDA SCL
MLA944
(1)
(1)
TST
OMIC
(1) Test pins.
(2) Default value.
Fig.1 Block diagram.
3
1997 Jun 20
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
PINNING
SYMBOL PIN
DESCRIPTION
drive output
TX
1
2
3
4
5
6
7
8
REG
DOC
LSI
voltage regulator decoupling
dial output connection
line signal input
LN
positive line terminal
handbook, halfpage
SCR
Vref
sending current resistor
voltage reference decoupling
TX
REG
DOC
LSI
SLPE
1
2
24
V
23
22
21
20
DD
OREC
output receiving preamplifier; to be
left open-circuit in application
3
VMC
SDA
SCL
4
OMIC
9
output microphone preamplifier;
to be left open-circuit in application
LN
5
VP
10 supply for electret microphones
SCR
6
19 CLK
RMC
PCA1070
MIC−
11 inverting input microphone
preamplifier
V
18
17 DTMF
7
ref
OREC
OMIC
8
MIC+
12 non-inverting input microphone
preamplifier
TST
QR−
QR+
9
16
15
14
13
VSS
13 negative line terminal
V
P
10
11
QR+
14 non-inverting output of receiving
amplifier
MIC−
MIC+ 12
V
SS
QR−
15 inverting output of receiving
amplifier
MGE338
TST
16 test pin; to be connected to VSS in
application
DTMF
RMC
CLK
17 dual tone multi-frequency input
18 reset output for microcontroller
19 clock signal input
SCL
20 serial clock line input; I2C-bus
21 serial data line input/output; I2C-bus
SDA
VMC
22 input to sense supply voltage
microcontroller
VDD
23 positive supply decoupling
Fig.2 Pin configuration.
SLPE
24 slope (DC resistance) adjustment
1997 Jun 20
4
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
FUNCTIONAL DESCRIPTION
All values in the Chapter “Functional description” are
typical unless stated otherwise.
LN
handbook, halfpage
C
C
C
LSI
P
REG
C
a
R
LN-SLPE
Line interface
Z
set
R
a
DC VOLTAGE DROP
SLPE
REG
LSI
Power for the PCA1070 and its peripheral circuits is
obtained from the telephone line. The IC develops its own
supply voltage at VDD and regulates its DC voltage drop
between pins SLPE and VSS. This voltage (VSLPE) can be
programmed via the I2C-bus interface between
L
eq
R
C
b
R
P
R
LSI
V
SLPE
V
SS
MGE342
3.1 to 5.9 V and is default at 4.7 V (see Table 8).
The DC line voltage at pin LN can be calculated using the
following equation:
Fig.3 Equivalent impedance ZLN
.
VLN = VSLPE + (Iline − ILN) × RLN-SLPE
where:
Ca = DC blocking capacitor (influence negligible at
f ≥ 300 Hz for given value of CLSI
where:
ILN = DC bias current flowing into pin LN
(≈3 mA if Iline > 17 mA)
)
CLSI = capacitor at pin LSI (100 nF)
CP = internal capacitor (12 nF)
RLN-SLPE = external 20 Ω resistor between
LN and SLPE.
At line currents below 6 mA the DC voltage VSLPE is
automatically adjusted to a lower value. This means that
the operation of more sets, connected in parallel, is
possible with reduced sending and receiving levels and
relaxed performance. At line currents below 16 mA the DC
bias current ILN is reduced from ≈3 mA to a lower value to
ensure maximum possible transmit level capability under
all line current conditions.
CREG = capacitor at pin REG (470 nF)
Leq = artificial inductor
(= RP × RLN-SLPE × CREG = 10.1 H at VSLPE = 4.7 V)
RLN-SLPE = DC slope resistance (20 Ω)
RP = internal resistor (1075 kΩ at VSLPE = 4.7 V)
RLSI = internal resistor (240 kΩ).
SUPPLY FOR PERIPHERAL CIRCUITS
SET IMPEDANCE
The supply voltage VDD can be used for peripheral
circuitry. The supply capabilities depend on the
programmed DC voltage drop VSLPE and on several other
parameters as given in the following equation:
In normal conditions Iline >> ILN and the static behaviour is
equivalent to a voltage regulator diode with a series
resistor RLN-SLPE. In the audio frequency range the
dynamic impedance ZLN is determined mainly by the
internal component Zset = Ra + (Rb // C). The equivalent
impedance ZLN is shown in Fig.3. The values of Ra, Rb
and C can be programmed via the I2C-bus interface
(see Tables 9, 10 and 11).
V
DD = VSLPE − (IDD + Ip + IVP) × RSLPE−VDD
where:
IDD = internal current consumption PCA1070 (2.3 mA)
Ip = current to peripheral circuitry
IVP = current taken from VP for electret microphone
RSLPE−VDD = external resistor between SLPE and VDD
.
1997 Jun 20
5
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
DC STARTING AND SETTLING TIME
The IC is equipped with circuitry for fast DC start-up. This
circuit is automatically activated as soon as VDD reaches
3 V after hook-off, and is deactivated when VSLPE drops
below 5.9 V. This ensures that only a relatively short time
is needed to reach the default DC setting (VSLPE) of the
circuit and that VDD will not exceed the maximum permitted
voltage of 6 V.
handbook, halfpage
MGE339
V
VMC
low voltage
condition
V
RESET
0
The start-up circuit can also be activated under software
control by setting bit code DST to logic 1 via the I2C-bus.
The start-up time can be optimized by programming the bit
code DST to logic 1 during the start-up procedure.
RMC
logic 1
logic 0
In practice this is possible as soon as the microcontroller
has become operational. The DST bit can also be used to
quickly restore the DC settings (VSLPE) after long line
breaks or during reprogramming of VSLPE
.
It should be noted that the AC impedance into pin LN is
reduced considerably when DST = 1.
Fig.4 VMC timing diagram.
Power control
POWER-DOWN/STANDBY MODES
INTERNAL RESET PCA1070
The circuit can be set in power-down or standby mode.
These modes are intended for use with pulse dialling
during long line breaks and applications with memory
retention.
The PCA1070 has an internal reset circuit that monitors
the supply voltage VDD. If VDD is below the threshold level
(1.2 V) then the circuit is in reset-mode. In this mode the
current consumption is low and the internal reset is active
and writes the default values into all registers. The status
bit PRES will be set to logic 1. The microcontroller can
read this bit via the I2C-bus interface; once read it will be
set to logic 0 again.
With control bits PDx = 01, the circuit is in the power-down
mode; the typical current consumption at pin VDD is
reduced from IDD = 2.3 mA to 30 µA; the typical current
consumption at pin VMC is 4 µA. When PDx = 11 the
circuit is in the standby mode and IDD and IVMC are
reduced to 2 µA. In both conditions (power-down and
standby) the voltage stabilizer will be disabled.
When VDD passes the threshold (increasing VDD), the
circuit becomes partly active and the internal ring/speech
detector will be activated (see Section “Start-up and
switch-off behaviour”).
START-UP AND SWITCH-OFF BEHAVIOUR
This description refers to the basic application where VDD
and VMC are connected together and one supply
capacitor is used (see Fig.8).
RESET OUTPUT FOR MICROCONTROLLER
The voltage at pin VMC (microcontroller supply voltage) is
monitored by a reset circuit. If VVMC is below the threshold
level the output RMC is set to logic 1. This threshold level
is 2 V in the normal operating and power-down mode and
2.1 V in the standby mode (see Fig.4).
1997 Jun 20
6
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
Speech condition
DIAL PULSE INPUT (DPI)
After hook-off, line current will be applied to the line input
LN and the supply capacitor connected to VDD and VMC
will be charged.
The DPI bit controls output DOC (open-drain) that drives
the gate of an external MOS interrupter transistor. DPI is
controlled via the I2C-bus interface.
The internal reset signal will change from logic 1 to logic 0
when VDD passes the threshold level (1.2 V) and the circuit
becomes partly active [the line interface part is kept in
power-down mode, so that all of the line current is
available to charge the supply capacitor(s)];
If DPI is set to logic 1, pin DOC will be pulled down to
switch-off the MOSFET to generate a line break. If DPI = 0
pin DOC is high-ohmic and the interrupter transistor will
conduct the line current.
The PCA1070 can receive data via the I2C-bus (standard
I2C specifications are fulfilled for VDD ≥ 2.5 V; relaxed
performance for VDD = 1.8 to 2.5 V).
Sending channel
The PCA1070 has symmetrical microphone inputs and
accepts input signals of maximum 70 mV (peak) for
THD = 2% (VDD ≥ 2.5 V). Its input impedance is 100 kΩ
and its gain is default 41 dB. Dynamic, magnetic,
piezoelectric and electret (with built-in FET source
follower) microphones can be used. Some possible
microphone arrangements are shown in Fig.5.
When VVMC passes the microcontroller reset level of 2 V
(2.1 V in standby mode) the output RMC changes from
logic 1 to logic 0 and the circuit is switched to the normal
operating mode.
After hook-on VVMC decreases and the output RMC will
change from logic 0 to logic 1 when VVMC passes the
threshold level, however the PCA1070 will stay in the
normal operating mode until the internal reset at 1.2 V
takes place.
The gain of the sending channel can be programmed
between 30 dB and 51 dB in 1 dB steps using bit code
GMAx (6 bits). The gain of the microphone preamplifier is
20 dB (with dynamic limiter not active) and GMAx sets the
gain of the ‘sending prog-amp’ (allowed range
By decreasing VDD the internal reset signal will change
from logic 0 to logic 1 when VDD passes 1.2 V and the
circuit will go into the reset mode (line interface part in
power-down and all programmable parameters reset to
default values).
Gma = 4 to 25 dB). The gain of the line interface is 6 dB.
Thus the total gain of the sending channel (GM) is as
follows:
GM = 20 + Gma + 6 (dB)
Default: GM = 20 + 15 + 6 = 41 dB
Where Gma = ‘gain sending prog-amp’.
Ringer condition
In this condition the supply capacitor connected to VDD and
VMC is charged by the rectified ringer signal; no line
current is applied to pin LN.
Programming the gain of the ‘sending prog-amp’ is given
in Table 13.
VDD and VVMC are increasing and when VDD passes the
internal reset threshold level (1.2 V), the internal
ring/speech-detector will be activated and the circuit will
switch to the standby condition (IDD < 5 µA; IVMC < 5 µA)
before the voltage at VMC reaches the threshold level for
microcontroller reset. When VVMC passes this threshold
level (2.1 V) output RMC changes from logic 1 to logic 0
and the circuit will stay in the standby mode until line
current is applied to pin LN. By setting the ‘Reset Ring’
control bit (RRG) to logic 1 via the I2C-bus interface, the
ring/speech detector will be disabled.
1997 Jun 20
7
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
V
P
V
V
P
P
MIC+
MIC+
MIC+
MIC−
MIC+
MIC−
MIC−
MIC−
V
V
V
SS
SS
SS
(a)
(b)
(c)
(d)
MGE341
(a) Dynamic or piezo.
(b) Low impedance electret with built-in pre-amplifier.
(c) High impedance electret with built-in pre-amplifier.
(d) Symmetrical connection of electret.
Fig.5 Microphone arrangements.
Dynamic limiter
DTMF channel
To prevent distortion of the transmitted speech signal, the
gain of the microphone amplifier is reduced rapidly when
signal peaks on the line exceed an internally determined
threshold level. The time in which the gain is reduced, the
attack time, is very short. The circuit stays in this
gain-reduced condition until the peaks of the sending
signal remain below the threshold level. The sending gain
then returns to normal after a time also determined on the
chip, the release time. The threshold level of the AC
peak-to-peak line voltage on pin LN is default at
3.5 V (p-p). A level of 2.6 V (p-p) can be programmed by
setting bit code DLT to logic 1.
The PCA1070 has an asymmetrical DTMF input. Its input
impedance is 200 kΩ // 45 pF and its gain is default at
21 dB. DTMF signals can be sent to the line by setting
control bit ‘Sending Mute’ (SM) to logic 1 (default SM = 0);
by setting ‘Receiving Mute’ (RM) also to logic 1 (default
RM = 0), the dialling tones are also sent to the receiving
output to generate a confidence tone in the earpiece.
The gain between the DTMF input and the line LN can be
programmed between 1 dB and 21 dB in 1 dB steps using
bit code GMAx (6 bits). The confidence tone gain
(between DTMF input and earpiece outputs QR) can be
programmed between −40 dB and −19 dB (symmetrical
drive of earpiece) using bit code GRAx (6 bits). GMAx sets
the gain of the ‘sending prog-amp’ (recommended range in
DTMF mode for Gma = −5 to 15 dB) and GRAx sets the
gain of the ‘rec prog-amp’ (allowed range
The internal threshold level is lowered automatically if the
DC voltage setting of the circuit (VSLPE) is not high enough
to reach the programmed level. Also when the DC current
in the transmit output stage is insufficient to drive the line
load, the internal threshold level is lowered automatically.
Gra = −25 to 0 dB).
Dynamic limiting considerably improves sidetone
performance in over-drive conditions (less distortion and
limited sidetone level).
1997 Jun 20
8
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
The total gain of the DTMF channel between the DTMF
input and the line LN is as follows:
The gain of the receiving channel can be programmed
between −19 dB and +11 dB (symmetrical drive) in 1 dB
steps using bit code GRAx (6 bits).
GDTMF = Gma + 6 (dB)
GRAx sets the gain of the ‘rec prog-amp’ (allowed range
Default GDTMF = 15 + 6 = 21 dB
Gra = −19 dB to +11 dB; default Gra = −6 dB).
The confidence tone gain (DTMF to QR outputs) is:
With symmetrical drive of earpiece GCTs = Gra − 19 (dB)
Default GCTss = −6 − 19 = −25 dB.
The total gain of the receiving channel is as follows:
Symmetrical drive GRS = Gra (dB)
Default GRS = −6 dB.
At low gain settings (Gra < −10 dB), the confidence tone
gain will be slightly higher than the calculated value. This
is caused by a residual signal.
Asymmetrical or single-ended drive GRA = GRS − 6 (dB)
Default Gra = −6 − 6 (dB) = −12 dB.
Programming the gain of the ‘sending prog-amp’ and the
‘rec prog-amp’ is given in Table 13.
Programming the gain Gra of the ‘rec prog-amp’ is given in
Table 13.
Receiving channel
Sidetone balance
The gain of the receiving channel is defined between the
line connection LN and the earpiece outputs QR+ and
QR−. Its voltage gain is default −6 dB (differential drive).
The LN terminal accepts receiving signals up to 1 V (RMS)
for THD = 2%. The outputs may be used to connect
dynamic, magnetic or piezoelectric earpieces with
single-ended or differential drive. The load select bit RFC
is set default to logic 1 to guarantee stable operation in
case of a capacitive load (piezoelectric earpiece). With a
resistive load (dynamic capsule) RFC should be set to
logic 0 via the I2C-bus interface to obtain optimum
performance with respect to distortion and bandwidth.
The PCA1070 has an on-chip anti-sidetone circuit.
An internal balance impedance Zoss can be programmed
via the I2C-bus interface to match the external line
impedance Zline to give optimum sidetone suppression.
Zoss = Rsa + (Rsb // Cs).
Programming the sidetone balance impedance is given in
Tables 14, 15 and 16.
Line current control
The DC line current can be read via the I2C-bus interface.
This information can be used for the adaptation of
transmission parameters (for example line loss
Two levels for hearing protection can be selected via the
I2C-bus interface with control bit HPL.
compensation, sidetone balance and DC characteristic).
The earpiece arrangements are illustrated in Fig.6.
The bit code LCx as a function of line current is given in
Table 17.
handbook, halfpage
QR+
QR−
QR+
QR−
V
SS
MGE340
(a)
symmetrical
(b)
single-ended
Fig.6 Earpiece arrangements.
1997 Jun 20
9
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
I2C-BUS PROGRAMMING
Table 1 Programmable parameters
The following parameters (see Fig.1) can be programmed by means of a bit code via the I2C-bus:
SYMBOL
VDCx
PARAMETER
BLOCK
BITS
DESCRIPTION
DC voltage SLPE-VSS
VSLPE
line interface
line interface
3
3
3
4
1
2
1
1
1
1
4
4
4
1
6
6
1
1
ZSAx
ZSBx
ZSPx
DST
set impedance
Ra of set impedance
Rb of set impedance
fp (pole frequency) of set impedance
DC Start Time
line interface
line interface
DST
line interface
PDx
PD
DPI
power control
Power-Down
DPI
power control
Dial Pulse Input
RRG
HPL
RRG
power control
Reset RinG detector
Hearing Protection Level
Resistive/Capacitive load
maximum receiving level
load select
BTL receiving output
BTL receiving output
anti-sidetone
RFC
ZOSAx
ZOSBx
ZOSPx
RM
sidetone impedance
R
sa of sidetone impedance
sb of sidetone impedance
anti-sidetone
R
anti-sidetone
Cs of sidetone impedance
Receiving Mute
receiving mute
gain Gra
receiving mute
receiving prog-amp
sending prog-amp
sending mute
GRAx
GMAx
SM
Gain receiving prog-amp
Gain sending prog-amp
Sending Mute
gain Gma
sending mute
threshold
DLT
dynamic limiter
Dynamic Limiter Threshold
Table 2 Readable parameters
The following parameters (see also Fig.1) can be read as a bit code via the I2C-bus:
SYMBOL
PRES
PARAMETER
PRES
BLOCK
BITS
DESCRIPTION
PCA1070 Reset
Line Current
power control
gain control
1
5
LCx
line current
I2C interface
The I2C-bus interface (see “The I2C-bus and how to use it” 12NC: 9398 393 40011) is used to program the transmission
parameters and control functions.
Table 3 Device address
A6
A5
A4
A3
A2
A1
A0
R/W
0
1
0
0
0
1
0
X
All functions can be accessed by writing an 8-bit word to the PCA1070. In order to set up the PCA1070, a control
message consisting of the device address, a R/W bit, a subaddress byte and one or more data bytes must be written to
the PCA1070. If more than one data byte follows the subaddress, these bytes are stored in the successive registers by
the automatic increment feature.
1997 Jun 20
10
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
Table 4 The control word format for the slave receiver
DEVICE ADDRESS
0 1 0 0(1)
SUB ADDRESS
DATA/CONTROL BYTE
S
0
1
0
0
A I7 I6 I5 I4 I3 I2 I1 I0 A D7 D6 D5 D4 D3 D2 D1 D0 A P
Note
1. This bit is R/W.
Table 5 Bit arrangement of each data byte used in the control word: PCA1070 receive (see note 1)
SUB
ADDRESS
FUNCTION
DC voltage
D7
D6
D5
D4
D3
D2
D1
D0
H00
VDC2
VDC1
VDC0
DST
Sidetone and set
impedance
H01
ZOSB3 ZOSB2 ZOSB1 ZOSB0 ZOSA3 ZOSA2 ZOSA1 ZOSA0
H02
ZOSP3 ZOSP2 ZOSP1 ZOSP0
ZSA2
ZSP2
GMA2
GRA2
ZSA1
ZSP1
GMA1
GRA1
ZSA0
ZSP0
GMA0
GRA0
H03
ZSB2
ZSB1
GMA5
GRA5
ZSB0
GMA4
GRA4
ZSP3
GMA3
GRA3
Sending channel
H04
DLT
Receiving
channel
H05
RFC
HPL
PD0
Control
H06
PD1
RRG
RM
SM
DPI
Note
1. The bits that are not indicated must be set to logic 0.
Table 6 The control word format for the slave transmitter
DEVICE ADDRESS
DATA/STATUS BYTE
D7 D6 D5 D4 D3 D2 D1 D0
S
0
1
0
0
0
1
0
1(1)
A
A
P
Note
1. Change in direction of R/W bit.
Table 7 PCA1070 send
D7
D6
D5
D4
D3
D2
D1
D0
LC0(2)
FUNCTION
PCA1070 status
PRES(1)
−
−
LC4(2)
LC3(2)
LC2(2)
LC1(2)
Notes
1. Indicates if PCA1070 has received internal reset; PRES will be set to logic 1 with internal reset and is set to logic 0
after reading the register via the I2C-bus.
2. Information about value of line current.
1997 Jun 20
11
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
WRITE AND READ TABLES
DC voltages
Table 8 DC voltage at pin SLPE
VDC2
VDC1
VDC0
V
SLPE (V)
3.1
REMARK
default
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
3.5
3.9
4.3
4.7
5.1
5.5
5.9
Set impedance
Programming the impedance in the audio frequency range seen at pin LN: Ra + (Rb // C)
Table 9 Programming Ra
ZSA2
ZSA1
ZSA0
Ra (Ω)
REMARK
default
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
X
0
100
200
300
400
500
600
note 1
notes 1 and 2
Notes
1. For Zset combinations where Ra = 0 only Rb = 600 Ω is allowed. If Ra ≥ 500 Ω it is obligatory that Rb = 0. This is to
safeguard stable operation of the line interface under all practical conditions. If Zref requires Ra = 0 and Rb ≠ 600 Ω
use Ra = 100 Ω instead and reduce the original Rb by 100 Ω.
2. X = don’t care.
1997 Jun 20
12
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
Table 10 Programming Rb
ZSB2
ZSB1
ZSB0
Rb (Ω)
0
REMARK
0
0
0
0
1
1
0
0
1
1
X
X
0
1
0
1
0
1
note 1
600
700
800
900
1000
default
note 2
note 2
Notes
1. For Zset combinations where Ra = 0 only Rb = 600 Ω is allowed. If Ra ≥ 500 Ω it is obligatory that Rb = 0. This is to
safeguard stable operation of the line interface under all practical conditions. If Zref requires Ra = 0 and Rb ≠ 600 Ω
use Ra = 100 Ω instead and reduce the original Rb by 100 Ω.
2. X = don’t care.
Table 11 Programming pole frequency:
CORRESPONDING VALUE OF C (nF)(1)
ZSP3
ZSP2
ZSP1
ZSP0
fp (Hz)
REMARK
Rb
Rb
Rb
Rb
Rb
(600 Ω) (700 Ω) (800 Ω) (900 Ω) (1000 Ω)
0
0
0
0
0
0
0
0
1
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
X
828
1095
1448
1915
2533
3350
4430
5859
12000
320
242
183
139
105
79
275
207
157
119
90
240
182
137
104
79
214
161
122
92
192
145
110
83
default
70
63
68
59
53
48
60
51
45
40
36
45
39
34
30
27
22
19
17
15
13
note 2
Notes
1. C =
1
------------------------------
2π × Rb × fp
2. X = don’t care.
Reset functions
Monitoring of internal reset PCA1070.
Table 12 Status bit PRES
PRES
DESCRIPTION
1
0
internal reset has occurred; default values in all registers
register has been read via the I2C-bus interface
1997 Jun 20
13
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
Programmable amplifier (prog-amp)
An identical programmable amplifier called ‘prog-amp’ is used both in the sending and receiving channel. The bit codes
GMAx and GRAx are given in Table 13. The permitted adjustment range differs for the two amplifiers and is also different
for DTMF and speech mode. This is indicated in the corresponding sections.
Table 13 Bit code prog-amp
GMA5 GMA4 GMA3 GMA2 GMA1 GMA0
GRA5 GRA4 GRA3 GRA2 GRA1 GRA0
GMA5 GMA4 GMA3 GMA2 GMA1 GMA0
GRA5 GRA4 GRA3 GRA2 GRA1 GRA0
GAIN
(dB)
GAIN
(dB)
−25
−24
−23
−22
−21
−20
−19
−18
−17
−16
−15
−14
−13
−12
−11
−10
−9
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
+0
+1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
+2
+3
+4
+5
+6
+7
+8
+9
+10
+11
+12
+13
+14
+15(2)
+16
+17
+18
+19
+20
+21
+22
+23
+24
+25
−8
−7
−6(1)
−5
−4
−3
−2
−1
−0
Notes
1. Default value ‘rec prog-amp’ GRAx.
2. Default value ‘sending prog-amp’ GMAx.
1997 Jun 20
14
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
Sidetone balance impedance
Table 15 Programming Rsb
Internal balance impedance Zoss to match the external line
impedance Zline to give optimum sidetone suppression.
Zoss = Rsa + (Rsb // Cs).
ZOSB
MSB
R
sb (Ω)
LSB
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
465
637
710
803
893
The optimum setting of Rsa depends on the value of the set
impedance. To safeguard stable operation of the
anti-sidetone circuit under all practical conditions, the
following condition must be fulfilled: Rsa ≥ 0.5Ra.
1003
1259(1)
1410
1572
1773
1978
2216
−
Table 14 Programming Rsa
ZOSA3 ZOSA2 ZOSA1 ZOSA0
Rsa (Ω)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
134
153
193
221
246
277
295
341
369
443
492(1)
−
−
−
−
Note
1. Default value.
Table 16 Programming Cs
ZOSP
MSP
−
Cs (nf)
LSP
−
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
5
55
−
−
58
Note
69
1. Default value.
76
85
96
105
121
134(1)
145
166
186
207
232
259
Note
1. Default value.
1997 Jun 20
15
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
Line current control
Table 17 Bit code LCx and DC line current
LC4
LC3
LC2
LC1
LC0
Iline (typ.) (mA)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
<12.5
15.0
17.5
20.0
22.5
25.0
27.5
30.0
32.5
35.0
37.5
40.0
42.5
45.0
47.5
50.0
52.5
55.0
58.0
61.0
64.0
66.5
69.0
71.5
74.0
77.5
80.0
82.5
85.0
88.0
91.0
>94.0
1997 Jun 20
16
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
SYMBOL
VLN
PARAMETER
positive line voltage at pin LN
MIN.
−0.8
MAX.
UNIT
+12
+12
+7.0
+7.0
+10
250
+125
+60
V
V
V
V
Vi
input voltage on pins SLPE, DOC, REG, TX and LSI
supply voltage
−0.8
−0.8
−0.8
−10
−
VDD
Vn
voltage on all other pins
input current
Ii
mA
mW
°C
Ptot
Tstg
Tamb
total power dissipation
storage temperature
−40
−10
operating ambient temperature
°C
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices.
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
VALUE
UNIT
thermal resistance from junction to ambient in free air
DIP24
SO24
54
74
K/W
K/W
1997 Jun 20
17
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
TEST CONDITIONS AND PARAMETER SETTINGS FOR THE CHARACTERISTICS
Table 18 Test conditions
SYMBOL
VALUE
UNIT
Iline
VSS
f
20
mA
V
0
1000
Hz
A
Ip
0
IVP
fclk
Tamb
Zline
Rm
Rt
0
3.597545
25
A
MHz
°C
220 Ω + 820 Ω // 115 nF
150
150
Ω
Ω
Table 19 Test settings and control bits. All values, except RFC, are default. Programmable via the I2C-bus; bit codes
are given in Chapter “I2C-bus programming”.
SYMBOL
VALUE
VDCx
ZSAx
ZSBx
ZSPx
GMAx
GRAx
ZOSAx
ZOSBx
ZOSPx
DST
100
010
011
0011
001111
100110
1010
0110
1001
0
DLT
0
RFC
0
HPL
0
PDx
00
RRG
RM
0
0
SM
0
DPI
0
1997 Jun 20
18
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
CHARACTERISTICS
All parameters are measured in the test circuit of Fig.7 under the conditions specified in Tables 18 and 19; unless
otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
DC line interface: LN, TX, SLPE and REG
Iline
line current operating
range
17
−
−
140
mA
mA
V
reduced sending level
with or without clock
12
4.3
2.8
5.4
−
17
5.1
3.4
6.4
−
VSLPE
DC voltage at SLPE
4.7
3.1
5.9
0.4
4.7
VSLPE(min)
minimum selectable value VDCx = 000
V
VSLPE(max) maximum selectable value VDCx = 111
VSLPE(step) step resolution
V
V
VSLPE
DC voltage at SLPE
with or without clock;
fast start-up; DST = 1
−
−
V
VSLPE(min)
minimum selectable value fast start-up; DST = 1;
VDCx = 000
−
−
3.1
5.9
−
−
V
V
VSLPE(max) maximum selectable value fast start-up; DST = 1;
VDCx = 111
VSLPE(step) step resolution
fast start-up; DST = 1
−
−
0.4
−
−
V
∆VSLPE
variation with temperature at Tamb = −10 °C to +60 °C with
respect to 25 °C
±20
mV
VLN
DC line voltage at LN
with or without clock
4.6
5.0
4.83
7.0
1
5.4
V
V
V
V
I
I
line = 12 mA
line = 120 mA
6.5
7.5
VLN
DC line voltage at LN at
low line current
with or without clock;
Iline = 0.25 mA
−
−
I
I
I
line = 2 mA
line = 4 mA
line = 7 mA
−
−
−
−
1.9
−
V
3.4
−
V
4.73
145
5.2
−
V
tDC
DC start-up time
CVDD = 470 µF; no clock; note 1
ms
TX: DRIVE OUTPUT FOR EXTERNAL PNP
VTX
output voltage at TX
external PNP disconnected;
VSLPE = 2 V; VREG = 1.5 V;
VDD = VVMC = 2.5 V; ITX = 0 mA
−
1.45
−
V
V
SLPE = 3 V; VREG = 2.5 V;
VDD = VVMC = 2.5 V; ITX = 1.6 mA
switching time DC voltage VSLPE steps from 3.1 V to 5.9 V;
−
−
−
−
−
2.2
65
65
0.5
1
−
−
−
−
−
V
tSW
ms
ms
ms
ms
at SLPE
note 2
VSLPE steps from 5.9 V to 3.1 V;
note 2
fast start-up; DST = 1; VSLPE steps
from 3.1 V to 5.9 V; note 2
fast start-up; DST = 1; VSLPE steps
from 5.9 V to 3.1 V; note 2
1997 Jun 20
19
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies: VDD, VMC, VP and SLPE
VDD
operating supply voltage
note 3
2.5
−
−
6
V
relaxed performance; note 4
1.8
2.5
V
VDD; SUPPLY PIN
IDD
internal current
consumption
VDD = 2.5 V
−
−
2.3
30
−
mA
power-down; PDx = 01; SCL = 1;
SDA = 1
100
µA
standby; PDx = 11; SCL = 1;
SDA = 1
−
2
5
µA
VDD: PERIPHERAL SUPPLY
Ip
current available for
peripheral circuitry
VDD = 2.9 V; RM = 1; SM = 1
−
−
4.9
6.5
−
−
mA
mA
VDD = 2.5 V; RM = 1; SM = 1
VMC: SENSE INPUT MICROCONTROLLER SUPPLY VOLTAGE
IVMC
input current
VVMC = 2.5 V
−
−
4
4
10
10
µA
µA
power-down; PDx = 01;
VVMC = 2.5 V; SCL = 1; SDA = 1
standby; PDx = 11; VVMC = 2.5 V;
SCL = 1; SDA = 1
−
2
5
µA
VP: SUPPLY OUTPUT FOR ELECTRET MICROPHONE
VP
output voltage
IVP = 500 µA
f = 300 Hz
1.6
−
1.9
40
65
−
−
−
V
ZVP
output impedance
power supply rejection
Ω
PSRVP
f = 300 Hz; note 5
−
dB
Reset functions: VDD, VMC and RMC
INTERNAL RESET
VDD(sw)
switching level of VDD
below which internal reset
is active
Tamb = −10 to +60 °C; note 6
1.0
1.2
1.4
V
RMC: RESET OUTPUT FOR MICROCONTROLLER
VVMC(sw)
voltage level at pin VMC
where RMC changes state
note 7
1.8
1.8
1.8
−
2.0
2.0
2.1
0
2.2
2.2
2.4
−
V
power-down; PDx = 01; note 7
standby; PDx = 11; note 7
Tamb = −10 to +60 °C
V
V
∆VVMC/∆T
voltage variation with
ambient temperature
mV/°C
mV/°C
power-down; PDx = 01;
−
0
−
Tamb = −10 to +60 °C
standby; PDx = 11;
−
+3
−
mV/°C
Tamb = −10 to +60 °C
1997 Jun 20
20
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Sending channel: MIC+, MIC−, DTMF, OMIC, LN, SCR, REG and LSI
MIC+ AND MIC−: MICROPHONE INPUTS
ZMIC
input impedance
differential
single-ended
note 8
60
100
−
−
−
kΩ
30
50
72
kΩ
CMRRMIC
VMIC(peak)
common mode rejection
ratio
−
dB
allowed input signal
−
−
70
mV
voltage level (peak value)
GM
gain MIC+/MIC− to LN
39.5
28.5
49.5
−
41
30
51
1
42.5
31.5
52.5
−
dB
dB
dB
dB
dB
GM(min)
GM(max)
GM(step)
∆GM
minimum selectable gain
GMAx = 000100
maximum selectable gain GMAx = 011001
step resolution
gain variation with
frequency
at f = 300 Hz and 3400 Hz with
respect to 1 kHz; note 9
−
−
+0.3/−0.7
gain variation with ambient at Tamb = −10 to +60 °C with
−
−
−
±0.2
0
−
dB
dB
ms
temperature
respect to 25 °C
gain variation with line
current
at Iline = 100 mA with respect to
20 mA; note 9
±0.5
−
tACM
AC start-up time
CVDD = 470 µF; note 10
150
Sending mute/privacy switch
∆GM reduction of GM
SM = 1
−
100
−
dB
DTMF: DUAL TONE MULTI-FREQUENCY INPUT
RDTMF
CDTMF
GDTMF
parallel input resistance
SM = 1
100
−
200
45
21
1
−
kΩ
pF
dB
dB
dB
dB
dB
parallel input capacitance SM = 1
−
gain from DTMF to LN
SM = 1
20
0
22
GDTMF(min) minimum selectable gain
SM = 1; GMAx = 100101
2
GDTMF(max) maximum selectable gain SM = 1; GMAx = 001111
20
−
21
1
22
GDTMF(step
)
step resolution
SM = 1
−
∆GDTMF
gain variation with
frequency
SM = 1; at f = 300 Hz and 3400 Hz
with respect to 1 kHz; note 9
−
−
+0.3/−0.7
gain variation with ambient SM = 1; at Tamb = −10 to +60 °C
−
−
±0.2
−
dB
dB
temperature
with respect to 25 °C
gain variation with line
current
SM = 1; at Iline = 100 mA with
respect to 20 mA; note 9
0
±0.5
Confidence tone
GCTS
gain from DTMF to
QR+/QR−;
RM = 1; SM = 1; notes 11 and 12
RM = 1; SM = 1; GRAx = 111001
−
−25
−
dB
GCTS(min)
GCTS(max)
minimum selectable gain
−
−
−
−40
−19
−
−
dB
dB
dB
maximum selectable gain RM = 1; SM = 1; GRAx = 100000
step resolution RM = 1; SM = 1
GCTS(step
)
0.5 to 1 −
1997 Jun 20
21
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
OMIC: MICROPHONE PREAMPLIFIER OUTPUT
ZOMIC
GOMIC
output impedance
−
400
−
−
Ω
gain from MIC+/MIC− to
dynamic limiter not active; note 13
−
20
dB
OMIC
LN: SENDING CHANNEL OUTPUT; notes 14 and 15
BRL
balance return loss ZLN
with Zref = 220 Ω +
(820 Ω // 115 nF)
Zline = ∞ Ω; f = 300 Hz
20
20
20
37
35
25
−
−
−
dB
dB
dB
Z
Z
line = ∞ Ω; f = 1 kHz
line = ∞ Ω; f = 3.4 kHz
Selectable values for Zset = Ra + (Rb // C) with C = 1/(2 π × Rb × fp); note 16
Ra
non-shunted resistance of
Zset
−
−
−
200
0
−
−
−
Ω
Ω
Ω
Ra(min)
Ra(max)
minimum selectable value ZSAx = 001; note 17
for Ra
maximum selectable
value for Ra
ZSAx = 11x
600
Ra(step)
Rb
step resolution for Ra
−
−
−
100
800
600
−
−
−
Ω
Ω
Ω
shunted resistance of Zset
Rb(min)
minimum selectable value ZSBx = 001; notes 17 and 18
for Rb
Rb(max)
maximum selectable
value for Rb
ZSBx = 1x1
−
1000
−
Ω
Rb(step)
fp
step resolution for Rb
−
−
100
−
−
Ω
pole frequency
determining shunt
capacitance C
1915
Hz
fp(min)
fp(max)
n
minimum selectable fp
maximum selectable fp
multiplication factor for fp
noise output voltage
ZSPx = 0000
−
−
−
−
828
−
−
−
−
Hz
Hz
ZSPx = 0111; note 19
fp(x + 1) = n × [fp(x)]
5859
1.322
−76
vLN(noise)
psophometrically weighted
(O41 curve)
dBmp
Dynamic limiter
VLN(p-p) threshold of dynamic
3.1
2.2
−
3.5
2.6
2.4
3.9
3.0
−
V
V
V
limiter (peak-to-peak)
DLT = 1
low voltage condition;
VSLPE = 3.1 V
low current condition; Iline = 9 mA
Vi = 12 mV (RMS) + 10 dB
−
−
2.6
2.5
−
V
THD
total harmonic distortion
5.0
%
Dynamic behaviour of limiter; note 20
tatt
trel
attack time
Vi steps from 12 to 38 mV (RMS)
Vi steps from 38 to 12 mV (RMS)
−
−
1.5
90
−
−
ms
ms
release time
1997 Jun 20
22
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
SCR: PIN FOR SENDING CURRENT RESISTOR
VSCR
voltage at pin SCR
−
0.28
−
−
V
reduced sending gain;
−
0.26
V
GM = 30 dB; GMAx = 000100
I
I
line = 12 mA
line = 7 mA
−
−
0.22
0.13
−
−
V
V
Receiving channel: LN, LSI, OREC, QR+ and QR−
QR+, QR−: RECEIVING AMPLIFIER OUTPUTS
ZQR+, ZQR- output impedance
single-ended
−
4
−
Ω
GRS
gain from LN to QR+/QR- note 21
−7.5
-6
−4.5
−17.5
12.5
−
dB
dB
dB
dB
dB
GRS(min)
GRS(max)
GRS(step)
∆GRS
minimum selectable gain
GRAx = 110011
−20.5 −19
maximum selectable gain GRAx = 001011
gain step resolution
9.5
−
11.0
1
gain variation with
frequency
at f = 300 Hz and 3400 Hz with
respect to 1 kHz; note 9
−
−
±0.5
∆GRS
∆GRS
gain variation with
temperature
at Tamb = −10 to +60 °C with
respect to 25 °C
−
−
±0.2
−
dB
dB
gain variation with line
current
at Iline = 100 mA with respect to
20 mA; note 9
0
±0.5
tACR
AC start-up time
CVDD = 470 µF; note 10
−
−
140
2.3
−
−
ms
V
vQR(p-p)
maximum output voltage
swing (peak-to-peak)
VDD = 5 V; GRAx = 001011;
Rt = ∞ Ω; RFC = 1;
VLN = 2 V (RMS)
HPL = 1; VDD = 5 V;
−
5.9
−
V
GRAx = 001011; Rt = ∞ Ω;
RFC = 1; VLN = 2 V (RMS)
vQR(rms)
output voltage (RMS
value); THD = 2%
HPL = 1; GRAx = 000011; note 22 0.45
−
−
−
−
V
V
HPL = 1; Rt = 450 Ω;
0.84
GRAx = 000011; note 22
RFC = 1; Ct = 80 nF; f = 3.4 kHz;
GRAx = 000011; note 22
0.9
−
−
−
−
V
V
single-ended; HPL = 1;
0.45
Zt = 150 Ω + 100 µF at QR−;
GRAx = 001001; note 22
vQR(noise
)
noise output voltage
psophometrically weighted
(O41 curve)
−
−
−82
−
dBmp
mV
VQR(offset)
DC offset voltage between
−
±100
QR+/QR−
OREC: OUTPUT RECEIVE PREAMPLIFIER
ZOREC
GOREC
output impedance
−
−
1000
−
−
Ω
gain from LN to OREC
note 13
−6
dB
1997 Jun 20
23
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Selectable values for Zoss = Rsa (Rsb // Cs); note 23
Rsa
non-shunted resistance of
Zoss
−
492
−
−
−
Ω
Rsa(min)
Rsa(max)
minimum selectable value ZOSAx = 0000
Rsa
−
−
134
492
Ω
Ω
maximum selectable
value for Rsa
ZOSAx = 1010; note 24
Rsb
shunted resistance of Zoss
−
−
1259
465
−
−
Ω
Ω
Rsb(min)
minimum selectable value ZOSBx = 0000
for Rsb
Rsb(max)
maximum selectable
value for Rsb
ZOSBx = 1011; note 24
−
2216
−
Ω
Cs
shunt capacitance of Zoss
−
−
134
55
−
−
nF
nF
Cs(min)
minimum selectable value ZOSPx = 0001; note 25
for Cs
Cs(max)
maximum selectable
value for Cs
ZOSPx = 1111; note 24
−
259
−
nF
Sidetone suppression; note 26
GSTS gain from MIC+/MIC− to
QR+/QR−
Zline = 492 Ω + (1259 Ω // 134 nF);
f = 300 Hz
−
−
−
11
5
15
10
15
dB
dB
dB
Z
line = 492 Ω + (1259 Ω // 134 nF);
f = 1 kHz
Zline = 492 Ω + (1259 Ω // 134 nF);
9
f = 3.4 kHz
Dial output connection: DOC (open-drain output)
IDOC output sink current VDOC = 12 V
−
0
100
nA
DPI = 1; VDOC = 0.4 V; VDD = 2.5 V 200
400
−
µA
Line current control: LN and SLPE
Iline(min)
minimum value of DC line LCx = 00001
current that can be read as
a bit code via the I2C-bus
−
−
−
15
−
−
−
mA
mA
mA
Iline(max)
maximum value of DC line LCx = 11110
current that can be read as
a bit code via the I2C-bus
91
Iline(step)
DC line current step
resolution
note 27
note 28
≈2.5
I2C-bus inputs/outputs: SDA and SCL
in accordance with
standard
−
−
−
1997 Jun 20
24
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Clock input: CLK
vCLK(p-p)
input signal voltage level
(peak-to-peak value)
200
−
−
mV
V
VMC − VSS
∆fCLK/fCLK
RCLK
frequency tolerance
note 29
−
−
−
±0.5
−
%
input series resistance
input series capacitance
800
4
kΩ
pF
CCLK
−
Notes
1. Time needed to reach at start-up the default DC voltage VSLPE (±10% from its final value):
a) Time depends strongly on the value of the capacitor(s) at VDD and VMC; with a lower value of CVDD the DC
start-up time decreases.
b) The start-up time can be reduced considerably by programming the bit code DST = 1 during the start-up
procedure. In practice this is possible as soon as the microcontroller has become operational.
2. Time needed to reach the DC voltage VSLPE within ±10% from its final value) after reprogramming VDCx.
3. The supply voltage VDD is determined by the regulated DC voltage at pin SLPE and by the voltage drop between
pin SLPE and VDD; see Chapter “Functional description”.
4. Relaxed performance means: parameters can deviate from their specified values.
5. Rejection between supply pin VDD and VP. Rejection between pin LN and VP can be calculated by adding the
attenuation of the first-order low-pass filter (R = 250 Ω, C = 150 µF) between SLPE and VDD
.
6. If VDD is above this level, the default values have been loaded into the internal registers.
7. RMC changes from logic 1 to logic 0 when voltage on pin VMC is increasing; RMC changes from logic 0 to logic 1
when voltage on pin VMC is decreasing; see Fig.4.
8. Common mode signal is applied via 2 × 470 Ω external resistors connected to pins MIC+ and MIC−.
9. Not tested, guaranteed by design.
10. Time needed to reach default settings (±3 dB).
11. At low gain settings the confidence tone gain will be slightly higher than the specified value due to a residual signal.
12. GCTA, the confidence tone gain for asymmetrical drive, equals GCTS −6 (in dB).
13. To be left open-circuit in application.
14. The AC set impedance between pin LN and VSS consists of Ra + (Rb // C) in parallel with an artificial inductor Leq and
internal resistors Rp and RLSI and internal capacitor Cp. See Chapter “Functional description”.
15. Balance Return Loss indicates the deviation of an impedance with respect to a reference impedance.
BRL = 20 log (ZLN + Zref)/(ZLN − Zref) where ZLN ≈ Ra + (Rb // C) is the impedance seen into pin LN
Zref = Ra(ref) + (Rb(ref) // Cref) is the reference impedance.
16. Without clock the set impedance is automatically set to Zset = 600 Ω (typical).
17. The combination Ra = 0 and Rb = 0 is not allowed (see Tables 9 and 10, note 1).
18. Value logic 0 can also be programmed.
19. Value fp = 12 kHz can also be programmed.
20. Attack and release times are also valid under low current and voltage conditions.
21. GRA, the receiving channel gain for asymmetrical drive equals GRS −6 (in dB).
22. The maximum possible output swing depends on the DC conditions (the programmed voltage VSLPE and the load on
the supply pin VDD) and on the gain setting of the receiving channel.
1997 Jun 20
25
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
23. The internal balance impedance Zoss to match the external load impedance at pin LN (Zline = Zoss) for optimum
sidetone suppression; Zoss = Rsa + (Rsb // Cs); without clock the sidetone balance impedance is automatically set to
Zoss = 600 Ω (typical).
24. Other values can be found in Tables 14, 15 and 16.
25. Value Cs = 5 nF can also be programmed.
26. Gain sending channel GM = default (typical 41 dB); gain receiving channel Grec = default (typical −6 dB); sidetone
gain GSTS minimum sidetone suppression at f = 300 Hz and 3400 Hz is: GM + GR − Gst(max) = 41 − 6 − 15 = 20 dB.
GSTA, the sidetone gain for asymmetrical drive equals GSTS −6 (in dB).
27. Indication only; exact values can be found in Table 16.
28. Standard I2C-bus specifications are valid for VDD ≥ 2.5 V. Relaxed specifications for VDD = 1.8 to 2.5 V.
29. Recommended accuracy of input frequency; a higher tolerance will cause parameters to deviate from their specified
values; note that all parameters are specified with the reference input clock frequency fclk = 3.579545 MHz.
1997 Jun 20
26
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
TEST AND APPLICATION INFORMATION
The test circuit is illustrated in Fig.7. The basic application circuit is illustrated in Fig.8. An interrupter with an N-channel
depletion MOS transistor (e.g. BSD254A or BSP124) is shown. It is intended for applications where a low DC line voltage
is required. An interrupter with an N-channel enhancement MOS transistor (e.g. BSN304A or BSP130) can be used for
applications where a relatively high DC line voltage is allowed.
An application circuit for applications where a low DC line voltage and long line interrupts are required, is illustrated in
Fig.9 (interrupter with an N-channel depletion MOS transistor).
V
DOC
+
100
µF
V
−
3.3
nF
LN
20
Ω
470 nF
100
nF
5 V
Z
line
150
µF
250 Ω
S1
2
I
p
I
1
DOC
2
I
I C-BUS
line
12 to 140
mA
DOC
LSI LN SLPE REG
V
VMC
SDA
MASTER
TRANSCEIVER
DD
V
rec
I
TX
TX
SCL
CLK
PCA1070
DTMF
+
RMC
TST
SCR
+
V
clk
V
DTMF
−
100 Ω
V
V
OMIC OREQ
V
MIC+ MIC− QR+ QR−
−
ref
SS
P
V
MIC
MGE345
100
I
+
−
VP
nF
R
R
t
m
+
−
V
V
m
t
Definitions:
Gain sending channel GM = 20 log (VLN/VMIC) with S1 in position 1; VDTMF = 0.
Gain DTMF amplifier GDTMF = 20 log (VLN/VDTMF) with S1 in position 1; Vm = 0.
Gain receiving channel Grec = 20 log (VT/VLN) with S1 in position 2; Vm = 0.
Sidetone gain Gst = 20 log (VT/VMIC) with S1 in position 1; VDTMF = 0.
Fig.7 Test circuit of the PCA1070.
1997 Jun 20
27
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
GM3E4
d
1997 Jun 20
28
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
GM4E3
d
1997 Jun 20
29
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
PACKAGE OUTLINES
DIP24: plastic dual in-line package; 24 leads (600 mil)
SOT101-1
D
M
E
A
2
A
L
A
1
c
e
w M
Z
b
1
(e )
1
b
M
H
24
13
pin 1 index
E
1
12
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
Z
A
A
A
2
(1)
(1)
1
UNIT
mm
b
b
c
D
E
e
e
L
M
M
H
w
1
1
E
max.
min.
max.
max.
1.7
1.3
0.53
0.38
0.32
0.23
32.0
31.4
14.1
13.7
3.9
3.4
15.80
15.24
17.15
15.90
5.1
0.51
4.0
2.54
0.10
15.24
0.60
0.25
0.01
2.2
0.066
0.051
0.021
0.015
0.013
0.009
1.26
1.24
0.56
0.54
0.15
0.13
0.62
0.60
0.68
0.63
inches
0.20
0.020
0.16
0.087
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-01-23
SOT101-1
051G02
MO-015AD
1997 Jun 20
30
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
D
E
A
X
c
H
v
M
A
E
y
Z
24
13
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
12
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
15.6
15.2
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
mm
2.65
0.25
0.01
1.27
0.050
1.4
0.25 0.25
0.01
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.61
0.014 0.009 0.60
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches 0.10
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-01-24
97-05-22
SOT137-1
075E05
MS-013AD
1997 Jun 20
31
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
Several techniques exist for reflowing; for example,
SOLDERING
Introduction
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
WAVE SOLDERING
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used
DIP
SOLDERING BY DIPPING OR BY WAVE
• The longitudinal axis of the package footprint must be
parallel to the solder flow
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
REPAIRING SOLDERED JOINTS
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
REPAIRING SOLDERED JOINTS
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
SO
REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
1997 Jun 20
32
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of this specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1997 Jun 20
33
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
NOTES
1997 Jun 20
34
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
NOTES
1997 Jun 20
35
Philips Semiconductors – a worldwide company
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Tel. +7 095 755 6918, Fax. +7 095 755 6919
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. +852 2319 7888, Fax. +852 2319 7700
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,
Tel. +65 350 2538, Fax. +65 251 6500
Colombia: see South America
Czech Republic: see Austria
Slovakia: see Austria
Slovenia: see Italy
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,
Tel. +45 32 88 2636, Fax. +45 31 57 0044
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. +27 11 470 5911, Fax. +27 11 470 5494
Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. +358 9 615800, Fax. +358 9 61580920
South America: Rua do Rocio 220, 5th floor, Suite 51,
04552-903 São Paulo, SÃO PAULO - SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 829 1849
France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex,
Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 3 301 6312, Fax. +34 3 301 4107
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,
Tel. +49 40 23 53 60, Fax. +49 40 23 536 300
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 632 2000, Fax. +46 8 632 2745
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,
Tel. +30 1 4894 339/239, Fax. +30 1 4814 240
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2686, Fax. +41 1 481 7730
Hungary: see Austria
India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd.
Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874
Indonesia: see Singapore
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,
Tel. +81 3 3740 5130, Fax. +81 3 3740 5077
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Uruguay: see South America
Vietnam: see Singapore
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
Middle East: see Italy
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Internet: http://www.semiconductors.philips.com
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1997
SCA54
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
417027/00/03/pp36
Date of release: 1997 Jun 20
Document order number: 9397 750 00949
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