PCA9516D,118 [NXP]
IC SPECIALTY INTERFACE CIRCUIT, PDSO16, 3.90 MM, PLASTIC, MS-012, SOT109-1, SOP-16, Interface IC:Other;
| 型号： | PCA9516D,118 |
| 厂家： | 
NXP |
| 描述： | IC SPECIALTY INTERFACE CIRCUIT, PDSO16, 3.90 MM, PLASTIC, MS-012, SOT109-1, SOP-16, Interface IC:Other 信息通信管理 光电二极管 接口集成电路 |
| 文件： | 总12页 (文件大小：119K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
PCA9516
5-channel I2C hub
Product data sheet
2006 Sep 22
Supersedes data of 2004 Sep 29
Philips
Semiconductors
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516
DESCRIPTION
The PCA9516 is a BiCMOS integrated circuit intended for
2
application in I C and SMBus systems.
2
While retaining all the operating modes and features of the I C
2
system, it permits extension of the I C-bus by buffering both the data
(SDA) and the clock (SCL) lines, thus enabling five buses of 400 pF.
2
The I C-bus capacitance limit of 400 pF restricts the number of
devices and bus length. Using the PCA9516 enables the system
designer to divide the bus into five segments off of a hub where any
segment to segment transition sees only one repeater delay.
FEATURES
• 5 channel, bi-directional buffer
• I C-bus and SMBus compatible
• Active HIGH individual repeater enable input
• Open-drain input/outputs
• Lock-up free operation
It can also be used to run different buses at 5 V and 3.3 V or
400 kHz and 100 kHz buses where the 100 kHz bus is isolated
when 400 kHz operation of the other bus is required.
2
Two or more PCA9516s cannot be put in series. The PCA9516
design does not allow this configuration. Since there is no direction
pin, slightly different “legal” low voltage levels are used to avoid
lock-up conditions between the input and the output of each
repeater in the hub. A “regular LOW” applied at the input of a
PCA9516 will be propagated as a “buffered LOW” with a slightly
higher value on all the enabled outputs. When this “buffered LOW” is
applied to another PCA9515, PCA9516, or PCA9518 in series, the
second PCA9515, PCA9516, or PCA9518 will not recognize it as a
“regular LOW” and will not propagate it as a “buffered LOW” again.
The PCA9510/9511/9513/9514 and PCA9512 cannot be used in
series with the PCA9515, PCA9516, or PCA9518 but can be used in
series with themselves since they use shifting instead of static
offsets to avoid lock-up conditions.
• Supports arbitration and clock stretching across the repeater
2
• Accommodates standard mode and fast mode I C devices and
multiple masters
2
• Powered-off high impedance I C pins
• Operating supply voltage range of 3.0 V to 3.6 V
2
• 5.5 V tolerant I C and enable pins
1
• 0 to 400 kHz clock frequency
• ESD protection exceeds 2000 V HBM per JESD22-A114,
150 V MM per JESD22-A115, and 1000 V CDM per
JESD22-C101.
• Latch-up testing is done to JEDEC Standard JESD78 which
exceeds 100 mA.
• Package offerings: SO and TSSOP
ORDERING INFORMATION
DESCRIPTION
16-pin plastic SO
TEMPERATURE RANGE
–40 °C to +85 °C
ORDER CODE
PCA9516D
TOPSIDE MARK
PCA9516D
DRAWING NUMBER
SOT109-1
16-pin plastic TSSOP
–40 °C to +85 °C
PCA9516PW
PCA9516
SOT403-1
Standard packing quantities and other packaging data is available at www.standardics.philips.com/packaging.
1.
The maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater.
2
2006 Sep 22
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516
PIN CONFIGURATION
PIN DESCRIPTION
PIN
1
SYMBOL
SCL0
FUNCTION
Serial clock bus 0
SCL0
SDA0
1
2
3
4
5
6
7
8
16
15
14
V
CC
EN4
2
SDA0
SCL1
SDA1
EN1
Serial data bus 0
Serial clock bus 1
Serial data bus 1
SCL1
SDA1
SDA4
3
13
SCL4
EN3
EN1
12
11
10
4
SCL2
SDA3
5
Active-HIGH Bus 1 enable Input
Serial clock bus 2
SDA2
GND
SCL3
EN2
6
SCL2
SDA2
GND
EN2
9
7
Serial data bus 2
SU01395
8
Supply ground
Figure 1. Pin configuration
9
Active-HIGH Bus 2 enable Input
Serial clock bus 3
10
11
12
13
14
15
16
SCL3
SDA3
EN3
Serial data bus 3
Active-HIGH Bus 3 enable Input
Serial clock bus 4
SCL4
SDA4
EN4
Serial data bus 4
Active-HIGH Bus 4 enable Input
Supply power
V
CC
3
2006 Sep 22
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516
BLOCK DIAGRAM
V
CC
PCA9516
Buffer
SCL0
Buffer
Buffer
SCL4
SCL3
Hub
Logic
Buffer
Buffer
SCL1
SCL2
Buffer
SDA0
Buffer
Buffer
SDA4
SDA3
Hub
Logic
Buffer
Buffer
SDA1
SDA2
EN1
EN2
EN4
EN3
SU01396
GND
Figure 2. Block Diagram: PCA9516
A more detailed view of Figure 2 buffer is shown in Figure 3.
To output
Data
z
In
Inc
Enable
SW00712
Figure 3.
The output pull-down of each internal buffer is set for approximately
0.5 V, while the input threshold of each internal buffer is set about
0.07 V lower, when the output is internally driven LOW. This
prevents a lock-up condition from occurring.
4
2006 Sep 22
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516
resistors. The primary bus master is normally connected to
SDA0/SCL0. If the SDA0/SCL0 port is not used, the pins need to be
FUNCTIONAL DESCRIPTION
The PCA9516 BiCMOS integrated circuit is a five way hub repeater,
2
pulled to V through appropriately sized resistors.
CC
which enables I C and similar bus systems to be expanded with
only one repeater delay and no functional degradation of system
performance.
The PCA9516 is 5 V tolerant so it does not require any additional
circuitry to translate between the different bus voltages.
The PCA9516 BiCMOS integrated circuit contains five bi-directional,
open drain buffers specifically designed to support the standard
low-level-contention arbitration of the I C-bus. Except during
arbitration or clock stretching, the PCA9516 acts like five pairs of
non-inverting, open drain buffers, one for SDA and one for SCL.
When one side of the PCA9516 is pulled LOW by a device on the
I C-bus, a CMOS hysteresis type input detects the falling edge and
causes an internal driver on the other side to turn on, thus causing
the other side to also go LOW. The side driven LOW by the
2
2
PCA9516 will typically be at V = 0.5 V.
OL
Enable
3.3 V
5 V
3.3 V
5 V
The enable pins EN1 through EN4 are active HIGH and have
internal pull-up resistors. Each enable pin ENn controls its
associated SDAn and SCLn ports. When LOW, the ENn pin blocks
the inputs from SDAn and SCLn as well as disabling the output
drivers on the SDAn and SCLn pins. The enable pins should only
change state when both the global bus and the local port are in an
idle state to prevent system failures.
SDA
SCL
BUS
MASTER
SDA0
SCL0
SDA1
SCL1
SDA
SCL
SLAVE 1
400 kHz
The active HIGH enable pins allow the use of open drain drivers
which can be wire-ORed to create a distributed enable where either
centralized control signal (master) or spoke signal (submaster) can
enable the channel when it is idle.
EN1
EN2
EN3
EN4
2
I C Systems
2
As with the standard I C system, pull-up resistors are required to
400 kHz
provide the logic HIGH levels on the Buffered bus. (Standard
open-collector configuration of the I C-bus). The size of these
pull-up resistors depends on the system, but each side of the
repeater must have a pull-up resistor. This part designed to work
with standard mode and fast mode I C devices in addition to SMBus
SDA2
SCL2
SDA
SCL
2
SLAVE 2
400 kHz
2
PCA9516
2
devices. Standard mode I C devices only specify 3 mA output drive,
this limits the termination current to 3 mA in a generic I C system
2
where standard mode devices and multiple masters are possible.
Under certain conditions higher termination currents can be used.
2
Please see Application Note AN255 “I C & SMBus Repeaters, Hubs
SDA3
SDA
SCL
and Expanders” for additional information on sizing resistors and
precautions when using more than one PCA9515/PCA9516 in a
system or using the PCA9515/16 in conjunction with the P82B96.
SLAVE 3
100 kHz
SCL3
3.3 V or 5 V
APPLICATION INFORMATION
A typical application is shown in Figure 4. In this example, the
2
system master is running on a 3.3 V I C-bus while the slave is
connected to a 5 V bus. All buses run at 100 kHz unless slave 3 is
isolated and then the master bus and slaves 1 and 2 can run at
400 kHz.
SDA4
SCL4
Any segment of the hub can talk to any other segment of the hub.
Bus masters and slaves can be located on all five segments with
400 pF load allowed on each segment.
SW00923
Figure 4. Typical application
Unused ports should be isolated by holding the enable pin to GND
and/or pulling SDA/SCL pins to V through appropriately sized
CC
5
2006 Sep 22
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516
In order to illustrate what would be seen in a typical application,
refer to Figures 5 and 6. If the bus master in Figure 4 were to write
to the slave through the PCA9516, we would see the waveform
On the Bus 1 side of the PCA9516, the clock and data lines would
have a positive offset from ground equal to the V of the PCA9516.
OL
After the 8th clock pulse, the data line will be pulled to the V of the
OL
2
shown in Figure 5 on Bus 0. This looks like a normal I C
slave device that is very close to ground in our example.
transmission until the falling edge of the 8th clock pulse. At that
point, the master releases the data line (SDA) while the slave pulls it
It is important to note that any arbitration or clock stretching events
on Bus 1 require that the V of the devices on Bus 1 be 70 mV
OL
LOW through the PCA9516. Because the V of the PCA9516 is
OL
below the V of the PCA9516 (see V – V in the DC
OL
OL
ilc
typically around 0.5 V, a step in the SDA will be seen. After the
master has transmitted the 9th clock pulse, the slave releases the
data line.
Characteristics section) to be recognized by the PCA9516 and then
transmitted to Bus 0.
2 V/DIV
9th CLOCK PULSE
V
OF PCA9516
OL
V
OF MASTER
OL
SW00965
Figure 5. Bus 0 waveform
2 V/DIV
9th CLOCK PULSE
V
OF PCA9516
OL
V
OF SLAVE
OL
SW00966
Figure 6. Bus 1 waveform
6
2006 Sep 22
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516
ABSOLUTE MAXIMUM RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134).
Voltages with respect to pin GND.
LIMITS
SYMBOL
PARAMETER
MIN.
–0.5
–0.5
—
MAX.
UNIT
V
V
V
I
to GND
Supply voltage range V
+7
+7
CC
CC
2
Voltage range I C-bus, SCL or SDA
DC current (any pin)
V
bus
50
mA
mW
°C
P
Power dissipation
—
300
+125
+85
tot
T
Storage temperature range
Operating ambient temperature range
–55
–40
stg
T
°C
amb
DC ELECTRICAL CHARACTERISTICS
V
DD
= 3.0 to 3.6 V; GND = 0 V; T
= –40 °C to +85 °C; unless otherwise specified.
amb
LIMITS
TYP.
SYMBOL
Supplies
PARAMETER
TEST CONDITIONS
UNIT
MIN.
MAX.
V
DC supply voltage
3.0
—
3.3
7
3.6
10
V
CC
I
Quiescent supply current,
both channels HIGH
V
= 3.6 V;
mA
CCH
CC
SDAn = SCLn = V
CC
I
Quiescent supply current,
both channels LOW
V
= 3.6 V;
—
—
6.8
7
10
10
mA
mA
CCL
CC
one SDA and one SCL = GND,
other SDA and SCL open
I
Quiescent supply current in contention
V
CC
= 3.6 V;
CCLc
SDAn = SCLn = GND
Input SCL; input/output SDA
V
HIGH-level input voltage
0.7 V
—
—
—
5.5
V
V
V
IH
CC
V
LOW-level input voltage (Note 1)
–0.5
–0.5
0.3 V
CC
IL
V
ILc
LOW-level input voltage contention
(Note 1)
0.4
V
Input clamp voltage
I = –18 mA
—
—
—
—
–1.2
±1
V
µA
µA
V
IK
I
I
Input leakage current
V = 3.6 V
I
I
I
Input current LOW, SDA, SCL
LOW-level output voltage
V = 0.2 V, SDA, SCL
I
—
—
5
IL
OL
V
I
OL
= 0 or 6 mA
0.47
—
0.52
—
0.6
70
V
–V
LOW-level input voltage below
output LOW-level voltage
Guaranteed by design
mV
OL
ILc
I
Output HIGH-level leakage current
Input capacitance
V
= 3.6 V
—
—
—
6
10
10
µA
OH
O
C
V = 3 V or 0 V
I
pF
I
Enable 1–4
V
LOW-level input voltage
HIGH-level input voltage
Input current LOW, EN1–EN4
Input leakage current
–0.5
2.0
—
—
—
10
—
6
0.8
5.5
30
1
V
IL
IH
IL
V
I
V
V = 0.2 V, EN1–EN4
µA
µA
pF
I
I
LI
–1
C
Input capacitance
V = 3.0 V or 0 V
I
—
7
I
NOTE:
1. V specification is for the first LOW level seen by the SDAx/SCLx lines. V is for the second and subsequent LOW levels seen by the
IL
ILc
SDAx/SCLx lines.
7
2006 Sep 22
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516
AC ELECTRICAL CHARACTERISTICS
LIMITS
TYP.
115
SYMBOL
PARAMETER
TEST CONDITIONS
Waveform 1
UNIT
MAX.
MIN.
57
t
t
t
t
t
t
Propagation delay
170
78
ns
ns
ns
ns
ns
ns
PHL
PLH
THL
TLH
SET
HOLD
Propagation delay
Transition time
Waveform 1
33
55
Waveform 1
67
Transition time
Waveform 1; Note 1
135
Enable to Start condition
Enable after Stop condition
100
100
NOTE:
1. The t
transition time is guaranteed with loads of 1.35 kΩ pull-up resistance and 7 pF load capacitance, plus an additional 50 pF load
TLH
capacitance. Different load resistance and capacitance will alter the RC time constant, thereby changing the propagation delay and
transition times.
AC WAVEFORMS
TEST CIRCUIT
V
V
CC
CC
3.3 V
0.1 V
INPUT
1.5 V
1.5 V
R
L
V
V
OUT
IN
PULSE
GENERATOR
D.U.T.
t
t
PLH
PHL
3.3 V
R
T
80%
80%
C
L
OUTPUT
1.5 V
20%
1.5 V
20%
V
OL
t
t
TLH
THL
Test Circuit for Open Drain Outputs
DEFINITIONS
SW00646
R = Load resistor; 1.35 kΩ
L
Waveform 1.
C = Load capacitance includes jig and probe capacitance;
L
7 pF
R = Termination resistance should be equal to Z
T
of
OUT
pulse generators.
SW00792
Figure 7. Test circuit
8
2006 Sep 22
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
9
2006 Sep 22
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
10
2006 Sep 22
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516
REVISION HISTORY
Rev
Date
Description
_7
20060922
Product data sheet. Supersedes data of 2004 Sep 29 (9397 750 14107).
Modifications:
• FEATURES section on page 2, 12th bullet: changed “200 V MM ...” to “150 V MM ...”
_6
_5
_4
20040929
20040624
20031110
Product data sheet (9397 750 14107). Supersedes data of 2004 Jun 24 (9397 750 12917).
Product data (9397 750 12917). Supersedes data of 2003 November 10 (9397 750 12291).
Product data (9397 750 12291); ECN 853-2234 30410 dated 03 October 2003.
Supersedes data of 2002 May 13 (9397 750 09814).
_3
20020513
Product data (9397 750 09815); ECN: 853–2234 28185 (2002 May 13)
11
2006 Sep 22
Philips Semiconductors
Product data sheet
5-channel I2C hub
PCA9516
Legal Information
Data sheet status
[1][2]
[3]
Document status
Product status
Definition
Objective [short] data sheet
Preliminary [short] data sheet
Product [short] data sheet
Development
Qualification
Production
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this data sheet was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.semiconductors.philips.com.
inclusion and/or use of Philips Semiconductors products in such equipment
or applications and therefore such inclusion and/or use is at the customer’s
own risk.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Philips Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
of use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Philips Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local Philips
Semiconductors sales office. In case of any inconsistency or conflict with the
short data sheet, the full data sheet shall prevail.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause
permanent damage to the device. Limiting values are stress ratings only and
operation of the device at these or any other conditions above those given in
the Characteristics sections of this document is not implied. Exposure to
limiting values for extended periods may affect device reliability.
Terms and conditions of sale — Philips Semiconductors products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.semiconductors.philips.com/profile/terms,
including those pertaining to warranty, intellectual property rights
infringement and limitation of liability, unless explicitly otherwise agreed to in
writing by Philips Semiconductors. In case of any inconsistency or conflict
between information in this document and such terms and conditions, the
latter will prevail.
Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, Philips Semiconductors does not give any representations
or warranties, expressed or implied, as to the accuracy or completeness of
such information and shall have no liability for the consequences of use of
such information.
Right to make changes — Philips Semiconductors reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights,
patents or other industrial or intellectual property rights.
Suitability for use — Philips Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a Philips Semiconductors product can reasonably be
expected to result in personal injury, death or severe property or
environmental damage. Philips Semiconductors accepts no liability for
Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
2
I C-bus — logo is a trademark of Koninklijke Philips Electronics N.V.
Contact information
For additional information please visit: http://www.semiconductors.philips.com
For sales office addresses, send an e-mail to: sales.addresses@www.semiconductors.philips.com.
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
Koninklijke Philips Electronics N.V. 2006.
All rights reserved.
For more information, please visit http://www.semiconductors.philips.com.
For sales office addresses, email to: sales.addresses@www.semiconductors.philips.com.
Date of release: 20060922
Document identifier: PCA9516_7
相关型号：
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