PCA9517ADP/DG [NXP]

IC SPECIALTY INTERFACE CIRCUIT, Interface IC:Other;


型号：	PCA9517ADP/DG
厂家：	NXP
描述：	IC SPECIALTY INTERFACE CIRCUIT, Interface IC:Other 中继器
文件：	总13页 (文件大小：108K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

INTEGRATED CIRCUITS

PCA9517

Level translating I²C-bus repeater

Product data sheet

2004 Oct 05

Philips

Semiconductors

Philips Semiconductors

Product data sheet

Level translating I²C-bus repeater

PCA9517

DESCRIPTION

The PCA9517 is a CMOS integrated circuit that provides level

shifting between low voltage (down to 0.9 V) and higher voltage

(2.7 V to 5.5 V) I C or SMBus applications. While retaining all the

operating modes and features of the I C system during the level

shifts, it also permits extension of the I C-bus by providing

bi-directional buffering for both the data (SDA) and the clock (SCL)

lines, thus enabling two buses of 400 pF. Using the PCA9517

enables the system designer to isolate two halves of a bus for both

voltage and capacitance. The SDA and SCL pins are over voltage

tolerant and are high-impedance when the PCA9517 is unpowered.

FEATURES

The 2.7 V to 5.5 V bus B side drivers behave much like the drivers

on the PCA9515A device while the adjustable voltage bus A side

drivers drive more current and eliminate the static offset voltage.

This results in a LOW on the B side translating into a nearly 0 V

LOW on the A side which accommodates smaller voltage swings of

lower voltage logic.

• 2 channel, bi-directional buffer isolates capacitance and allows

400 pF on either side of the device

• Voltage level translation from 0.9 V to 5.5 V and from

2.7 V to 5.5 V

• Footprint and functions replacement for PCA9515/15A

The static offset design of the B side PCA9517 I/O drivers prevent

them from being connected to another PCA9510, PCA9511, PCA9512,

PCA9513, PCA9514, PCA9515A, PCA9516A, PCA9517 (B side), or

PCA9518. The A side of two or more PCA9517s can be connected

together, however, to allow a star topography with the A side on the

common bus, and the A side can be connected directly to any other

buffer with static or dynamic offset voltage. Multiple PCA9517s can

be connected in series, A side to B side, with no build-up in offset

voltage with only time of flight delays to consider.

• I C-bus and SMBus compatible

• Active-HIGH repeater enable input

• Open-drain input/outputs

• Lock-up free operation

• Supports arbitration and clock stretching across the repeater

• Accommodates standard mode and fast mode I C devices and

multiple masters

The PCA9517 drivers are not enabled unless V

is above 0.8 V

CCA

• Powered-off high-impedance I C pins

and V is above 2.5 V. The EN pin can also be used to turn the

drivers on and off under system control. Caution should be observed

to only change the state of the enable pin when the bus is idle.

• Operating supply voltage range of 2.7 V to 3.6 V

• 5 V tolerant I C and enable pins

• 0 kHz to 400 kHz clock frequency

• ESD protection exceeds 2000 V HBM per JESD22-A114,

200 V MM per JESD22-A115, and 1000 V CDM per

JESD22-C101.

• Latch-up testing is done to JEDEC Standard JESD78 which

exceeds 100 mA.

• Packages offered: SO8, TSSOP8 (MSOP8)

ORDERING INFORMATION

PACKAGES

8-pin plastic SO

8-pin plastic TSSOP (MSOP)

TEMPERATURE RANGE

–40 to +85 °C

ORDER CODE

PCA9517D

TOPSIDE MARK

PCA9517

DRAWING NUMBER

SOT96-1

–40 to +85 °C

PCA9517DP

9517

SOT505-1

Standard packing quantities and other packaging data are available at www.standardproducts.philips.com/packaging/.

PIN CONFIGURATION

PIN DESCRIPTION

SYMBOL

FUNCTION

A side supply voltage (0.9 V to 5.5 V)

Serial clock A side bus

CCB

CCA

SCLA

SDAA

GND

SCLB

SDAB

SCLA

SDAA

GND

Serial data A side bus

Supply ground

SU01790

Active-HIGH repeater enable input

Serial data B side bus

Figure 1. Pin configuration

SDAB

SCLB

Serial clock B side bus

CCB

B side and device supply voltage

(2.7 V to 3.6 V)

The maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater.

2004 Oct 05

Philips Semiconductors

Product data sheet

Level translating I²C-bus repeater

PCA9517

BLOCK DIAGRAM

CCB

CCA

PCA9517

SDAA

SDAB

SCLA

SCLB

CCB

PULL-UP

RESISTOR

SU01791

GND

Figure 2. PCA9517 block diagram

be able to rise to 0.5 V until the A side rises above 0.3V

The output pull-down on the B side internal buffer LOW is set for

approximately 0.5 V, while the input threshold of the internal buffer is

set about 70 mV lower (0.43 V). When the B side I/O is driven LOW

internally, the LOW is not recognized as a LOW by the input. This

prevents a lock-up condition from occurring. The output pull-down

on the A side drives a hard LOW and the input level is set at

, then

CCA

the B side will continue to rise being pulled up by the external pull-up

resistor. The V is only used to provide the 0.3V reference to

the A side input comparators and for the power good detect circuit.

CCA

The PCA9517 logic and all I/Os are powered by the V

pin.

CCB

Enable

0.3 V

to accommodate the need for a lower LOW level in

CCA

The EN pin is active-HIGH with an internal pull-up to V

and

systems where the low voltage side supply voltage is as low as

0.9 V.

CCB

allows the user to select when the repeater is active. This can be

used to isolate a badly behaved slave on power-up until after the

system power-up reset. It should never change state during an I C

operation because disabling during a bus operation will hang the

bus and enabling part way through a bus cycle could confuse the

I C parts being enabled.

FUNCTIONAL DESCRIPTION

The PCA9517 enables I C-bus or SMBus translation down to V

CCA

as low as 0.9 V without degradation of system performance. The

PCA9517 contains two bi-directional, open drain buffers specifically

designed to support up-translation/down-translation between the low

voltage (as low as 0.9 V ) and a 3.3 V or 5 V I C-bus or SMBuses.

All inputs and I/Os are over voltage tolerant to 5.5 V even when the

The enable pin should only change state when the global bus and

the repeater port are in an idle state to prevent system failures.

I C Systems

device is unpowered (V

and/or V

= 0 V). The PCA9517

As with the standard I C system, pull-up resistors are required to

CCB

CCA

includes a power-up circuit that keeps the output drivers turned off

provide the logic HIGH levels on the Buffered bus (Standard

open-collector configuration of the I C-bus). The size of these

until V

is above 2.5 V and the V

is above 0.8 V. V

and

CCB

CCA

CCB

can be applied in any sequence at power-up. After power-up

pull-up resistors depends on the system, but each side of the

repeater must have a pull-up resistor. This part designed to work

CCA

and with the enable (EN) HIGH, a LOW level on the A side (below

0.3V ) turns the corresponding B side driver (either SDA or SCL)

on and drives the B side down to about 0.5 V. When the A side rises

above 0.3V the B side pull-down driver is turned off and the

with standard mode and fast mode I C devices in addition to SMBus

CCA

devices. Standard mode I C devices only specify 3 mA output drive,

this limits the termination current to 3 mA in a generic I C system

CCA

external pull-up resistor pulls the pin HIGH. When the B side falls

first and goes below 0.3V the A side driver is turned on and the

where standard mode devices and multiple masters are possible.

Under certain conditions higher termination currents can be used.

CCB

A side pulls down to 0 V. The B side pull-down is not enabled unless

the B side voltage goes below 0.4 V. If the B side low voltage does

not go below 0.5 V, the A side driver will turn off when the B side

Please see Application Note AN255 “I C & SMBus Repeaters, Hubs

and Expanders” for additional information on sizing resistors and

precautions when using more than one PCA9517 in a system or

using the PCA9517 in conjunction with other bus buffers.

voltage is above 0.7V

. If the B side low voltage goes below

CCB

0.4 V, the B side pull-down driver is enabled and the B side will only

2004 Oct 05

Philips Semiconductors

Product data sheet

Level translating I²C-bus repeater

PCA9517

APPLICATION INFORMATION

A typical application is shown in Figure 3. In this example, the

When the A side of the PCA9517 is pulled LOW by a driver on the

I C-bus, a comparator detects the falling edge when it goes below

system master is running on a 3.3 V I C-bus while the slave is

connected to a 1.2 V bus. Both buses run at 400 kHz. Master

devices can be placed on either bus.

0.3V

and causes the internal driver on the B side to turn on,

CCA

causing the B side to pull down to about 0.5 V. When the B side of

the PCA9517 falls, first a CMOS hysteresis type input detects the

falling edge and causes the internal driver on the A side to turn on

and pull the A side pin down to ground. In order to illustrate what

would be seen in a typical application, refer to Figures 6 and 7. If the

bus master in Figure 3 were to write to the slave through the

PCA9517, waveforms shown in Figure 6 would be observed on the

The PCA9517 is 5 V tolerant so it does not require any additional

circuitry to translate between 0.9 V to 5.5 V bus voltages and

2.7 V to 5.5 V bus voltages.

3.3 V

1.2 V

A bus. This looks like a normal I C transmission except that the

HIGH level may be as low as 0.9 V, and the turn on and turn off of

the acknowledge signals are slightly delayed.

10 kΩ

On the B bus side of the PCA9517, the clock and data lines would

CCA

CCB

have a positive offset from ground equal to the V of the PCA9517.

SDA

SCL

SDAB

SDAA

SDA

SCL

After the 8th clock pulse, the data line will be pulled to the V of the

slave device which is very close to ground in this example. At the

end of the acknowledge, the level rises only to the LOW level set by

the driver in the PCA9517 for a short delay while the A bus side

SCLB

SCLA

BUS

MASTER

400 kHz

SLAVE

400 kHz

PCA9517

rises above 0.3V

then it continues HIGH. It is important to note

CCA

that any arbitration or clock stretching events require that the LOW

SW02166

level on the B bus side at the input of the PCA9517 (V ) be at or

BUS B

BUS A

below 0.4 V to be recognized by the PCA9517 and then transmitted

to the A bus side.

Figure 3. Typical application

CCB

CCA

10 kΩ

SDA

SCL

SDAA

SCLA

SDAB

SCLB

SDA

SCL

BUS

MASTER

SLAVE

400 kHz

PCA9517

10 kΩ

SDAA

SCLA

SDAB

SCLB

SDA

SCL

SLAVE

400 kHz

PCA9517

10 kΩ

SDAA

SCLA

SDAB

SCLB

SDA

SCL

SLAVE

400 kHz

PCA9517

SW02347

Figure 4. Typical star application

Multiple PCA9517 A sides can be connected in a star configuration, allowing all nodes to communicate with each other.

2004 Oct 05

Philips Semiconductors

Product data sheet

Level translating I²C-bus repeater

PCA9517

10 kΩ

SDA

SCL

SDAA

SCLA

SDAB

SCLB

SDAA

SCLA

SDAB

SCLB

SDAA

SCLA

SDAB

SCLB

SDA

SCL

SLAVE

BUS

MASTER

PCA9517

400 kHz

SW02348

Figure 5. Typical series application

Multiple PCA9517s can be connected in series as long as the A side is connected to the B side. I C-bus slave devices can be connected to any

of the bus segments. The number of devices that can be connected in series is limited by repeater delay/time of flight considereations on the

maximum bus speed requirements.

0.5 V/DIV

9th CLOCK PULSE — ACKNOWLEDGE

SCL

SDA

SW02167

Figure 6. Bus A (0.9 V to 5.5 V bus) waveform

2 V/DIV

9th CLOCK PULSE — ACKNOWLEDGE

SCL

SDA

OF PCA9517

OF SLAVE

SW02168

Figure 7. Bus B (2.7 V to 5.5 V bus) waveform

2004 Oct 05

Philips Semiconductors

Product data sheet

Level translating I²C-bus repeater

PCA9517

ABSOLUTE MAXIMUM RATINGS

Limiting values in accordance with the Absolute Maximum System (IEC 134).

Voltages with respect to pin GND.

LIMITS

SYMBOL

PARAMETER

2.7 V to 3.3 V bus supply voltage range

MIN.

–0.5

—

MAX.

UNIT

CCB

Adjustable bus supply voltage range

CCA

bus

Voltage range I C-bus, SCL or SDA or enable (EN)

DC current (any pin)

°C

Power dissipation

—

100

+125

+85

+125

tot

Storage temperature range

Operating ambient temperature range

Junction temperature

–55

–40

–

stg

amb

2004 Oct 05

Philips Semiconductors

Product data sheet

Level translating I²C-bus repeater

PCA9517

DC ELECTRICAL CHARACTERISTICS

= 2.7 V to 3.3 V; GND = 0 V; T

= –40 °C to +85 °C; unless otherwise specified.

amb

LIMITS

TYP.

SYMBOL

Supplies

PARAMETER

TEST CONDITIONS

UNIT

MAX.

MIN.

DC supply voltage

2.7

0.9

—

3.3

5.5

CCB

CCA

LOW-level DC supply voltage

Quiescent supply current for V

—

CCA

Quiescent supply current,

both channels HIGH

= 3.6 V;

—

1.5

CCH

SDAn = SCLn = V

Quiescent supply current,

both channels LOW

= 3.6 V;

—

1.5

CCA

one SDA and one SCL = GND, other

SDA and SCL open

Quiescent supply current in contention

= 3.6 V;

CCAc

SDAn = SCLn = GND

Input and output SDAB and SCLB

HIGH-level input voltage

0.7V

—

5.5

CCB

LOW-level input voltage (Note 1)

–0.5

0.3V

CCB

ILc

LOW-level input voltage contention

(Note 1)

0.4

Input clamp voltage

I = –18 mA

—

–1.2

±1

µA

Input leakage current

V = 3.6 V

Input current LOW, SDA, SCL

LOW-level output voltage

V = 0.2 V, SDA, SCL

—

= 100 µA or 6 mA

0.47

—

0.52

—

0.6

–V

LOW-level input voltage below

output low level voltage

Guaranteed by design

ILc

Output HIGH-level leakage current

Input/output capacitance

= 3.6 V

—

µA

V = 3 V or 0 V; V = 3.3 V

I CC

I/O

Input/output capacitance

V = 3 V or 0 V; V = 0 V

Input and output SDAA and SCLA

HIGH-level input voltage

LOW-level input voltage (Note 1)

Input clamp voltage

0.7V

—

0.1

—

5.5

CCA

–0.5

—

0.3V

CCA

I = –18 mA

–1.2

±1

0.2

Input leakage current

V = 3.6 V

—

µA

Input current LOW, SDA, SCL

LOW-level output voltage

Output HIGH-level leakage current

Input/output capacitance

V = 0.2 V, SDA, SCL

—

= 6 mA

= 3.6 V

—

µA

V = 3 V or 0 V; V = 3.3 V

—

I/O

V = 3 V or 0 V; V = 0 V

—

Enable

LOW-level input voltage

HIGH-level input voltage

Input current LOW, EN

Input leakage current

Input capacitance

–0.5

—

0.3V

CCB

0.7V

5.5

CCB

V = 0.2 V, EN; V = 3.6 V

—

–1

—

µA

V = 3.0 V or 0 V

NOTE:

1. V specification is for the first LOW level seen by the SDAx/SCLx lines. V is for the second and subsequent LOW levels seen by the

ILc

SDAx/SCLx lines.

2004 Oct 05

Philips Semiconductors

Product data sheet

Level translating I²C-bus repeater

PCA9517

AC ELECTRICAL CHARACTERISTICS

LIMITS

TYP.

SYMBOL

PARAMETER

TEST CONDITIONS

Waveform 3; Note 3

UNIT

MAX.

MIN.

100

Propagation delay, B to A side

170

250

110

300

PLH

CCA

≤ 2.7 V; Waveform 1

≥ 3 V; Waveform 1

PHL

Transition time, A side

Waveform 2

TLH

CCA

≤ 2.7 V; Waveform 2

105

175

110

230

170

THL

≥ 3 V; Waveform 2

140

–

Propagation delay, A to B side

Transition time, B side

Waveform 2; Note 2

Waveform 1

Note 6

PLH

PHL

TLH

THL

SET

HOLD

120

Transition time, B side

Enable HIGH before Start condition

Enable HIGH after Stop condition

100

–

Note 6

–

NOTES:

1. Times are specified with loads of 1.35 kΩ pull-up resistance and 57 pF load capacitance on the B side and 167 Ω pull-up and 57 pF load

capacitance on the A side. Different load resistnace and capacitance will alter the RC time constant, thereby changing the propagation delay

and transition times.

2. The proportional delay data from A to B side is measured at 0.3V

on the A side to 1.5 V on the B side.

CCA

3. The t

delay data from B to A side is measured at 0.5 V on the B side to 0.5V

on the A side when V is less than 2 V, and 1.5 V on

PLH

CCA

the A side if V

is greater than 2 V.

CCA

4. Pull-up voltages are V

on the A side and V

on the B side.

CCB

CCA

5. Typical values were measured with V

= 3.6 V at T

= 25 °C, unless otherwise noted.

CCA

amb

6. The enable pin, EN, should only change state when the global bus and the repeater port are in an idle state.

7. Typical value measured with V

= 2.7 V at T

= 25 °C.

CCA

amb

AC WAVEFORMS

3.3 V

0.1 V

INPUT

1.5 V

INPUT

SDAB, SCLB

0.5 V

PLH

PHL

1.2 V

80%

50 % if V

1.5 V if V

is less than 2 V

is greater than 2 V

CCA

OUTPUT

SCLA, SDAA

OUTPUT

0.6 V

20%

0.6 V

20%

PLH

TLH

THL

SW02341

SW02169

Waveform 1.

Waveform 3.

CCA

INPUT

0.3V

CCA

3.3 V

80%

20%

80%

OUTPUT

1.5 V

20%

SW02170

Waveform 2.

2004 Oct 05

Philips Semiconductors

Product data sheet

Level translating I²C-bus repeater

PCA9517

TEST CIRCUIT

CCB

CCA

OUT

PULSE

GENERATOR

D.U.T.

Test Circuit for Open Drain Outputs

DEFINITIONS

R = Load resistor; 1.35 kΩ on B side, 167 Ω on A side

C = Load capacitance includes jig and probe capacitance;

57 pF

R = Termination resistance should be equal to Z

OUT

pulse generators.

SW02342

2004 Oct 05

Philips Semiconductors

Product data sheet

Level translating I²C-bus repeater

PCA9517

SO8: plastic small outline package; 8 leads; body width 3.9 mm

SOT96-1

2004 Oct 05

Philips Semiconductors

Product data sheet

Level translating I²C-bus repeater

PCA9517

TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm

SOT505-1

2004 Oct 05

Philips Semiconductors

Product data sheet

Level translating I²C-bus repeater

PCA9517

REVISION HISTORY

Rev

Date

Description

20041005

Product data sheet (9397 750 13252).

2004 Oct 05

Philips Semiconductors

Product data sheet

Level translating I²C-bus repeater

PCA9517

Purchase of Philips I C components conveys a license under the Philips’ I C patent

to use the components in the I C system provided the system conforms to the

I C specifications defined by Philips. This specification can be ordered using the

code 9398 393 40011.

Data sheet status

Product

status

Definitions

[1]

Level

Data sheet status

[2] [3]

Objective data

Development

This data sheet contains data from the objective specification for product development.

Philips Semiconductors reserves the right to change the specification in any manner without notice.

Preliminary data

Qualification

Production

This data sheet contains data from the preliminary specification. Supplementary data will be published

at a later date. Philips Semiconductors reserves the right to change the specification without notice, in

order to improve the design and supply the best possible product.

III

Product data

This data sheet contains data from the product specification. Philips Semiconductors reserves the

right to make changes at any time in order to improve the design, manufacturing and supply. Relevant

changes will be communicated via a Customer Product/Process Change Notification (CPCN).

[1] Please consult the most recently issued data sheet before initiating or completing a design.

[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL

http://www.semiconductors.philips.com.

[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see

the relevant data sheet or data handbook.

Limitingvaluesdefinition— Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting

values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given

in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no

representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be

expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree

to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described

or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated

viaaCustomerProduct/ProcessChangeNotification(CPCN).PhilipsSemiconductorsassumesnoresponsibilityorliabilityfortheuseofanyoftheseproducts,conveys

nolicenseortitleunderanypatent, copyright, ormaskworkrighttotheseproducts, andmakesnorepresentationsorwarrantiesthattheseproductsarefreefrompatent,

Koninklijke Philips Electronics N.V. 2004

Contact information

For additional information please visit

http://www.semiconductors.philips.com.

Fax: +31 40 27 24825

Date of release: 10-04

For sales offices addresses send e-mail to:

sales.addresses@www.semiconductors.philips.com.

Document number:

9397 750 13252

Philips

Semiconductors

2004 Oct 05

PCA9517ADP/DG [NXP]

相关型号：

SI9130DB

SI9135LG-T1

SI9135LG-T1-E3

SI9135_11

SI9136_11

SI9130CG-T1-E3

SI9130LG-T1-E3

SI9130_11

SI9137

SI9137DB

SI9137LG

SI9122E