PCA9550DP [NXP]
2-bit I2C LED driver with programmable blink rates; 2位I2C LED驱动器，具有可编程闪烁速率
| 型号： | PCA9550DP |
| 厂家： | 
NXP |
| 描述： | 2-bit I2C LED driver with programmable blink rates |
| 文件： | 总17页 (文件大小：130K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
PCA9550
2-bit I2C LED driver with programmable
blink rates
Product data
2003 May 02
Supersedes data of 2002 Dec 13
Philips
Semiconductors
Philips Semiconductors
Product data
2-bit I2C LED driver with
programmable blink rates
PCA9550
DESCRIPTION
2
The PCA9550 LED Blinker blinks LEDs in I C-bus and SMBus
applications where it is necessary to limit bus traffic or free up the
2
I C Master’s (MCU, MPU, DSP, chipset, etc.) timer. The uniqueness
of this device is the internal oscillator with two programmable blink
rates. To blink LEDs using normal I/O Expanders like the PCF8574
or PCA9554, the bus master must send repeated commands to turn
the LED on and off. This greatly increases the amount of traffic on
2
the I C-bus and uses up one of the master’s timers. The PCA9550
LED Blinker instead requires only the initial set up command to
program BLINK RATE 1 and BLINK RATE 2 (i.e., the frequency and
duty cycle). From then on, only one command from the bus master
is required to turn each individual open drain output ON, OFF, or to
cycle at BLINK RATE 1 or BLINK RATE 2. Maximum output sink
current is 25 mA per bit and 50 mA per package.
FEATURES
• 2 LED drivers (on, off, flashing at a programmable rate)
• 2 selectable, fully programmable blink rates (frequency and duty
cycle) between 0.15625 and 40 Hz (6.4 and 0.025 seconds)
• Input/output not used as LED drivers can be used as regular
Any bits not used for controlling the LEDs can be used for General
Purpose Parallel Input/Output (GPIO) expansion.
GPIOs
• Internal oscillator requires no external components
The active-LOW hardware reset pin (RESET) and Power On Reset
(POR) initializes the registers to their default state, all zeroes,
causing the bits to be set HIGH (LED off).
2
• I C-bus interface logic compatible with SMBus
• Internal power-on reset
One hardware address pin on the PCA9550 allows two devices to
operate on the same bus.
• Noise filter on SCL/SDA inputs
• Active-LOW reset input
PIN CONFIGURATION
• 2 open drain outputs directly drive LEDs to 25 mA
• Controlled edge rates to minimize ground bounce
• No glitch on power-up
1
2
3
4
8
7
6
5
V
DD
A0
LED0
LED1
SDA
• Supports hot insertion
SCL
• Low stand-by current
V
RESET
SS
• Operating power supply voltage range of 2.3 V to 5.5 V
• 0 to 400 kHz clock frequency
SW00926
• ESD protection exceeds 2000 V HBM per JESD22-A114,
150 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
Figure 1. Pin configuration
• Latch-up testing is done to JEDEC Standard JESD78 which
exceeds 100 mA
PIN DESCRIPTION
• Packages offered: SO8, TSSOP8
PIN
NUMBER
SYMBOL
FUNCTION
Address input 0
1
2
3
4
5
6
7
8
A0
LED0
LED1
LED driver 0
LED driver 1
Supply ground
V
SS
RESET
SCL
Active-LOW reset input
Serial clock line
Serial data line
SDA
V
DD
Supply voltage
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
TOPSIDE MARK
DRAWING NUMBER
8-Pin Plastic SO
-40 to +85 °C
-40 to +85 °C
PCA9550D
PCA9550
9550
SOT96-1
8-Pin Plastic TSSOP
PCA9550DP
SOT505-1
Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.
2
I C is a trademark of Philips Semiconductors Corporation.
2
2003 May 02
Philips Semiconductors
Product data
2-bit I2C LED driver with programmable blink rates
PCA9550
BLOCK DIAGRAM
A0
PCA9550
INPUT
REGISTER
SCL
2
INPUT
FILTERS
I C-BUS
LED SELECT (LSx)
REGISTER
CONTROL
SDA
0
1
LEDx
POWER-ON
RESET
V
DD
BLINK0
BLINK1
PWM0
REGISTER
PRESCALER 0
REGISTER
RESET
PWM1
REGISTER
PRESCALER 1
REGISTER
OSCILLATOR
V
SS
NOTE: ONLY ONE I/O SHOWN FOR CLARITY
SW00927
Figure 2. Block diagram
3
2003 May 02
Philips Semiconductors
Product data
2-bit I2C LED driver with programmable blink rates
PCA9550
Unused bits must be programmed with zeroes.
INPUT — INPUT REGISTER
DEVICE ADDRESSING
Following a START condition the bus master must output the
address of the slave it is accessing. The address of the PCA9550 is
shown in Figure 3. To conserve power, no internal pull-up resistor is
incorporated on the hardware selectable address pin and it must be
pulled HIGH or LOW.
bit
7
0
6
0
5
0
4
0
3
0
2
0
1
0
default
X
X
The INPUT register reflects the state of the device pins. Writes to
this register will be acknowledged but will have no effect.
SLAVE ADDRESS
PSC0 — FREQUENCY PRESCALER 0
bit
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
1
1
1
0
0
0
0
A0 R/W
default
PSC0 is used to program the period of the PWM output.
HARDWARE
SELECTABLE
FIXED
(PSC0 ) 1)
SW00928
The period of BLINK0 +
38
PWM0 — PWM REGISTER 0
Figure 3. Slave address
bit
7
1
6
0
5
0
4
0
3
0
2
0
1
0
0
0
The last bit of the address byte defines the operation to be
performed. When set to logic 1 a read is selected while a logic 0
selects a write operation.
default
The PWM0 register determines the duty cycle of BLINK0. The
outputs are LOW (LED off) when the count is less than the value in
PWM0 and HIGH when it is greater. If PWM0 is programmed with
00h, then the PWM0 output is always LOW.
CONTROL REGISTER
Following the successful acknowledgement of the slave address,
the bus master will send a byte to the PCA9550 which will be stored
in the Control Register.
256 – PWM0
The duty cycle of BLINK0 is:
256
PSC1 — FREQUENCY PRESCALER 1
0
0
0
AI
0
B2 B1 B0
bit
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
1
default
REGISTER ADDRESS
PSC1 is used to program the period of PWM output.
AUTO-INCREMENT FLAG
RESET STATE: 00h
SW01034
(PSC1 ) 1)
The period of BLINK1 +
38
Figure 4. Control register
PWM1 — PWM REGISTER 1
CONTROL REGISTER DEFINITION
bit
7
1
6
0
5
0
4
0
3
0
2
0
1
0
0
0
REGISTER
NAME
REGISTER
FUNCTION
default
B2
0
B1
0
B0
0
TYPE
The PWM1 register determines the duty cycle of BLINK1. The
INPUT
READ
INPUT REGISTER
outputs are LOW (LED off) when the count is less than the value in
PWM1 and HIGH when it is greater. If PWM1 is programmed with
00h, then the PWM1 output is always LOW.
READ/
WRITE
FREQUENCY
PRESCALER 0
0
0
1
PSC0
PWM0
PSC1
PWM1
LS0
256 – PWM1
The duty cycle of BLINK1 is:
256
READ/
WRITE
0
0
1
1
1
1
0
0
0
1
0
1
PWM REGISTER 0
LS0 — LED SELECTOR
READ/
WRITE
FREQUENCY
PRESCALER 1
LED 1
LED 0
bit
7
1
6
1
5
1
4
1
3
2
1
1
0
1
READ/
WRITE
PWM REGISTER 1
LED SELECTOR
default
0
0
READ/
WRITE
The LSx LED select registers determine the source of the LED data.
00 = Output is set LOW (LED on)
01 = Output is set Hi-Z (LED off - default)
10 = Output blinks at PWM0 rate
11 = Output blinks at PWM1 rate
REGISTER DESCRIPTION
The lowest 3 bits are used as a pointer to determine which register
will be accessed.
If the auto-increment flag is set, the three low order bits of the
Control Register are automatically incremented after a read or write.
This allows the user to program the registers sequentially. The
contents of these bits will rollover to ‘000’ after the last register is
accessed.
When auto-increment flag is set (AI = 1) and a read sequence is
initiated, the sequence must start by reading a register different from
the input register (B2 B1 B0 0 0 0 0).
Only the 3 least significant bits are affected by the AI flag.
4
2003 May 02
Philips Semiconductors
Product data
2-bit I2C LED driver with programmable blink rates
PCA9550
POWER-ON RESET
When power is applied to V , an internal Power-On Reset holds
DD
the PCA9550 in a reset state until V has reached V
point, the reset condition is released and the PCA9550 registers are
initialized to their default states, all the outputs in the off state.
. At this
SDA
SCL
DD
POR
EXTERNAL RESET
data line
stable;
data valid
change
of data
allowed
A reset can be accomplished by holding the RESET pin LOW for a
2
minimum of t . The PCA9550 registers and I C state machine will
W
be held in their default state until the RESET input is once again
HIGH.
SW00363
Figure 5. Bit transfer
This input requires a pull-up resistor to V
DD.
Start and stop conditions
Both data and clock lines remain HIGH when the bus is not busy. A
HIGH-to-LOW transition of the data line, while the clock is HIGH is
defined as the start condition (S). A LOW-to-HIGH transition of the
data line while the clock is HIGH is defined as the stop condition (P)
(see Figure 6).
2
CHARACTERISTICS OF THE I C-BUS
2
The I C-bus is for 2-way, 2-line communication between different ICs
or modules. The two lines are a serial data line (SDA) and a serial
clock line (SCL). Both lines must be connected to a positive supply
via a pull-up resistor when connected to the output stages of a device.
Data transfer may be initiated only when the bus is not busy.
System configuration
A device generating a message is a transmitter: a device receiving
is the receiver. The device that controls the message is the master
and the devices which are controlled by the master are the slaves
(see Figure 7).
Bit transfer
One data bit is transferred during each clock pulse. The data on the
SDA line must remain stable during the HIGH period of the clock
pulse as changes in the data line at this time will be interpreted as
control signals (see Figure 5).
SDA
SDA
SCL
SCL
S
P
START condition
STOP condition
SW00365
Figure 6. Definition of start and stop conditions
SDA
SCL
MASTER
TRANSMITTER/
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
2
SLAVE
RECEIVER
I C
MASTER
TRANSMITTER
TRANSMITTER/
RECEIVER
MULTIPLEXER
SLAVE
SW00366
Figure 7. System configuration
5
2003 May 02
Philips Semiconductors
Product data
2-bit I2C LED driver with programmable blink rates
PCA9550
Acknowledge
The number of data bytes transferred between the start and the stop conditions from transmitter to receiver is not limited. Each byte of eight bits
is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter whereas the master generates an
extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also a master must generate an
acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down
the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock
pulse, set-up and hold times must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of
the slave. In this event, the transmitter must leave the data line HIGH to enable the master to generate a stop condition.
DATA OUTPUT
BY TRANSMITTER
not acknowledge
DATA OUTPUT
BY RECEIVER
acknowledge
SCL FROM
MASTER
1
2
8
9
S
clock pulse for
acknowledgement
START condition
SW00368
2
Figure 8. Acknowledgement on the I C-bus
6
2003 May 02
Philips Semiconductors
Product data
2-bit I2C LED driver with programmable blink rates
PCA9550
Bus transactions
1
2
3
4
5
6
0
7
8
0
9
SCL
slave address
command byte
data to register
DATA 1
SDA
1
1
0
0
0
A0
S
A
0
0
0
AI
0
B2 B1 B0
A
A
start condition
R/W acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
WRITE TO
REGISTER
DATA OUT
FROM PORT
DATA 1 VALID
t
pv
SW01014
Figure 9. WRITE to register
acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
acknowledge
from master
slave address
slave address
data from register
0
0
0
0
0
0
1
1
0
A0
1
1
0
A0
1
DATA
S
0
A
0
0
0
AI
0
B2 B1 B0
A
S
A
A
first byte
R/W
R/W
auto-increment
register address
if AI = 1
at this moment master-transmitter
becomes master-receiver and
slave-receiver becomes
slave-transmitter
no acknowledge
from master
data from register
NA
P
DATA
last byte
SW01098
Figure 10. READ from register
slave address
data from port
data from port
SDA
DATA 1
A
DATA 4
1
1
0
0
0
0
A0
S
1
A
NA
P
start condition
R/W acknowledge
from slave
acknowledge
from master
no acknowledge
from master
stop
condition
READ FROM
PORT
DATA INTO
PORT
DATA 1
DATA 2
DATA 3
DATA 4
t
ph
t
ps
SW01095
NOTES:
1. This figure assumes the command byte has previously been programmed with 00h.
Figure 11. READ input port register
7
2003 May 02
Philips Semiconductors
Product data
2-bit I2C LED driver with programmable blink rates
PCA9550
APPLICATION DATA
5 V
5 V
V
DD
LED0
LED1
SDA
SCL
SDA
SCL
RESET
2
I C/SMBus MASTER
A0
V
SS
PCA9550
Figure 12. Typical application
SW00929
Minimizing I when the I/O is used to control LEDs
DD
When the I/Os are used to control LEDs, they are normally connected to V through a resistor as shown in Figure 12. Since the LED acts as a
DD
diode, when the LED is off the I/O V is about 1.2 V less than V . The supply current, I , increases as V becomes lower than V and is
IN
DD
DD
IN
DD
specified as ∆I in the DC characteristics table.
DD
Designs needing to minimize current consumption, such as battery power applications, should consider maintaining the I/O pins greater than or
equal to V when the LED is off. Figure 13 shows a high value resistor in parallel with the LED. Figure 14 shows V less than the LED supply
DD
DD
voltage by at least 1.2 V. Both of these methods maintain the I/O V at or above V and prevents additional supply current consumption when
IN
DD
the LED is off.
V
3.3 V
DD
5 V
100 kΩ
LED
V
LED
DD
V
DD
LEDx
LEDx
SW02087
SW02086
Figure 13. High value resistor in parallel with the LED
Figure 14. Device supplied by a lower voltage
8
2003 May 02
Philips Semiconductors
Product data
2-bit I2C LED driver with programmable blink rates
PCA9550
Programming example
The following example will show how to set LED0 to blink at 1 Hz at
a 50% duty cycle. LED1 will be set to blink at 4 Hz, 25% duty cycle.
Table 1.
2
I C-bus
Start
S
PCA9550 address with A0 = LOW
PSC0 subaddress + auto-increment
Set prescaler PSC0 to achieve a period of 1 second:
COh
11h
25h
PSC0 ) 1
Blink period + 1 +
38
PSC0 = 37
Set PWM0 duty cycle to 50%:
80h
09h
256 – PWM0
+ 0.5
256
PWM0 = 128
Set prescaler PCS1 to achieve a period of 0.25
seconds:
PSC1 ) 1
Blink period + 0.25 +
38
PSC1 = 9
Set PWM1 output duty cycle to 25%:
C0h
256 – PWM1
+ 0.25
256
PWM1 = 192
Set LED0 to PWM0 and set LED1 to blink at PWM1
Stop
OEh
P
9
2003 May 02
Philips Semiconductors
Product data
2-bit I2C LED driver with programmable blink rates
PCA9550
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX
UNIT
V
V
DD
Supply voltage
-0.5
6.0
5.5
V
DC voltage on an I/O
V
- 0.5
V
I/O
I/O
SS
SS
I
I
DC output current on an I/O
Supply current
—
—
25
mA
mA
mW
°C
50
P
T
Total power dissipation
Storage temperature range
Operating ambient temperature
—
400
+150
+85
tot
-65
-40
stg
T
amb
°C
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take
precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC24 under ”Handling MOS devices”.
DC CHARACTERISTICS
V
= 2.3 to 5.5 V; V = 0 V; T
= -40 to +85 °C; unless otherwise specified. TYP at 3.3 V and 25 °C.
DD
SS
amb
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
Supplies
V
Supply voltage
Supply current
2.3
—
5.5
V
DD
Operating mode; V = 5.5 V; no load;
DD
I
—
350
500
µA
DD
V = V or V ; f = 100 kHz
I
DD
SS SCL
Standby mode; V = 5.5 V; no load;
DD
I
stb
Standby current
—
1.9
3.0
µA
V = V or V ; f = 0 kHz
I
DD
SS SCL
Standby mode; V = 5.5 V; Every
DD
∆I
Additional standby current
Power-on reset voltage
—
—
200
2.2
µA
DD
LED I/O at V = 4.3 V; f
= 0 kHz
IN
SCL
V
POR
No load; V = V or V
1.4
1.7
V
I
DD
SS
Input SCL; input/output SDA
V
LOW-level input voltage
HIGH-level input voltage
LOW-level output current
Leakage current
-0.5
—
—
0.3 V
V
V
IL
IH
DD
V
0.7 V
3
5.5
—
+1
5
DD
I
OL
V
= 0.4V
6.5
—
mA
µA
pF
OL
I
L
V = V = V
I
-1
DD
SS
C
Input capacitance
V = V
I
—
3.7
I
SS
I/Os
V
LOW-level input voltage
HIGH-level input voltage
-0.5
2.0
9
—
—
—
—
—
—
—
—
—
2.1
0.8
5.5
—
—
—
—
—
—
1
V
IL
V
IH
V
V
OL
V
OL
V
OL
V
OL
V
OL
V
OL
V
DD
= 0.4 V; V = 2.3 V; Note 1
mA
mA
mA
mA
mA
mA
µA
pF
DD
= 0.4 V; V = 3.0 V; Note 1
11
14
14
18
24
-1
DD
= 0.4 V; V = 5.0 V; Note 1
DD
I
OL
LOW-level output current
= 0.7 V; V = 2.3 V; Note 1
DD
= 0.7 V; V = 3.0 V; Note 1
DD
= 0.7 V; V = 5.0 V; Note 1
DD
I
L
Input leakage current
= 3.6 V; V = 0 or V
DD
I
C
Input/output capacitance
—
5
IO
Select Inputs A0 / RESET
V
LOW-level input voltage
HIGH-level input voltage
Input leakage current
Input capacitance
-0.5
2.0
-1
—
—
0.8
5.5
1
V
V
IL
V
I
IH
—
µA
pF
LI
C
V = V
I SS
—
2.3
5
I
NOTE:
1. Each I/O must be externally limited to a maximum of 25 mA and the device must be limited to a maximum current of 50 mA.
10
2003 May 02
Philips Semiconductors
Product data
2-bit I2C LED driver with programmable blink rates
PCA9550
AC SPECIFICATIONS
STANDARD MODE
FAST MODE
I C-BUS
2
2
I C-BUS
SYMBOL
PARAMETER
UNITS
MIN
0
MAX
100
—
MIN
MAX
f
t
Operating frequency
0
400
—
kHz
µs
µs
µs
µs
ns
ns
ns
ns
ns
µs
µs
ns
ns
ns
SCL
Bus free time between STOP and START conditions
Hold time after (repeated) START condition
Repeated START condition set-up time
Set-up time for STOP condition
4.7
4.0
4.7
4.0
0
1.3
BUF
t
—
0.6
—
HD;STA
t
t
—
0.6
—
SU;STA
—
0.6
—
SU;STO
t
Data in hold time
—
0
—
HD;DAT
VD;ACK
2
t
Valid time for ACK condition
—
600
600
1500
—
—
600
600
600
—
3
t
(L)
Data out valid time
—
—
—
VD;DAT
3
t
(H)
Data out valid time
—
VD;DAT
t
Data set-up time
250
4.7
4.0
—
100
SU;DAT
t
Clock LOW period
Clock HIGH period
Clock/Data fall time
Clock/Data rise time
—
1.3
—
LOW
t
—
0.6
—
HIGH
1
1
t
F
300
1000
50
20 + 0.1 C
20 + 0.1 C
—
300
300
50
b
t
R
—
b
t
Pulse width of spikes that must be suppressed by the
input filters
—
SP
Port Timing
t
t
t
Output data valid
—
100
1
200
—
—
100
1
200
—
ns
ns
µs
PV
PS
Input data set-up time
Input data hold time
—
—
PH
Reset
t
Reset pulse width
Reset recovery time
Time to reset
6
0
—
—
—
6
0
—
—
—
ns
ns
ns
W
t
REC
4,5
RESET
t
400
400
NOTES:
1. C = total capacitance of one bus line in pF.
b
2. t
= time for Acknowledgement signal from SCL LOW to SDA (out) LOW.
VD;ACK
3. t
= minimum time for SDA data out to be valid following SCL LOW.
VD;DAT
4. Resetting the device while actively communicating on the bus may cause glitches or errant STOP conditions.
5. Upon reset, the full delay will be the sum of t and the RC time constant of the SDA bus.
RESET
11
2003 May 02
Philips Semiconductors
Product data
2-bit I2C LED driver with programmable blink rates
PCA9550
+20%
+10%
MAX
0%
PERCENT
VARIATION
AVG
-10%
-20%
-30%
-40%
MIN
-40
0
+25
+70
+85
TEMPERATURE
(°C)
SW01085
Figure 15. Typical frequency variation over process at V = 2.3 V to 3.0 V
DD
+20%
+10%
MAX
0%
PERCENT
VARIATION
AVG
MIN
-10%
-20%
-30%
-40%
-40
0
+25
+70
+85
TEMPERATURE
(°C)
SW01086
Figure 16. Typical frequency variation over process at V = 3.0 V to 5.5 V
DD
12
2003 May 02
Philips Semiconductors
Product data
2-bit I2C LED driver with programmable blink rates
PCA9550
START
ACK OR READ CYCLE
SCL
SDA
30%
t
REC
RESET
50%
50%
50%
t
REC
t
W
t
REC
50%
LEDx
LED OFF
SW01087
Figure 17. Definition of RESET timing
SDA
t
R
t
F
t
t
SP
HD;STA
t
t
LOW
BUF
SCL
t
t
t
SU;STO
HD;STA
SU;STA
t
t
t
SU;DAT
HD;DAT
HIGH
P
S
Sr
P
SU00645
Figure 18. Definition of timing
13
2003 May 02
Philips Semiconductors
Product data
2-bit I2C LED driver with programmable blink rates
PCA9550
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
14
2003 May 02
Philips Semiconductors
Product data
2-bit I2C LED driver with programmable blink rates
PCA9550
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm
SOT505-1
15
2003 May 02
Philips Semiconductors
Product data
2-bit I2C LED driver with programmable blink rates
PCA9550
REVISION HISTORY
Rev
Date
Description
_2
20030502
Product data (9397 750 11461); ECN 853-2396 29859 dated 24 April 2003.
Supersedes data of 2002 Dec 13 (9397 750 10857).
Modifications:
• Correction to voltage in typical application drawing
• Update maximum current per bit and per device
• Adjust maximum and minimum curves to 15% on frequency variation graphs.
Product data (9397 750 10857); ECN 853-2396 29264 of 09 December 2002.
_1
20021213
16
2003 May 02
Philips Semiconductors
Product data
2-bit I2C LED driver with programmable blink rates
PCA9550
2
2
Purchase of Philips I C components conveys a license under the Philips’ I C patent
2
to use the components in the I C system provided the system conforms to the
I C specifications defined by Philips. This specification can be ordered using the
2
code 9398 393 40011.
Data sheet status
Product
status
Definitions
[1]
Level
Data sheet status
[2] [3]
I
Objective data
Development
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
Production
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given
in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no
representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be
expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree
to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described
or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated
via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys
no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent,
copyright, or mask work right infringement, unless otherwise specified.
Koninklijke Philips Electronics N.V. 2003
Contact information
All rights reserved. Printed in U.S.A.
For additional information please visit
http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
Date of release: 05-03
For sales offices addresses send e-mail to:
sales.addresses@www.semiconductors.philips.com.
Document order number:
9397 750 11461
Philips
Semiconductors
相关型号：
PCA9550DP-T
2-bit I2C-bus LED driver with programmable blink rates - # of Addresses: 2 ; I2C-bus: 400 kHz; Max Sink Current per bit: 25 mA; Max Sink Current, per package: 50 mA; Number of bits: 2 ; Operating temperature: -40~85 Cel; Operating voltage: 2.3~5.5 VDC; PWMs: 2 (40 Hz to 6.4 sec) ; Reset input pin: yes
NXP
©2020 ICPDF网 联系我们和版权申明