PCA9556_02 [NXP]
Octal SMBus and I2C registered interface; 八SMBus和I2C接口注册
| 型号： | PCA9556_02 |
| 厂家： | 
NXP |
| 描述： | Octal SMBus and I2C registered interface |
| 文件： | 总13页 (文件大小：98K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
PCA9556
Octal SMBus and I2C registered interface
Product data
2002 Mar 28
Supersedes data of 2000 Nov 13
Philips
Semiconductors
Philips Semiconductors
Product data
Octal SMBus and I2C registered interface
PCA9556
The power-on reset puts the registers in their default state and
initializes the SMBus state machine. The RESET pin causes the
same reset/initialization to occur without depowering the part.
2
The PCA9557 8-bit I C SMBus I/O port with reset is the higher
performance pin-for-pin replacement for the PCA9556.
PIN CONFIGURATION
V
1
2
3
4
5
6
7
8
16
DD
SCL
SDA
15 RESET
FEATURES
I/O7
14
A0
A1
• SMBus compliance with fixed 3.3V voltage levels
I/O6
13
I/O5
I/O4
A2
12
11
10
9
• Operating power supply voltage range of 3.0 V – 5.5 V
• Active high polarity inverter register
• Each I/O is configurable as an input or output
• Active low reset pin
I/O0
I/O1
I/O3
I/O2
V
SS
su01045
Figure 1. Pin configuration
• Low leakage current on power-down
• Noise filter on SCL/SDA inputs
• No glitch on power-up
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
Serial clock line
• Internal power-on reset
1
2
SCL
SDA
A0
• 8 I/O pins which default to 8 inputs
• High impedance open drain on I/O0
Serial data line
Address input 0
Address input 1
Address input 2
I/O0 (open drain)
I/O1
3
• ESD protection exceeds 2000 V HBM per JESD22-A114,
4
A1
200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
5
A2
• Latch-up testing is done to JESDEC Standard JESD78 which
6
I/O0
I/O1
exceeds 100 mA
7
8
V
Supply GROUND
I/O2 to I/O7
SS
9–14
15
16
I/O2–I/O7
RESET
DESCRIPTION
The PCA9556 is a silicon CMOS circuit which provides parallel
input/output expansion for SMBus applications. The PCA9556
consists of an 8-bit input port register, 8-bit output port register, and
an SMBus interface. It has low current consumption and a high
impedance open drain output pin, I/O0.
External reset (active LOW)
Supply voltage
V
DD
The SMBus system master can reset the PCA9556 in the event of a
timeout by asserting a LOW on the reset input. The SMBus system
master can also invert the PCA9556 inputs by writing to the active
HIGH polarity inversion bits. Finally, the system master can enable
the PCA9556’s I/Os as either inputs or outputs by writing to the
configuration register.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
DRAWING NUMBER
16-Pin Plastic TSSOP
–40 to +85 °C
PCA9556PW
SOT403-1
Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.
2
SMBus as specified by the Smart Battery System Implementers Forum is a derivative of the Philips I C patent.
2
I C is a trademark of Philips Semiconductors Corporation.
2
2002 Mar 28
853-2138 27929
Philips Semiconductors
Product data
Octal SMBus and I2C registered interface
PCA9556
BLOCK DIAGRAM
A0
A1
A2
I/O0
I/O1
I/O2
I/O3
SCL
INPUT
FILTER
INPUT/
OUTPUT
PORTS
8-BIT
SMBus
CONTROL
SDA
I/O4
I/O5
WRITE pulse
READ pulse
I/O6
I/O7
V
DD
V
SS
POWER-ON
RESET
RESET
NOTE: ALL I/Os ARE SET TO INPUTS AT RESET
SW00793
Figure 2. Block diagram
SYSTEM DIAGRAM
Input Port
Q7
Polarity Inversion
Q7
Configuration
Q7
Output Port
Q7
V
= 16
CC
1.1 KΩ
GND = 8
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
6
Q6
Q5
Q4
Q3
Q2
Q1
Q0
Q6
Q5
Q4
Q3
Q2
Q1
Q0
Q6
Q5
Q4
Q3
Q2
Q1
Q0
Q6
Q5
Q4
Q3
Q2
Q1
Q0
7
1.1 KΩ
1.6 KΩ
RESET
15
9
2
I C/SMBus
Interface
logic
SCL
SDA
1
2
5
4
3
10
11
12
13
14
1.6 KΩ
1.1 KΩ
or
A2
1.1 KΩ
1.1 KΩ
or
or
A1
A0
SW00794
Figure 3. System diagram
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2002 Mar 28
Philips Semiconductors
Product data
Octal SMBus and I2C registered interface
PCA9556
REGISTERS
Command Byte
Register 2 — Polarity Inversion Register
Command
Protocol
Function
bit
N7
1
N6
1
N5
1
N4
1
N3
0
N2
0
N1
0
N0
0
default
0
1
2
3
Read byte
Input port register
Output port register
Polarity inversion register
Configuration register
Read/write byte
Read/write byte
Read/write byte
This register enables polarity inversion of pins defined as inputs by
register 3. If a bit in this register is set (written with ‘1’), the
corresponding port pin’s polarity is inverted. If a bit in this register is
cleared (written with a ‘0’), the corresponding port pin’s original
polarity is retained.
The command byte is the first byte to follow the address byte during
a write transmission. It is used as a pointer to determine which of the
following registers will be written or read.
Register 3 — Configuration Register
bit
C7
1
C6
1
C5
1
C4
1
C3
1
C2
1
C1
1
C0
1
Register 0 — Input Port Register
default
I7
I6
I5
I4
I3
I2
I1
I0
This register configures the directions of the I/O pins. If a bit in this
register is set, the corresponding port pin is enabled as an input with
high impedance output driver. If a bit in this register is cleared, the
corresponding port pin is enabled as an output.
This register is an read-only port. It reflects the incoming logic levels
of the pins, regardless of whether the pin is defined as an input or an
output by register 3. Writes to this register have no effect.
Register 1 — Output Port Register
RESET
bit
O7
0
O6
0
O5
0
O4
0
O3
0
O2
0
O1
0
O0
0
default
Power-on Reset
When power is applied to V , an internal power-on reset holds the
DD
This register reflects the outgoing logic levels of the pins defined as
outputs by register 3. Bit values in this register have no effect on
pins defined as inputs. In turn, reads from this register reflect the
value that is in the flip-flop controlling the output selection, NOT the
actual pin value.
PCA9556 in a reset state until V has reached V
. At that point,
DD
POR
the reset condition is released and the PCA9556 registers and
SMBus state machine will initialize to their default states.
External Reset
A reset can be accomplished by holding the RESET pin low for a
2
minimum of T . The PCA9556 registers and SMBus/I C state
W
machine will be held in their default state until the RESET input is
once again high. This input typically requires a pull-up to 3.3 V V
CC.
4
2002 Mar 28
Philips Semiconductors
Product data
Octal SMBus and I2C registered interface
PCA9556
SIMPLIFIED SCHEMATIC OF I/O0
DATA FROM
SHIFT REGISTER
CONFIGURATION
REGISTER
DATA FROM
SHIFT REGISTER
Q
D
OUTPUT PORT
REGISTER DATA
FF
WRITE
CONFIGURATION
PULSE
D
Q
Q
Q
C
K
FF
I/O0
WRITE PULSE
C
K
ESD PROTECTION DIODE
OUTPUT
PORT
REGISTER
V
SS
INPUT PORT
REGISTER
INPUT PORT
REGISTER DATA
D
Q
FF
Q
C
K
READ PULSE
DATA FROM
SHIFT REGISTER
POLARITY
REGISTER DATA
D
Q
Q
FF
WRITE POLARITY
PULSE
C
K
POLARITY
INVERSION
REGISTER
SW00795
NOTE: On power–up or reset, all registers return to default values.
Figure 4. Simplified schematic of I/O0
5
2002 Mar 28
Philips Semiconductors
Product data
Octal SMBus and I2C registered interface
PCA9556
SIMPLIFIED SCHEMATIC OF I/O1 TO I/O7
DATA FROM
SHIFT REGISTER
OUTPUT PORT
REGISTER DATA
CONFIGURATION
REGISTER
V
DD
DATA FROM
SHIFT REGISTER
Q
D
ESD PROTECTION DIODE
FF
WRITE
CONFIGURATION
PULSE
D
Q
Q
Q
C
K
FF
I/O0 TO I/O15
WRITE PULSE
C
K
ESD PROTECTION DIODE
OUTPUT
PORT
REGISTER
V
SS
INPUT PORT
REGISTER
INPUT PORT
REGISTER DATA
D
Q
FF
Q
C
K
READ PULSE
DATA FROM
SHIFT REGISTER
POLARITY
REGISTER DATA
D
Q
Q
FF
WRITE POLARITY
PULSE
C
K
POLARITY
INVERSION
REGISTER
SW00796
NOTE: On power–up or reset, all registers return to default values.
Figure 5. Simplified schematic of I/O1 to I/O7
6
2002 Mar 28
Philips Semiconductors
Product data
Octal SMBus and I2C registered interface
PCA9556
SMBus Address
slave address
0
0
1
1
A2 A1 A0 R/W
programmable
fixed
su01048
Figure 6. PCA9556 address
SMBus Transactions
Data is transmitted to the PCA9556 registers using Write Byte transfers (see Figures 7 and 8). Data is read from the PCA9556 registers using
Read and Receive Byte transfers (see FIgures 9 and 10).
1
2
3
4
5
6
7
8
9
SCL
SDA
command byte
slave address
data to port
DATA 1
0
0
1
1
A2 A1 A0
S
0
A
0
0
0
0
0
0
0
1
A
A
P
start condition
R/W acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
WRITE TO
PORT
DATA OUT
FROM PORT
DATA 1 VALID
t
pv
SW00797
Figure 7. WRITE to output port register via Write Byte Protocol
1
2
3
4
5
6
7
8
9
SCL
SDA
command byte
slave address
data to register
DATA
0
0
1
1
A2 A1 A0
S
0
A
A
A
P
0
0
0
0
0
0
1
1/0
start condition
R/W acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
SW00798
Figure 8. WRITE to I/O configuration or polarity inversion registers via Write Byte Protocol
7
2002 Mar 28
Philips Semiconductors
Product data
Octal SMBus and I2C registered interface
PCA9556
acknowledge
from slave
acknowledge
from slave
acknowledge
from slave
acknowledge
from master
slave address
slave address
data from register
1
A2 A1
1
A2 A1
A0
0
0
1
A0
0
0
1
1
COMMAND BYTE
DATA
S
0
A
A
S
A
A
first byte
R/W
R/W
at this moment master-transmitter
becomes master-receiver and
slave-receiver becomes
slave-transmitter
no acknowledge
from master
data from register
NA
P
DATA
last byte
su01052
Figure 9. READ from register via Read byte protocol
slave address
data from port
DATA 1
data from port
SDA
DATA 4
0
0
1
1
A2 A1 A0
S
1
A
A
NA
P
start condition
R/W acknowledge
from slave
acknowledge
from master
no acknowledge
from master
stop
condition
READ FROM
PORT
DATA INTO
PORT
DATA 2
DATA 3
DATA 4
t
ph
t
ps
SW00799
NOTES:
1. This figure assumes the command byte has previously been programmed with 00h.
2. Transfer of data can be stopped at any moment by a stop condition. When this occurs, data present at the last acknowledge phase is valid
(output mode). Input data is lost.
Figure 10. READ input port register via Receive byte protocol
8
2002 Mar 28
Philips Semiconductors
Product data
Octal SMBus and I2C registered interface
PCA9556
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX
+6
+ 0.5
UNIT
V
V
DD
Supply voltage
Input voltage
–0.5
V
I
V
– 0.5
V
V
V
SS
DD
I
I
DC input current
—
± 20
+ 0.5
DD
mA
V
V
I/O
DC voltage on an I/O as an input other than I/O0
DC voltage on I/O0 as an input
V
V
– 0.5
SS
SS
V
I/O0
– 0.5
4.6
+400
–20
± 20
—
V
—
µA
mA
mA
mW
mW
°C
I
DC input current on I/O0
I/O0
—
—
I
I/O
DC output current on an I/O
Total power dissipation
P
tot
—
P
O
Power dissipation per output
Storage temperature range
Operating ambient temperature
—
—
T
stg
–65
–40
+150
+85
T
amb
°C
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take
precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC24 under ”Handling MOS devices”.
9
2002 Mar 28
Philips Semiconductors
Product data
Octal SMBus and I2C registered interface
PCA9556
DC CHARACTERISTICS
V
= 3.0 to 5.5 V; V = 0 V; T
= –40 to +85 °C; unless otherwise specified.
DD
SS
amb
V
= 3.3 V
V
= 5 V
UNIT
DD
DD
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP MAX MIN
TYP MAX
Supplies
V
Supply voltage
Supply current
3.0
—
—
3.6
4.5
—
—
5.5
V
DD
Operating mode; no load;
V = V or V
;
I
300
425
1100 1500
µA
I
DD
SS
DD
f
= 100 kHz
SCL
Standby mode; no load;
V = V or V
;
I
Standby current
—
—
25
50
–
–
65
100
2.4
µA
I
DD
SS
stb
f
= 0 kHz
SCL
V
DD
= 3.3 V; no load;
V
POR
Power-on reset voltage
1.3
2.4
1.3
V
V = V or V
note 1
I
DD
SS;
Input SCL; input/output SDA
V
LOW level input voltage
HIGH level input voltage
LOW level output current
Leakage current
–0.5
2.1
3
—
—
—
—
—
0.8
5.5
—
–0.5
2.1
3
—
—
—
—
—
0.8
5.5
—
V
V
IL
IH
V
I
OL
V
= 0.4 V
mA
µA
pF
OL
I
L
V = V = V
I
–1
—
+1
10
–1
—
+1
10
DD
SS
SS
C
Input capacitance
V = V
I
I
I/Os
V
LOW level input voltage
HIGH level input voltage
–0.5
2.0
—
—
0.8
–0.5
2.0
—
—
0.8
V
V
IL
V
DD
V
DD
+ 0.5
V
IH
+ 0.5
Maximum allowed input current
through protection diode (I/O1 – I/O7)
I
V ≥ V or V ≤ V
—
8
—
10
—
±400
—
8
—
10
—
±400
µA
mA
mA
IHL(max)
I
DD
I
SS
V
OL
= 0.55 V; V = 3.3 V;
DD
I
OL
LOW level output current
—
—
—
—
note 2
V
OH
= 2.4 V; V = 3.3 V;
DD
HIGH level output current except I/O0
4
4
note 3
I
OH
V
DD
V
DD
V
DD
= 3.6 V; V = 4.6 V
—
—
–1
—
—
—
—
—
—
—
1
1
—
—
–1
—
—
—
—
—
—
—
1
1
OH
HIGH level output current on I/O0
µA
= 0 V; V = 3.3 V
OH
I
L
Input leakage current
Input capacitance
Output capacitance
= 3.6 V; V = 0 or V
DD
1
1
µA
pF
pF
I
C
10
10
10
10
I
C
O
Select Inputs A0, A1, A2, and RESET
V
LOW level input voltage
HIGH level input voltage
Input leakage current
–0.5
2.0
–1
—
—
—
0.8
–0.5
2.0
–1
—
—
—
0.8
V
V
IL
IH
LI
V
DD
V
DD
+ 0.5
V
+ 0.5
I
1
1
µA
NOTES:
1. The power-on reset circuit resets the SMBus logic with V < V
and sets all I/Os to their default values.
POR
DD
2. The maximum total sink current must be limited to 54 mA at +85 °C, and 80 mA at +70 °C.
3. The maximum total source current must be limited to 54 mA at +85 °C, and 80 mA at +70 °C.
10
2002 Mar 28
Philips Semiconductors
Product data
Octal SMBus and I2C registered interface
PCA9556
AC SPECIFICATIONS
LIMITS
SYMBOL
PARAMETER
UNITS
MIN
10
MAX
f
SMB operating frequency
100
—
KHz
µs
µs
µs
ns
ns
µs
µs
ns
ns
SBM
t
Bus free time between stop and start conditions
Hold time after (repeated) start condition
Repeated start condition setup time
Data hold time
4.7
4.0
4.7
300
250
4.7
4.0
—
BUF
t
—
HO:STA
t
—
SU:STA
HO:DAT
t
—
t
Data setup time
—
SU:DAT
t
Clock LOW period
—
LOW
t
Clock HIGH period
—
HIGH
t
F
Clock/Data fall time
300
1000
t
R
Clock/Data rise time
—
Port Timing
t
t
Output data valid
—
0
4
µs
µs
µs
PV
PS
PH
Input data setup time
Input data hold time
—
—
t
4
Reset
t
W
Reset pulse width
2
—
ns
11
2002 Mar 28
Philips Semiconductors
Product data
Octal SMBus and I2C registered interface
PCA9556
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
12
2002 Mar 28
Philips Semiconductors
Product data
Octal SMBus and I2C registered interface
PCA9556
2
2
Purchase of Philips I C components conveys a license under the Philips’ I C patent
2
to use the components in the I C system provided the system conforms to the
I C specifications defined by Philips. This specification can be ordered using the
2
code 9398 393 40011.
Data sheet status
Product
status
Definitions
[1]
Data sheet status
[2]
Objective data
Development
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
Preliminary data
Qualification
Production
This data sheet contains data from the preliminary specification. Supplementary data will be
published at a later date. Philips Semiconductors reserves the right to change the specification
without notice, in order to improve the design and supply the best possible product.
Product data
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply.
Changes will be communicated according to the Customer Product/Process Change Notification
(CPCN) procedure SNW-SQ-650A.
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Koninklijke Philips Electronics N.V. 2002
Contact information
All rights reserved. Printed in U.S.A.
For additional information please visit
http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
Date of release: 03-02
9397 750 09609
For sales offices addresses send e-mail to:
sales.addresses@www.semiconductors.philips.com.
Document order number:
Philips
Semiconductors
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SI9137LG
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SI9122E
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