PCA9952TW/Q900_技术文档

PCA9952; PCA9955

16-channel Fm+ I²C-bus 57 mA constant current LED driver

Rev. 7 — 27 May 2013

Product data sheet

1. General description

The PCA9952 and PCA9955 are I²C-bus controlled 16-channel constant current LED

driver optimized for dimming and blinking 57 mA Red/Green/Blue/Amber (RGBA) LEDs in

amusement products. Each LEDn output has its own 8-bit resolution (256 steps) fixed

frequency individual PWM controller that operates at 31.25 kHz with a duty cycle that is

adjustable from 0 % to 99.6 % to allow the LED to be set to a specific brightness value. An

additional 8-bit resolution (256 steps) group PWM controller has both a fixed frequency of

122 Hz and an adjustable frequency between 15 Hz to once every 16.8 seconds with a

duty cycle that is adjustable from 0 % to 99.6 % that is used to either dim or blink all LEDs

with the same value.

Each LEDn output can be off, on (no PWM control), set at its individual PWM controller

value or at both individual and group PWM controller values. The PCA9952 and PCA9955

operate with a supply voltage range of 3 V to 5.5 V and the constant current sink LEDn

outputs allow up to 40 V for the LED supply. The output peak current is adjustable with an

8-bit linear DAC from 225 A to 57 mA.

These devices have built-in open, short load and overtemperature detection circuitry. The

error information from the corresponding register can be read via the I²C-bus. Additionally,

a thermal shutdown feature protects the device when internal junction temperature

exceeds the limit allowed for the process.

The PCA9952 and PCA9955 devices have Fast-mode Plus (Fm+) I²C-bus interface. Fm+

devices offer higher frequency (up to 1 MHz) or more densely populated bus operation

(up to 4000 pF).

The PCA9952 is identical to PCA9955 except for the following differences:

• The PCA9952 has only three hardware address pins compared to four on PCA9955.

• The PCA9952 has an output enable pin (OE) and the PCA9955 does not.

The active LOW output enable input pin (OE), available only on PCA9952, blinks all the

LEDn outputs and can be used to externally PWM the outputs, which is useful when

multiple devices need to be dimmed or blinked together without using software control.

Software programmable LED Group and three Sub Call I²C-bus addresses allow all or

defined groups of PCA9952/55 devices to respond to a common I²C-bus address,

allowing for example, all red LEDs to be turned on or off at the same time or marquee

chasing effect, thus minimizing I²C-bus commands. On power-up, PCA9952/55 will have

a unique Sub Call address to identify it as a 16-channel LED driver. This allows mixing of

devices with different channel widths. Four hardware address pins on PCA9955 allow up

to 16 devices on the same bus. In the case of PCA9952, three hardware address pins

allow up to 8 devices on the same bus.

PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

The Software Reset (SWRST) function allows the master to perform a reset of the

PCA9952/55 through the I²C-bus, identical to the Power-On Reset (POR) that initializes

the registers to their default state causing the output current switches to be OFF (LED off).

This allows an easy and quick way to reconfigure all device registers to the same

condition.

2. Features and benefits

 16 LED drivers. Each output programmable at:

 Off

 On

 Programmable LED brightness

 Programmable group dimming/blinking mixed with individual LED brightness

 Programmable LEDn output enable delay to reduce EMI and surge currents

 16 constant current output channels can sink up to 57 mA, tolerate up to 40 V when

OFF

 Output current adjusted through an external resistor

 Output current accuracy

 6 % between output channels

 8 % between PCA9952/55 devices

 Open/short load/overtemperature detection mode to detect individual LED errors

 1 MHz Fast-mode Plus compatible I²C-bus interface with 30 mA high drive capability

on SDA output for driving high capacitive buses

 256-step (8-bit) linear programmable brightness per LEDn output varying from fully off

(default) to maximum brightness using a 31.25 kHz PWM signal

 256-step group brightness control allows general dimming (using a 122 Hz PWM

signal) from fully off to maximum brightness (default)

 256-step group blinking with frequency programmable from 15 Hz to 16.8 s and duty

cycle from 0 % to 99.6 %

 Output state change programmable on the Acknowledge or the STOP Command to

update outputs byte-by-byte or all at the same time (default to ‘Change on STOP’).

 Active LOW Output Enable (OE) input pin (only on PCA9952) allows for hardware

blinking and dimming of the LEDs

 Four hardware address pins allow 16 PCA9955 devices to be connected to the same

I²C-bus and to be individually programmed

 Four software programmable I²C-bus addresses (one LED Group Call address and

three LED Sub Call addresses) allow groups of devices to be addressed at the same

time in any combination (for example, one register used for ‘All Call’ so that all the

PCA9952/55s on the I²C-bus can be addressed at the same time and the second

register used for three different addresses so that ¹⁄₃of all devices on the bus can be

addressed at the same time in a group). Software enable and disable for each

programmable I²C-bus address.

 Unique power-up default Sub Call address allows mixing of devices with different

channel widths

 Software Reset feature (SWRST Call) allows the device to be reset through the

I²C-bus

 8 MHz internal oscillator requires no external components

PCA9952_PCA9955

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7 — 27 May 2013

2 of 48

PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

 Internal power-on reset

 Noise filter on SDA/SCL inputs

 No glitch on LED on power-up

 Low standby current

 Operating power supply voltage (V_DD) range of 3 V to 5.5 V

 5.5 V tolerant inputs on non-LED pins

 Operating temperature:

 20 C to +85 C (PCA9952TW, PCA9955TW)

 40 C to +85 C (PCA9952TW/Q900, PCA9955TW/Q900)

 ESD protection exceeds 2000 V HBM per JESD22-A114, 750 V CDM (PCA9952TW,

PCA9955TW), and 500 V CDM (PCA9952TW/Q900, PCA9955TW/Q900) per

JESD22-C101

 Latch-up testing is done to JEDEC Standard JESD78 Class II, Level B

 Packages offered: HTSSOP28

3. Applications

 Amusement products

 RGB or RGBA LED drivers

 LED status information

 LED displays

 LCD backlights

 Keypad backlights for cellular phones or handheld devices

 Automotive lighting (PCA9952TW/Q900, PCA9955TW/Q900)

PCA9952_PCA9955

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7 — 27 May 2013

3 of 48

PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

4. Ordering information

Table 1.

Ordering information

Type number

Topside

marking

Package

Name

Description

Version

PCA9952TW

PCA9952 HTSSOP28 plastic thermal enhanced thin shrink small outline package; SOT1172-2

28 leads; body width 4.4 mm; lead pitch 0.65 mm;

exposed die pad

PCA9952TW/Q900^[1]PCA9952 HTSSOP28 plastic thermal enhanced thin shrink small outline package; SOT1172-2

28 leads; body width 4.4 mm; lead pitch 0.65 mm;

exposed die pad

PCA9955TW

PCA9955 HTSSOP28 plastic thermal enhanced thin shrink small outline package; SOT1172-2

28 leads; body width 4.4 mm; lead pitch 0.65 mm;

exposed die pad

PCA9955TW/Q900^[1]PCA9955 HTSSOP28 plastic thermal enhanced thin shrink small outline package; SOT1172-2

28 leads; body width 4.4 mm; lead pitch 0.65 mm;

exposed die pad

[1] PCA9952TW/Q900 and PCA9955TW/Q900 are AEC-Q100 compliant.

4.1 Ordering options

Table 2.

Ordering options

Type number

Orderable

Package

Packing method

Minimum Temperature

part number

order

quantity

PCA9952TW

PCA9952TW,118

HTSSOP28 Reel 13” Q1/T1

*standard mark SMD

2500

T_amb= 20 C to +85 C

PCA9952TW/Q900 PCA9952TW/Q900,118 HTSSOP28 Reel 13” Q1/T1

*standard mark SMD

T_amb= 40 C to +85 C

T_amb= 20 C to +85 C

PCA9955TW

PCA9955TW,118

HTSSOP28 Reel 13” Q1/T1

*standard mark SMD

PCA9955TW/Q900 PCA9955TW/Q900,118 HTSSOP28 Reel 13” Q1/T1

*standard mark SMD

T

_amb= 40 C to +85 C

PCA9952_PCA9955

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Product data sheet

Rev. 7 — 27 May 2013

4 of 48

PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

5. Block diagram

(1)

A0 A1 A2 A3/OE

REXT

LED0

LED1

LED14

LED15

I/O

PCA9952/55

REGULATOR

DAC0

SCL

INPUT FILTER

DAC1

SDA

individual LED

current setting

8-bit DACs

2

I C-BUS

DAC

14

CONTROL

DAC

15

POWER-ON

RESET

V

DD

OUTPUT DRIVER, DELAY CONTROL

AND ERROR DETECTION

200 kΩ

V

SS

INPUT

FILTER

RESET

LED STATE

SELECT

REGISTER

PWM

repetion rate 31.25 kHz

REGISTER X

BRIGHTNESS

CONTROL

MUX/

CONTROL

÷ 256

31.25 kHz

GRPFREQ

REGISTER

GRPPWM

REGISTER

(DUTY CYCLE

CONTROL)

8 MHz

OSCILLATOR

DIM CLOCK

'0' – permanently OFF

'1' – permanently ON

002aae909

Dim repetition rate = 122 Hz.

Blink repetition rate = 15 Hz to every 16.8 seconds.

(1) On PCA9955 this pin is address pin A3. On PCA9952 this pin is OE.

Fig 1. Block diagram of PCA9952/55

PCA9952_PCA9955

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Product data sheet

Rev. 7 — 27 May 2013

5 of 48

PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

6. Pinning information

6.1 Pinning

PCA9952TW

PCA9955TW

PCA9952TW/Q900

PCA9955TW/Q900

REXT

A0

1

2

28

V

1

2

28

27

26

25

24

23

22

21

20

19

18

17

16

15

REXT

A0

V

DD

27 SDA

26 SCL

SDA

A1

3

A1

SCL

A2

4

25 RESET

4

A2

RESET

OE

5

24

V

5

A3

V

SS

LED0

LED1

LED2

LED3

6

23 LED15

22 LED14

21 LED13

20 LED12

6

LED0

LED1

LED2

LED3

LED15

LED14

LED13

LED12

7

8

9

V

10

19

V

10

11

12

13

14

V

SS

LED4 11

LED5 12

LED6 13

LED7 14

18 LED11

17 LED10

16 LED9

15 LED8

LED4

LED5

LED6

LED7

LED11

LED10

LED9

(1)

LED8

002aae911

002aae912

a. PCA9952TW; PCA9952TW/Q900

b. PCA9955TW; PCA9955TW/Q900

(1) Thermal pad; connected to V_SS

.

Fig 2. Pin configuration for HTSSOP28

PCA9952_PCA9955

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Product data sheet

Rev. 7 — 27 May 2013

6 of 48

PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

6.2 Pin description

Table 3.

Symbol

REXT

A0

PCA9952 pin description

1

Type

I

Description

current set resistor input; resistor to ground

address input 0^[1]

address input 1^[1]

address input 2^[1]

active LOW output enable

LED driver 0

2

I

A1

3

I

A2

4

I

OE

5

I

LED0

LED1

LED2

LED3

LED4

LED5

LED6

LED7

LED8

LED9

LED10

LED11

LED12

LED13

LED14

LED15

RESET

SCL

6

O

I

7

LED driver 1

8

LED driver 2

9

LED driver 3

11

12

13

14

15

16

17

18

20

21

22

23

25

26

27

LED driver 4

LED driver 5

LED driver 6

LED driver 7

LED driver 8

LED driver 9

LED driver 10

LED driver 11

LED driver 12

LED driver 13

LED driver 14

LED driver 15

active LOW reset input

serial clock line

serial data line

supply ground

I

SDA

I/O

V_SS

10, 19, 24^[2]ground

V_DD

28 power supply

supply voltage

[1] In order to obtain the best system level ESD performance, a standard pull-up resistor (10 k typical) is

required for any address pin connecting to V_DD. For additional information on system level ESD

performance, please refer to application notes AN10897 and AN11131.

[2] HTSSOP28 package supply ground is connected to both V_SSpins and exposed center pad. V_SSpins must

be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board

level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad

on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the

PCB in the thermal pad region.

PCA9952_PCA9955

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Product data sheet

Rev. 7 — 27 May 2013

7 of 48

PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

Table 4.

PCA9955 pin description

Symbol

REXT

A0

1

Type

I

Description

current set resistor input; resistor to ground

address input 0^[1]

address input 1^[1]

address input 2^[1]

address input 3^[1]

LED driver 0

2

I

A1

3

I

A2

4

I

A3

5

I

LED0

LED1

LED2

LED3

LED4

LED5

LED6

LED7

LED8

LED9

LED10

LED11

LED12

LED13

LED14

LED15

RESET

SCL

6

O

I

7

LED driver 1

8

LED driver 2

9

LED driver 3

11

12

13

14

15

16

17

18

20

21

22

23

25

26

27

LED driver 4

LED driver 5

LED driver 6

LED driver 7

LED driver 8

LED driver 9

LED driver 10

LED driver 11

LED driver 12

LED driver 13

LED driver 14

LED driver 15

active LOW reset input

serial clock line

serial data line

supply ground

supply voltage

I

SDA

I/O

V_SS

10, 19, 24^[2]ground

V_DD

28 power supply

[1] In order to obtain the best system level ESD performance, a standard pull-up resistor (10 k typical) is

required for any address pin connecting to V_DD. For additional information on system level ESD

performance, please refer to application notes AN10897 and AN11131.

[2] HTSSOP28 package supply ground is connected to both V_SSpins and exposed center pad. V_SSpins must

be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board

level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad

on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the

PCB in the thermal pad region.

PCA9952_PCA9955

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Product data sheet

Rev. 7 — 27 May 2013

8 of 48

PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

7. Functional description

Refer to Figure 1 “Block diagram of PCA9952/55”.

7.1 Device addresses

Following a START condition, the bus master must output the address of the slave it is

accessing.

For PCA9955 there are a maximum of 16 possible programmable addresses using the

4 hardware address pins.

For PCA9952 there are a maximum of 8 possible programmable addresses using the

3 hardware address pins.

7.1.1 Regular I²C-bus slave address

The I²C-bus slave address of the PCA9955 is shown in Figure 3. To conserve power, no

internal pull-up resistors are incorporated on the hardware selectable address pins and

they must be pulled HIGH or LOW externally. Figure 4 shows the I²C-bus slave address of

the PCA9952.

Remark: Reserved I²C-bus addresses must be used with caution since they can interfere

with:

• ‘reserved for future use’ I²C-bus addresses (0000 011, 1111 1XX)

• slave devices that use the 10-bit addressing scheme (1111 0XX)

• slave devices that are designed to respond to the General Call address (0000 000)

• High-speed mode (Hs-mode) master code (0000 1XX)

slave address

A3 A2 A1 A0 R/W

slave address

1

0

1

0

A2 A1 A0 R/W

fixed

hardware

selectable

fixed

hardware

selectable

002aae915

002aae914

Fig 3. PCA9955 slave address

Fig 4. PCA9952 slave address

The last bit of the address byte defines the operation to be performed. When set to logic 1

a read is selected, while a logic 0 selects a write operation.

7.1.2 LED All Call I²C-bus address

• Default power-up value (ALLCALLADR register): E0h or 1110 000X

• Programmable through I²C-bus (volatile programming)

• At power-up, LED All Call I²C-bus address is enabled. PCA9952/55 sends an ACK

when E0h (R/W = 0) or E1h (R/W = 1) is sent by the master.

See Section 7.3.10 “ALLCALLADR, LED All Call I²C-bus address” for more detail.

PCA9952_PCA9955

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Product data sheet

Rev. 7 — 27 May 2013

9 of 48

PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

Remark: The default LED All Call I²C-bus address (E0h or 1110 000X) must not be used

as a regular I²C-bus slave address since this address is enabled at power-up. All of the

PCA9952/55s on the I²C-bus will acknowledge the address if sent by the I²C-bus master.

7.1.3 LED bit Sub Call I²C-bus addresses

• 3 different I²C-bus addresses can be used

• Default power-up values:

– SUBADR1 register: ECh or 1110 110X

– SUBADR2 register: ECh or 1110 110X

– SUBADR3 register: ECh or 1110 110X

• Programmable through I²C-bus (volatile programming)

• At power-up, SUBADR1 is enabled while SUBADR2 and SUBADR3 I²C-bus

addresses are disabled.

Remark: At power-up SUBADR1 identifies this device as a 16-channel driver.

See Section 7.3.9 “LED bit Sub Call I²C-bus addresses for PCA9952/55” for more detail.

Remark: The default LED Sub Call I²C-bus addresses may be used as regular I²C-bus

slave addresses as long as they are disabled.

7.2 Control register

Following the successful acknowledgement of the slave address, LED All Call address or

LED Sub Call address, the bus master will send a byte to the PCA9952/55, which will be

stored in the Control register.

The lowest 7 bits are used as a pointer to determine which register will be accessed

(D[6:0]). The highest bit is used as Auto-Increment Flag (AIF). The AIF is active by default

at power-up.

This bit along with the MODE1 register bit 5 and bit 6 provide the Auto-Increment feature.

register address

AIF D6 D5 D4 D3 D2 D1 D0

Auto-Increment Flag

002aad850

reset state = 80h

Remark: The Control register does not apply to the Software Reset I²C-bus address.

Fig 5. Control register

When the Auto-Increment Flag is set (AIF = logic 1), the seven low-order bits of the

Control register are automatically incremented after a read or write. This allows the user to

program the registers sequentially. Four different types of Auto-Increment are possible,

depending on AI1 and AI0 values of MODE1 register.

PCA9952_PCA9955

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Product data sheet

Rev. 7 — 27 May 2013

10 of 48

PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

Table 5.

Auto-Increment options

AIF AI1^[1]AI0^[1]Function

0

1

0

no Auto-Increment

Auto-Increment for registers (00h to 41h). D[6:0] roll over to 00h after the last

register 41h is accessed.

1

0

1

0

1

Auto-Increment for individual brightness registers only (0Ah to 19h). D[6:0] roll

over to 0Ah after the last register (19h) is accessed.

Auto-Increment for MODE1 to IREF15 control registers (00h to 31h).

D[6:0] roll over to 00h after the last register (31h) is accessed.

Auto-Increment for global control registers and individual brightness registers

(08h to 19h). D[6:0] roll over to 08h after the last register (19h) is accessed.

[1] AI1 and AI0 come from MODE1 register.

Remark: Other combinations not shown in Table 5 (AIF + AI[1:0] = 001b, 010b and 011b)

are reserved and must not be used for proper device operation.

AIF + AI[1:0] = 000b is used when the same register must be accessed several times

during a single I²C-bus communication, for example, changes the brightness of a single

LED. Data is overwritten each time the register is accessed during a write operation.

AIF + AI[1:0] = 100b is used when all the registers must be sequentially accessed, for

example, power-up programming.

AIF + AI[1:0] = 101b is used when the 16 LED drivers must be individually programmed

with different values during the same I²C-bus communication, for example, changing color

setting to another color setting.

AIF + AI[1:0] = 110b is used when MODE1 to IREF15 registers must be programmed with

different settings during the same I²C-bus communication.

AIF + AI[1:0] = 111b is used when the 16 LED drivers must be individually programmed

with different values in addition to global programming.

Only the 7 least significant bits D[6:0] are affected by the AIF, AI1 and AI0 bits.

When the Control register is written, the register entry point determined by D[6:0] is the

first register that will be addressed (read or write operation), and can be anywhere

between 00h and 41h (as defined in Table 6). When AIF = 1, the Auto-Increment Flag is

set and the rollover value at which the register increment stops and goes to the next one

is determined by AIF, AI1 and AI0. See Table 5 for rollover values. For example, if MODE1

register bit AI1 = 0 and AI0 = 1 and if the Control register = 1001 0000, then the register

addressing sequence will be (in hexadecimal):

10  11  …  19  0A  0B  …  19  0A  0B  … as long as the master

keeps sending or reading data.

If MODE1 register bit AI1 = 0 and AI0 = 0 and if the Control register = 1010 0010, then the

register addressing sequence will be (in hexadecimal):

22  23  …  41  00  01  …  19  0A  0B  … as long as the master

keeps sending or reading data.

PCA9952_PCA9955

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Product data sheet

Rev. 7 — 27 May 2013

11 of 48

PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

If MODE1 register bit AI1 = 0 and AI0 = 1 and if the Control register = 1000 0101, then the

register addressing sequence will be (in hexadecimal):

05  06  …  19  0A  0B  …  19  0A  0B  … as long as the master

keeps sending or reading data.

Remark: Writing to registers marked ‘not used’ will return NACK.

7.3 Register definitions

Table 6.

Register summary^[1]

D6 D5 D4 D3 D2 D1 D0 Name

Register

number

Type

Function

(hexadecimal)

00h

0

-

0

-

0

1

-

0

1

0

1

-

0

1

0

1

0

1

0

-

0

1

0

1

0

1

0

1

0

1

0

1

0

-

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

-

MODE1

MODE2

LEDOUT0

LEDOUT1

LEDOUT2

LEDOUT3

-

read/write

Mode register 1

01h

Mode register 2

02h

LEDn output state 0

03h

LEDn output state 1

04h

LEDn output state 2

05h

LEDn output state 3

not used^[1]

06h

07h

-

08h

GRPPWM

GRPFREQ

PWM0

PWM1

PWM2

PWM3

PWM4

PWM5

PWM6

PWM7

PWM8

PWM9

PWM10

PWM11

PWM12

PWM13

PWM14

PWM15

-

group duty cycle control

group frequency

09h

0Ah

0Bh

0Ch

0Dh

0Eh

0Fh

brightness control LED0

brightness control LED1

brightness control LED2

brightness control LED3

brightness control LED4

brightness control LED5

brightness control LED6

brightness control LED7

brightness control LED8

brightness control LED9

brightness control LED10

brightness control LED11

brightness control LED12

brightness control LED13

brightness control LED14

brightness control LED15

not used^[1]

10h

11h

12h

13h

14h

15h

16h

17h

18h

19h

1Ah to 21h

22h

0

1

0

1

0

1

0

1

0

1

0

IREF0

output gain control register 0

output gain control register 1

output gain control register 2

output gain control register 3

output gain control register 4

23h

IREF1

24h

IREF2

25h

IREF3

26h

IREF4

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

Table 6.

Register summary^[1]…continued

D6 D5 D4 D3 D2 D1 D0 Name

Register

Type

Function

number

(hexadecimal)

27h

0

-

1

-

0

1

-

0

1

0

-

1

0

1

0

-

1

0

1

0

1

0

-

1

0

1

0

1

0

1

0

1

0

1

-

IREF5

read/write

output gain control register 5

output gain control register 6

output gain control register 7

output gain control register 8

output gain control register 9

output gain control register 10

output gain control register 11

output gain control register 12

output gain control register 13

output gain control register 14

output gain control register 15

not used^[1]

28h

IREF6

29h

IREF7

2Ah

2Bh

2Ch

2Dh

2Eh

2Fh

30h

IREF8

IREF9

IREF10

IREF11

IREF12

IREF13

IREF14

IREF15

-

31h

32h to 39h

3Ah

3Bh

3Ch

3Dh

3Eh

3Fh

40h

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

OFFSET

SUBADR1

SUBADR2

SUBADR3

Offset/delay on LEDn outputs

I²C-bus subaddress 1

I²C-bus subaddress 2

I²C-bus subaddress 3

All Call I²C-bus address

reserved^[2]

ALLCALLADR read/write

RESERVED1

RESERVED2

RESERVED3

PWMALL

read/write

read only

write only

reserved^[2]

41h

42h

brightness control for all LEDn

43h

IREFALL

output gain control for all registers

IREF0 to IREF15

44h

1

-

0

-

0

-

0

-

1

-

0

-

0

1

-

EFLAG0

EFLAG1

-

read only

output error flag 0

output error flag 1

not used^[1]

45h

46h to 7Fh

[1] Remark: Writing to registers marked ‘not used’ will return a NACK.

[2] Remark: Writing to registers marked ‘reserved’ will not change any functionality in the chip.

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16-channel Fm+ I²C-bus 57 mA constant current LED driver

7.3.1 MODE1 — Mode register 1

Table 7.

MODE1 - Mode register 1 (address 00h) bit description

Legend: * default value.

Bit

Symbol

Access

Value

0

Description

7

AIF

read only

Register Auto-Increment disabled.

1*

0*

1

Register Auto-Increment enabled.

6

5

4

3

2

1

0

AI1

R/W

Auto-Increment bit 1 = 0. Auto-increment range as defined in Table 5.

Auto-Increment bit 1 = 1. Auto-increment range as defined in Table 5.

Auto-Increment bit 0 = 0. Auto-increment range as defined in Table 5.

Auto-Increment bit 0 = 1. Auto-increment range as defined in Table 5.

Normal mode^[1].

AI0

0*

1

SLEEP

SUB1

SUB2

SUB3

ALLCALL

0*

1

Low-power mode. Oscillator off^[2].

0

PCA9952; PCA9955 does not respond to I²C-bus subaddress 1.

PCA9952; PCA9955 responds to I²C-bus subaddress 1.

PCA9952; PCA9955 does not respond to I²C-bus subaddress 2.

PCA9952; PCA9955 responds to I²C-bus subaddress 2.

PCA9952; PCA9955 does not respond to I²C-bus subaddress 3.

PCA9952; PCA9955 responds to I²C-bus subaddress 3.

PCA9952; PCA9955 does not respond to LED All Call I²C-bus address.

PCA9952; PCA9955 responds to LED All Call I²C-bus address.

1*

0*

1

0*

1

0

1*

[1] It takes 500 s max. for the oscillator to be up and running once SLEEP bit has been set to logic 0. Timings on LEDn outputs are not

guaranteed if PWMx, GRPPWM or GRPFREQ registers are accessed within the 500 s window.

[2] No blinking or dimming is possible when the oscillator is off.

7.3.2 MODE2 — Mode register 2

Table 8.

MODE2 - Mode register 2 (address 01h) bit description

Legend: * default value.

Bit

Symbol

Access

Value

0*

1

Description

7

OVERTEMP

read only

O.K.

overtemperature condition

LED fault test complete

start fault test

6

5

FAULTTEST

DMBLNK

R/W

0*

1

0*

1

group control = dimming.

group control = blinking.

reserved

4

3

-

read only

R/W

0*

1

OCH

outputs change on STOP command

outputs change on ACK

reserved

2

1

0

-

read only

1*

0*

1*

reserved

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

7.3.3 LEDOUT0 to LEDOUT3, LED driver output state

Table 9.

LEDOUT0 to LEDOUT3 - LED driver output state registers (address 02h to 05h)

bit description

Legend: * default value.

Address Register

Bit

Symbol

Access Value

Description

02h

03h

04h

05h

LEDOUT0

LEDOUT1

LEDOUT2

LEDOUT3

7:6 LDR3

5:4 LDR2

3:2 LDR1

1:0 LDR0

7:6 LDR7

5:4 LDR6

3:2 LDR5

1:0 LDR4

7:6 LDR11

5:4 LDR10

3:2 LDR9

1:0 LDR8

7:6 LDR15

5:4 LDR14

3:2 LDR13

1:0 LDR12

R/W

00*

LED3 output state control

LED2 output state control

LED1 output state control

LED0 output state control

LED7 output state control

LED6 output state control

LED5 output state control

LED4 output state control

LED11 output state control

LED10 output state control

LED9 output state control

LED8 output state control

LED15 output state control

LED14 output state control

LED13 output state control

LED12 output state control

LDRx = 00 — LED driver x is off (default power-up state).

LDRx = 01 — LED driver x is fully on (individual brightness and group dimming/blinking

not controlled).

LDRx = 10 — LED driver x individual brightness can be controlled through its PWMx

register.

LDRx = 11 — LED driver x individual brightness and group dimming/blinking can be

controlled through its PWMx register and the GRPPWM registers.

7.3.4 GRPPWM, group duty cycle control

Table 10. GRPPWM - Group brightness control register (address 08h) bit description

Legend: * default value

Address Register

08h GRPPWM

Bit

Symbol

Access Value

R/W 1111 1111*

Description

7:0 GDC[7:0]

GRPPWM register

When DMBLNK bit (MODE2 register) is programmed with logic 0, a 122 Hz fixed

frequency signal is superimposed with the 31.25 kHz individual brightness control signal.

GRPPWM is then used as a global brightness control allowing the LEDn outputs to be

dimmed with the same value. The value in GRPFREQ is then a ‘Don’t care’.

General brightness for the 16 outputs is controlled through 256 linear steps from 00h

(0 % duty cycle = LEDn output off) to FFh (99.6 % duty cycle = maximum brightness).

Applicable to LEDn outputs programmed with LDRx = 11 (LEDOUT0 to LEDOUT3

registers).

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PCA9952; PCA9955

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16-channel Fm+ I²C-bus 57 mA constant current LED driver

When DMBLNK bit is programmed with logic 1, GRPPWM and GRPFREQ registers

define a global blinking pattern, where GRPFREQ contains the blinking period (from

67 ms to 16.8 s) and GRPPWM the duty cycle (ON/OFF ratio in %).

GDC7:0

--------------------------

duty cycle =

(1)

256

7.3.5 GRPFREQ, group frequency

Table 11. GRPFREQ - Group frequency register (address 09h) bit description

Legend: * default value.

Address Register

Bit

Symbol

Access Value

Description

09h GRPFREQ 7:0 GFRQ[7:0] R/W

0000 0000* GRPFREQ register

GRPFREQ is used to program the global blinking period when DMBLNK bit (MODE2

register) is equal to 1. Value in this register is a ‘Don’t care’ when DMBLNK = 0.

Applicable to LEDn outputs programmed with LDRx = 11 (LEDOUT0 to LEDOUT3

registers).

Blinking period is controlled through 256 linear steps from 00h (67 ms, frequency 15 Hz)

to FFh (16.8 s).

GFRQ7:0 + 1

---------------------------------------

global blinking period =

s

(2)

15.26

7.3.6 PWM0 to PWM15, individual brightness control

Table 12. PWM0 to PWM15 - PWM registers 0 to 15 (address 0Ah to 19h) bit description

Legend: * default value.

Address Register Bit

Symbol

Access Value

Description

0Ah

0Bh

0Ch

0Dh

0Eh

0Fh

10h

11h

12h

13h

14h

15h

16h

17h

18h

19h

PWM0

PWM1

PWM2

PWM3

PWM4

PWM5

PWM6

PWM7

PWM8

PWM9

7:0

IDC0[7:0]

IDC1[7:0]

IDC2[7:0]

IDC3[7:0]

IDC4[7:0]

IDC5[7:0]

IDC6[7:0]

IDC7[7:0]

IDC8[7:0]

IDC9[7:0]

R/W

0000 0000* PWM0 Individual Duty Cycle

0000 0000* PWM1 Individual Duty Cycle

0000 0000* PWM2 Individual Duty Cycle

0000 0000* PWM3 Individual Duty Cycle

0000 0000* PWM4 Individual Duty Cycle

0000 0000* PWM5 Individual Duty Cycle

0000 0000* PWM6 Individual Duty Cycle

0000 0000* PWM7 Individual Duty Cycle

0000 0000* PWM8 Individual Duty Cycle

0000 0000* PWM9 Individual Duty Cycle

PWM10 7:0

PWM11 7:0

IDC10[7:0] R/W

IDC11[7:0] R/W

IDC12[7:0] R/W

IDC13[7:0] R/W

IDC14[7:0] R/W

IDC15[7:0] R/W

0000 0000* PWM10 Individual Duty Cycle

0000 0000* PWM11 Individual Duty Cycle

0000 0000* PWM12 Individual Duty Cycle

0000 0000* PWM13 Individual Duty Cycle

0000 0000* PWM14 Individual Duty Cycle

0000 0000* PWM15 Individual Duty Cycle

PWM12 7:0

PWM13 7:0

PWM14 7:0

PWM15 7:0

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Product data sheet

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

A 31.25 kHz fixed frequency signal is used for each output. Duty cycle is controlled

through 256 linear steps from 00h (0 % duty cycle = LEDn output off) to FFh

(99.6 % duty cycle = LEDn output at maximum brightness). Applicable to LEDn outputs

programmed with LDRx = 10 or 11 (LEDOUT0 to LEDOUT3 registers).

IDCx7:0

---------------------------

duty cycle =

(3)

256

Remark: The first lower end 8 steps of PWM and the last (higher end) steps of PWM will

not have effective brightness control of LEDs due to edge rate control of LEDn output

pins.

7.3.7 IREF0 to IREF15, LEDn output current value registers

These registers reflect the gain settings for output current for LED0 to LED15.

Table 13. IREF0 to IREF15 - LEDn output gain control registers (address 22h to 31h)

bit description

Legend: * default value.

Address Register Bit

Access Value

Description

22h

23h

24h

25h

26h

27h

28h

29h

2Ah

2Bh

2Ch

2Dh

2Eh

2Fh

30h

31h

IREF0

IREF1

IREF2

IREF3

IREF4

IREF5

IREF6

IREF7

IREF8

IREF9

IREF10

IREF11

IREF12

IREF13

IREF14

IREF15

7:0

R/W

00h*

LED0 output current setting

LED1 output current setting

LED2 output current setting

LED3 output current setting

LED4 output current setting

LED5 output current setting

LED6 output current setting

LED7 output current setting

LED8 output current setting

LED9 output current setting

LED10 output current setting

LED11 output current setting

LED12 output current setting

LED13 output current setting

LED14 output current setting

LED15 output current setting

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

7.3.8 OFFSET — LEDn output delay offset register

Table 14. OFFSET - LEDn output delay offset register (address 3Ah) bit description

Legend: * default value.

Address Register Bit

Access Value

Description

3Ah

OFFSET 7:4

3:0

read only 0000*

not used

R/W

1000*

LEDn output delay offset factor

The OFFSET register should not be changed while the LEDn output is on and pulsing.

The PCA9955 can be programmed to have turn-on delay between LEDn outputs. This

helps to reduce peak current for the V_DDsupply and reduces EMI.

The order in which the LEDn outputs are enabled will always be the same (channel 0 will

enable first and channel 15 will enable last).

OFFSET control register bits [3:0] determine the delay used between the turn-on times as

follows:

0000 = no delay between outputs (all on, all off at the same time)

0001 = delay of 1 clock cycle (125 ns) between successive outputs

0010 = delay of 2 clock cycles (250 ns) between successive outputs

0011 = delay of 3 clock cycles (375 ns) between successive outputs

:

1111 = delay of 15 clock cycles (1.875 s) between successive outputs

Example: If the value in the OFFSET register is 1000 the corresponding delay =

8  125 ns = 1 s delay between successive outputs.

channel 0 turns on at time 0 s

channel 1 turns on at time 1 s

channel 2 turns on at time 2 s

channel 3 turns on at time 3 s

channel 4 turns on at time 4 s

channel 5 turns on at time 5 s

channel 6 turns on at time 6 s

channel 7 turns on at time 7 s

channel 8 turns on at time 8 s

channel 9 turns on at time 9 s

channel 10 turns on at time 10 s

channel 11 turns on at time 11 s

channel 12 turns on at time 12 s

channel 13 turns on at time 13 s

channel 14 turns on at time 14 s

channel 15 turns on at time 15 s

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

7.3.9 LED bit Sub Call I²C-bus addresses for PCA9952/55

Table 15. SUBADR1 to SUBADR3 - I²C-bus subaddress registers 1 to 3 (address 3Bh to

3Dh) bit description

Legend: * default value.

Address Register

Bit

7:1

0

Symbol

A1[7:1]

A1[0]

Access Value

Description

I²C-bus subaddress 1

3Bh

3Ch

3Dh

SUBADR1

SUBADR2

SUBADR3

R/W

1110 110*

R only

R/W

0*

reserved

7:1

0

A2[7:1]

A2[0]

1110 110*

0*

I²C-bus subaddress 2

reserved

I²C-bus subaddress 3

R only

R/W

7:1

0

A3[7:1]

A3[0]

1110 110*

0*

R only

reserved

Default power-up values are ECh, ECh, ECh. At power-up, SUBADR1 is enabled while

SUBADR2 and SUBADR3 are disabled. The power-up default bit subaddress of ECh

indicates that this device is a 16-channel LED driver.

All three subaddresses are programmable. Once subaddresses have been programmed

to their right values, SUBx bits need to be set to logic 1 in order to have the device

acknowledging these addresses (MODE1 register) (0). When SUBx is set to logic 1, the

corresponding I²C-bus subaddress can be used during either an I²C-bus read or write

sequence.

7.3.10 ALLCALLADR, LED All Call I²C-bus address

Table 16. ALLCALLADR - LED All Call I²C-bus address register (address 3Eh) bit

description

Legend: * default value.

Address Register

Bit

Symbol Access Value

Description

3Eh

ALLCALLADR 7:1

AC[7:1]

R/W

1110 000*

ALLCALL I²C-bus

address register

0

AC[0]

R only

0*

reserved

The LED All Call I²C-bus address allows all the PCA9952/55s on the bus to be

programmed at the same time (ALLCALL bit in register MODE1 must be equal to logic 1

(power-up default state)). This address is programmable through the I²C-bus and can be

used during either an I²C-bus read or write sequence. The register address can also be

programmed as a Sub Call.

Only the 7 MSBs representing the All Call I²C-bus address are valid. The LSB in

ALLCALLADR register is a read-only bit (0).

If ALLCALL bit = 0, the device does not acknowledge the address programmed in register

ALLCALLADR.

7.3.11 RESERVED1

This register is reserved.

7.3.12 RESERVED2, RESERVED3

These registers are reserved.

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Product data sheet

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

7.3.13 PWMALL — brightness control for all LEDn outputs

When programmed, the value in this register will be used for PWM duty cycle for all the

LEDn outputs and will be reflected in PWM0 through PWM15 registers.

Write to any of the PWM0 to PWM15 registers will overwrite the value in corresponding

PWMn register programmed by PWMALL.

Table 17. PWMALL - brightness control for all LEDn outputs register (address 42h)

bit description

Legend: * default value.

Address Register Bit

42h PWMALL 7:0

Access

Value

Description

write only

0000 0000*

duty cycle for all LEDn outputs

7.3.14 IREFALL register: output current value for all LEDn outputs

The output current setting for all outputs is held in this register. When this register is

written to or updated, all LEDn outputs will be set to a current corresponding to this

register value.

Write to IREF0 to IREF15 will overwrite the output current settings.

Table 18. IREFALL - Output gain control for all LEDn outputs (address 43h) bit description

Legend: * default value.

Bit

Symbol

Access

Value

Description

7:0

IREFALL

write only

00h*

Current gain setting for all LEDn outputs.

7.3.15 LED driver constant current outputs

In LED display applications, PCA9952/55 provides nearly no current variations from

channel to channel and from device to device. The maximum current skew between

channels is less than 6 % and less than 8 % between devices.

7.3.15.1 Adjusting output peak current

The PCA9952/55 scales up the reference current (I_ref) set by the external resistor (R_ext) to

sink the output current (I_O) at each output port. The maximum output peak current for the

outputs can be set using R_ext. In addition, the constant value for current drive at each of

the outputs is independently programmable using command registers IREF0 to IREF15.

Alternatively, programming the IREFALL register allows all outputs to be set at one current

value determined by the value in IREFALL register.

Equation 4 and Equation 5 can be used to calculate the minimum and maximum constant

current values that can be programmed for the outputs for a chosen R_ext

.

900 mV

R_ext

1

4

------------------ --

I_O_LED_LSB =



(4)

(5)

900 mV 255









------------------ --------

I_O_LED_MAX = 255  I_O_LED_LSB =



R_ext

4

900 mV

------------------ --

 .

1

4

For a given IREFx setting, I_O_LED = IREFx 

R_ext

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Product data sheet

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

Example 1: If R_ext= 1 k, I_O_LED_LSB = 225 A, I_O_LED_MAX = 57.375 mA.

So each channel can be programmed with its individual IREFx in 256 steps and in 225 A

increments to a maximum output current of 57.375 mA independently.

Example 2: If R_ext= 2 k, I_O_LED_LSB = 112.5 A, I_O_LED_MAX = 28.687 mA.

So each channel can be programmed with its individual IREFx in 256 steps and in

112.5 A increments to a maximum output channel of 28.687 mA independently.

002aag288

80

IREFx = 255

I

O(LEDn)

(mA)

60

40

20

0

1

2

3

4

5

6

7

8

9

10

(kΩ)

R

ext

I_O(LEDn)(mA) = IREFx  (0.9 / 4) / R_ext(k)

maximum I_O(LEDn)(mA) = 255  (0.9 / 4) / R_ext(k)

Remark: Default IREFx at power-up = 0.

Fig 6. Maximum I_LEDversus R_ext

002aaf396

(1)

57.375

I

O(target)

(mA)

40

30

20

10

0

31

63

95

127

159

191

223

255

IREFx[7:0] value

(1) Assuming R_ext= 1 k.

Fig 7. I_O(target)versus IREFx value

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

7.3.16 LED error detection

The PCA9952/55 is capable of detecting an LED open or a short condition at its LEDn

output. To detect LED error status, user must initiate the LEDn output fault test. The

LEDout channel under test must be ON to conduct this test.

Setting MODE2[6] = 1 initiates the FAULTTEST. The entire test sequence takes up to

52 s. Once the test cycle begins, all outputs will be turned off (no matter where they are

in the group or individual PWM cycle) until entire test sequence is finished and next

register read or write is activated. Then each output will be enabled at its previously

defined output current level based on IREFx for 1.25 s. Only those channels with an

LEDOUT value other than 00h will be tested. If the output is selected to be fully on,

individual dim, or individual and group dim that channel will be tested; however, its

operation will be affected for one entire 32 s individual PWM cycle. At the end of the test

cycle PCA9952/55 writes out the 16 error flag bits to EFLAGn.

Before reading the error flag register EFLAGn, user should verify if the FAULTTEST is

complete by reading MODE2 register. MODE2[6] = 0 indicates that the test is complete

and the error status is ready in EFLAG0 and EFLAG1.

The error flags in registers EFLAG0 and EFLAG1 can now be read.

Table 19. EFLAG0, EFLAG1 - Error flag registers (address 44h, 45h) bit description

Legend: * default value.

Address Register Bit

Access Value

Description

44h

45h

EFLAG0

EFLAG1

7:0

R only

00h*

Error flag 0; lower 8-bit channel error status

Error flag 1; upper 8-bit channel error status

Remark: The LED open and short-circuit error status bits share the same error flag

registers (EFLAG0/EFLAG1). If both LED open and short-circuit conditions exist on

different LED outputs, the error status bits in error flag registers report only the

open-circuits first and disregards the short-circuits. If only one of the two conditions (that

is, LED open-circuits or short-circuits) exists, then the error status bits in error flag

registers will report all of those faulted channels. For all unused LED outputs, user must

program their LED outputs to the ‘OFF’ state (LDRx = 00) and IREFx value to 00h, and all

unused LED output pins must be pulled up to V_DDwith a recommended 100 k shared

resistor. The states of the unused LED channels have no effect upon the FAULTTEST and

always return 0s in EFLAG0/EFLAG1 registers.

7.3.16.1 Open-circuit detection principle

The PCA9952/55 LED open-circuit detection compares the effective current level I_Owith

the open load detection threshold current I_th(det). If I_Ois below the threshold I_th(det), the

PCA9952/55 detects an open load condition. This error status can be read out as an

error flag through the registers EFLAG0 and EFLAG1. For open-circuit error detection of

an output channel, that channel must be ON.

Table 20. Open-circuit detection

State of

Condition of

Error status code

Description

output port

output current

OFF

ON

I_O= 0 mA

0

detection not possible

open-circuit

[1]

I_O< I_th(det)

1

[1]

I_O I_th(det)

channel n error status bit 0

normal

PCA9952_PCA9955

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Product data sheet

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

[1] I_th(det)= 0.5  I_O(target)(typical). This threshold may be different for each I/O and only depends on IREFx and

R_ext

.

7.3.16.2 Short-circuit detection principle

The LED short-circuit detection compares the effective voltage level (V_O) with the

shorted-load detection threshold voltages V_th(trig). If V_Ois above the V_th(trig)threshold, the

PCA9952/55 detects a shorted-load condition. If V_Ois below the V_th(trig)threshold, no error

is detected or error bit is reset. This error status can be read out as an error flag through

the registers EFLAG0 and EFLAG1. For short-circuit error detection, a channel must be

on.

Table 21. Shorted-load detection

State of

Condition of

Error status code

Description

output port

output voltage

OFF

ON

-

0

detection not possible

short-circuit

[1]

V_O V_th(trig)

1

[1]

V_O< V_th(trig)

channel n error status bit 0

normal

[1] V_th 2.5 V.

Remark: The error status does not distinguish between an LED short condition and an

LED open condition. When an LED fault condition is noted, the LEDn outputs should be

turned off to prevent heat dissipation in the chip and the repair should be done.

7.3.17 Overtemperature protection

If the PCA9952/55 chip temperature exceeds its limit (T_th(otp), see Table 24), all output

channels will be disabled until the temperature drops below its limit minus a small

hysteresis (T_hys, see Table 24). When an overtemperature situation is encountered, the

OVERTEMP flag (bit 7) is set in the MODE2 register. Once the die temperature reduces

below the T_th(otp) T_hys, the chip will return to the same condition it was prior to the

overtemperature event and the OVERTEMP flag will be cleared.

7.4 Active LOW output enable input

Remark: Only the PCA9952 has the OE pin.

The active LOW output enable (OE) pin on PCA9952 allows to enable or disable all the

LEDn outputs at the same time.

• When a LOW level is applied to OE pin, all the LEDn outputs are enabled.

• When a HIGH level is applied to OE pin, all the LEDn outputs are high-impedance.

The OE pin can be used as a synchronization signal to switch on/off several PCA9952

devices at the same time. This requires an external clock reference that provides blinking

period and the duty cycle.

The OE pin can also be used as an external dimming control signal. The frequency of the

external clock must be high enough not to be seen by the human eye, and the duty cycle

value determines the brightness of the LEDs.

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

Remark: Do not use OE as an external blinking control signal when internal global

blinking is selected (DMBLNK = 1, MODE2 register) since it will result in an undefined

blinking pattern. Do not use OE as an external dimming control signal when internal global

dimming is selected (DMBLNK = 0, MODE2 register) since it will result in an undefined

dimming pattern.

7.5 Power-on reset

When power is applied to V_DD, an internal power-on reset holds the PCA9952/55 in a

reset condition until V_DDhas reached V_POR. At this point, the reset condition is released

and the PCA9952/55 registers and I²C-bus state machine are initialized to their default

states (all zeroes) causing all the channels to be deselected. Thereafter, V_DDmust be

pulled lower than 1 V and stay LOW for longer than 20 s. The device will reset itself, and

allow 2 ms for the device to fully wake up.

7.6 Hardware reset recovery

When a reset of PCA9952/55 is activated using an active LOW input on the RESET pin, a

reset pulse width of 2.5 s minimum is required. The maximum wait time after RESET pin

is released is 1.5 ms.

7.7 Software reset

The Software Reset Call (SWRST Call) allows all the devices in the I²C-bus to be reset to

the power-up state value through a specific formatted I²C-bus command. To be performed

correctly, it implies that the I²C-bus is functional and that there is no device hanging the

bus.

The maximum wait time after software reset is 1 ms.

The SWRST Call function is defined as the following:

1. A START command is sent by the I²C-bus master.

2. The reserved General Call address ‘0000 000’ with the R/W bit set to ‘0’ (write) is sent

by the I²C-bus master.

3. The PCA9952/55 device(s) acknowledge(s) after seeing the General Call address

‘0000 0000’ (00h) only. If the R/W bit is set to ‘1’ (read), no acknowledge is returned to

the I²C-bus master.

4. Once the General Call address has been sent and acknowledged, the master sends

1 byte with 1 specific value (SWRST data byte 1):

a. Byte 1 = 06h: the PCA9952/55 acknowledges this value only. If byte 1 is not equal

to 06h, the PCA9952/55 does not acknowledge it.

If more than 1 byte of data is sent, the PCA9952/55 does not acknowledge any more.

5. Once the correct byte (SWRST data byte 1) has been sent and correctly

acknowledged, the master sends a STOP command to end the SWRST function: the

PCA9952/55 then resets to the default value (power-up value) and is ready to be

addressed again within the specified bus free time (t_BUF).

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

General Call address

SWRST data byte 1

S

0

A

0

1

0

A

P

START condition

acknowledge

from slave

acknowledge

from slave

STOP

condition

002aac900

Fig 8. SWRST Call

The I²C-bus master must interpret a non-acknowledge from the PCA9952/55 (at any time)

as a ‘SWRST Call Abort’. The PCA9952/55 does not initiate a reset of its registers. This

happens only when the format of the SWRST Call sequence is not correct.

7.8 Individual brightness control with group dimming/blinking

A 31.25 kHz fixed frequency signal with programmable duty cycle (8 bits, 256 steps) is

used to control individually the brightness for each LED.

On top of this signal, one of the following signals can be superimposed (this signal can be

applied to the 16 LEDn outputs control registers LEDOUT0 to LEDOUT3):

• A lower 122 Hz fixed frequency signal with programmable duty cycle (8 bits,

256 steps) is used to provide a global brightness control.

• A programmable frequency signal from 15 Hz to every 16.8 seconds (8 bits,

256 steps) with programmable duty cycle (8 bits, 256 steps) is used to provide a

global blinking control.

252

254

256

1

2

3

4

5

6

7

8

9

10 11 12

251

253

255

1

2

3

4

5

6

7

8

9

10 11

Brightness Control signal (LEDn)

N × 125 ns

with N = (0 to 255)

(PWMx Register)

M × 256 × 125 ns

with M = (0 to 255)

(GRPPWM Register)

256 × 125 ns = 32 μs

(31.25 kHz)

Group Dimming signal

256 × 256 × 125 ns = 8.19 ms (122 Hz)

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

002aaf935

resulting Brightness + Group Dimming signal

Minimum pulse width for LEDn Brightness Control is 125 ns.

Minimum pulse width for Group Dimming is 32 s.

When M = 1 (GRPPWM register value), the resulting LEDn Brightness Control + Group Dimming signal will have 1 pulse of the

LED Brightness Control signal (pulse width = N  125 ns, with ‘N’ defined in PWMx register).

This resulting Brightness + Group Dimming signal above shows a resulting Control signal with M = 8.

Fig 9. Brightness + Group Dimming signals

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Product data sheet

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

8. Characteristics of the I²C-bus

The I²C-bus is for 2-way, 2-line communication between different ICs or modules. The two

lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be

connected to a positive supply via a pull-up resistor when connected to the output stages

of a device. Data transfer may be initiated only when the bus is not busy.

8.1 Bit transfer

One data bit is transferred during each clock pulse. The data on the SDA line must remain

stable during the HIGH period of the clock pulse as changes in the data line at this time

will be interpreted as control signals (see Figure 10).

SDA

SCL

data line

stable;

data valid

change

of data

allowed

mba607

Fig 10. Bit transfer

8.1.1 START and STOP conditions

Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW

transition of the data line while the clock is HIGH is defined as the START condition (S). A

LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP

condition (P) (see Figure 11).

SDA

SCL

S

P

STOP condition

START condition

mba608

Fig 11. Definition of START and STOP conditions

8.2 System configuration

A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The

device that controls the message is the ‘master’ and the devices which are controlled by

the master are the ‘slaves’ (see Figure 12).

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

SDA

SCL

SLAVE

TRANSMITTER/

RECEIVER

MASTER

TRANSMITTER/

RECEIVER

MASTER

TRANSMITTER/

RECEIVER

2

SLAVE

RECEIVER

MASTER

TRANSMITTER

I C-BUS

MULTIPLEXER

SLAVE

002aaa966

Fig 12. System configuration

8.3 Acknowledge

The number of data bytes transferred between the START and the STOP conditions from

transmitter to receiver is not limited. Each byte of eight bits is followed by one

acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter,

whereas the master generates an extra acknowledge related clock pulse.

A slave receiver which is addressed must generate an acknowledge after the reception of

each byte. Also a master must generate an acknowledge after the reception of each byte

that has been clocked out of the slave transmitter. The device that acknowledges has to

pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable

LOW during the HIGH period of the acknowledge related clock pulse; set-up time and hold

time must be taken into account.

A master receiver must signal an end of data to the transmitter by not generating an

acknowledge on the last byte that has been clocked out of the slave. In this event, the

transmitter must leave the data line HIGH to enable the master to generate a STOP

condition.

data output

by transmitter

not acknowledge

data output

by receiver

acknowledge

SCL from master

1

2

8

9

S

clock pulse for

START

condition

acknowledgement

002aaa987

Fig 13. Acknowledgement on the I²C-bus

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

9. Bus transactions

(1)

(2)

slave address

control register

data for register D[7:0]

S

1

0

A3 A2 A1 A0

0

A

X

D6 D5 D4 D3 D2 D1 D0

A

P

START condition

R/W

Auto-Increment flag

acknowledge

from slave

acknowledge

from slave

acknowledge

from slave

STOP

condition

002aae918

(1) Slave address shown for PCA9955.

(2) See Table 6 for register definition.

Fig 14. Write to a specific register

(1)

(2)

slave address

control register

MODE1 register data

MODE2 register data

(cont.)

S

1

0

A3 A2 A1 A0

0

A

1

0

A

MODE1

register selection

START condition

R/W

acknowledge

from slave

acknowledge

from slave

acknowledge

from slave

acknowledge Auto-Increment on

from slave

ALLCALLADR register data

(cont.)

A

P

acknowledge

from slave

STOP

condition

002aae919

(1) Slave address shown for PCA9955.

(2) AI1, AI0 = 00. See Table 5 for Auto-Increment options.

Remark: Care should be taken to load the appropriate value here in the AI1 and AI0 bits of the MODE1 register for

programming the part with the required Auto-Increment options.

Fig 15. Write to all registers using the Auto-Increment feature

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

ReSTART

condition

(1)

slave address

control register

slave address

data from MODE1 register

(cont.)

A

S

1

0

A3 A2 A1 A0

0

A

1

0

A

Sr

1

0

A3 A2 A1 A0

1

A

MODE1

register selection

START condition

R/W

acknowledge

from slave

R/W

acknowledge

from master

acknowledge

from slave

acknowledge

from slave

Auto-Increment on

data from

EFLAG1 register

data from

MODE1 register

data from MODE2 register

data from LEDOUT0

(cont.)

A

(cont.)

A

acknowledge

from master

acknowledge

from master

acknowledge

from master

acknowledge

from master

data from last read byte

A

P

not acknowledge STOP

from master condition

002aae921

This example assumes that the MODE1[5] = 0 and MODE1[6] = 0.

(1) Slave address shown for PCA9955.

Fig 17. Read all registers using the Auto-Increment feature

(1)

slave address

data from register

S

1

0

A3 A2 A1 A0

1

A

P

START condition

R/W acknowledge

from slave

acknowledge

from master

no acknowledge STOP

from master condition

002aae922

Remark: A read operation can be done without doing a write operation before it. In this case, the data sent out is from the

register pointed to by the control register (written to during the last write operation) with the Auto-Increment options in the

MODE1 register (written to during the last write operation).

(1) Slave address shown for PCA9955.

Fig 18. Read of registers

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PCA9952; PCA9955

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16-channel Fm+ I²C-bus 57 mA constant current LED driver

(1)(2)

2

(3)

X

slave address

control register

new LED All Call I C address

sequence (A)

S

1

0

A3 A2 A1 A0

0

A

1

0

1

0

A

1

0

1

0

1

0

1

A

P

ALLCALLADR

register selection

START condition

R/W

acknowledge

from slave

acknowledge

from slave

acknowledge

from slave

Auto-Increment on

STOP condition

(4)

the 16 LEDs are on at the acknowledge

LEDOUT0 register (LED fully ON)

2

LED All Call I C address

control register

(cont.)

A

sequence (B)

S

1

0

1

0

1

0

1

0

A

1

0

1

0

A

0

1

0

1

0

1

0

1

LEDOUT0

register selection

START condition

R/W

acknowledge

from the 4 devices

acknowledge

from the 4 devices

acknowledge

from the 4 devices

Auto-Increment on

the 16 LEDs are on

(4)

at the acknowledge

LEDOUT1 register (LED fully ON) LEDOUT2 register (LED fully ON) LEDOUT3 register (LED fully ON)

(cont.)

0

1

0

1

0

1

0

1

A

0

1

0

1

0

1

0

1

A

0

1

0

1

0

1

0

1

A

P

acknowledge

from the 4 devices

acknowledge

from the 4 devices

acknowledge

from the 4 devices

STOP condition

002aae923

(1) Slave address shown for PCA9955.

(2) In this example, several PCA9955s are used and the same sequence (A) (above) is sent to each of them.

(3) ALLCALL bit in MODE1 register is previously set to 1 for this example.

(4) OCH bit in MODE2 register is previously set to 1 for this example.

Fig 19. LED All Call I²C-bus address programming and LED All Call sequence example

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

10. Application design-in information

V

= 3.3 V or 5.0 V

DD

1.6 kΩ

1.1 kΩ

(optional)

2

I C-BUS/SMBus

MASTER

SDA

up to 40 V

V

DD

SDA

LED0

LED1

LED2

LED3

LED4

LED5

LED6

LED7

LED8

LED9

SCL

RESET

PCA9955

REXT

ISET

(1)

10 kΩ

LED10

LED11

LED12

LED13

LED14

LED15

A0

A1

A2

A3

V

SS

V

SS

C

10 μF

002aae924

(1) A standard 10 k pull-up resistor is required to obtain the best system level ESD performance.

Fig 20. Typical application (PCA9955)

10.1 Thermal considerations

Since the PCA9952/55 device integrates 16 linear current sources, thermal

considerations should be taken into account to prevent overheating, which can cause the

device to go into thermal shutdown.

Perhaps the major contributor for device’s overheating is the LED forward voltage

mismatch. This is because it can cause significant voltage differences between the LED

strings of the same type (e.g., 2 V to 3 V), which ultimately translates into higher power

dissipation in the device. The voltage drop across the LED channels of the device is given

by the difference between the supply voltage and the LED forward voltage of each LED

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Product data sheet

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

string. Reducing this to a minimum (e.g., 0.8 V) helps to keep the power dissipation down.

Therefore LEDs binning is recommended to minimize LED voltage forward variation and

reduce power dissipation in the device.

In order to ensure that the device will not go into thermal shutdown when operating under

certain application conditions, its junction temperature (T_j) should be calculated to ensure

that is below the overtemperature threshold limit (125 C). The T_jof the device depends

on the ambient temperature (T_amb), device’s total power dissipation (P_tot), and thermal

resistance.

The device junction temperature can be calculated by using the following equation:

T_j= T_amb+ R_thj-a P_tot

(6)

where:

T_j= junction temperature

T_amb= ambient temperature

R_th(j-a)= junction to ambient thermal resistance

P_tot= (device) total power dissipation

An example of this calculation is show below:

Conditions:

T_amb= 50 C

R_th(j-a)= 31 C/W (per JEDEC 51 standard for multilayer PCB)

I_LED= 50 mA / channel

I_DD(max)= 12 mA

V_DD= 5 V

LEDs per channel = 10 LEDs / channel

LED V_F(typ)= 3 V per LED (30 V total for 10 LEDs in series)

LED V_Fmismatch = 0.2 V per LED (2 V total for 10 LEDs in series)

V_reg(drv)= 0.8 V (This will be present only in the LED string with the highest LED forward

voltage.)

V_sup= LED V_F(typ)+ LED V_Fmismatch + V_reg(drv)= 30 V + 2 V + 0.8 V = 32.8 V

P_totcalculation:

P_tot= IC_power + LED drivers_power;

IC_power = (I_DD V_DD) + [(SCL_V_OL I_OL) + (SDA_V_OL I_OL)]

IC_power = (0.012 A  5 V) + [(0.4 V  0.03 A) + (0.4 V  0.03 A)] = 0.084 W

LED drivers_power = [(16  1)  (I_LED)  (LED V_Fmismatch + V_reg(drv))] +

(I_LED V_reg(drv)

)

LED drivers_power = [15  0.05 A  (2 V + 0.8 V)] + (0.05 A  0.8 V) = 2.14 W

P_tot= 0.084 W + 2.14 W = 2.224 W

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

T_jcalculation:

T_j= T_amb+ R_th(j-a) P_tot

T_j= 50 C + (31 C/W  2.224 W) = 118.94 C

This confirms that the junction temperature is below the minimum overtemperature

threshold of 125 C, which ensures the device will not go into thermal shutdown under

these conditions.

It is important to mention that the value of the thermal resistance junction-to-ambient

(R_th(j-a)) strongly depends in the PCB design. Therefore, the thermal pad of the device

should be attached to a big enough PCB copper area to ensure proper thermal dissipation

(similar to JEDEC 51 standard). Several thermal vias in the PCB thermal pad should be

used as well to increase the effectiveness of the heat dissipation (e.g., 15 thermal vias).

The thermal vias should be distributed evenly in the PCB thermal pad.

Finally it is important to point out that this calculation should be taken as a reference only

and therefore evaluations should still be performed under the application environment and

conditions to confirm proper system operation.

11. Limiting values

Table 22. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter

Conditions

Min

Max

+6.0

5.5

40

Unit

V

V_DD

V_I/O

supply voltage

0.5

voltage on an input/output pin

V_SS 0.5

V

V_drv(LED)LED driver voltage

I_O(LEDn)output current on pin LEDn

I_SS

V_SS 0.5

V

-

65

mA

A

ground supply current

latch-up current

-

1.0

90

[1]

I_lu

JESD

-

mA

W

P_tot

total power dissipation

T_amb= 25 C

T_amb= 85 C

-

3.2

1.3

+150

-

W

T_stg

storage temperature

ambient temperature

65

C

T_amb

operating

PCA9952TW, PCA9955TW

PCA9952TW/Q900, PCA9955TW/Q900

20

40

20

+85

C

+85

T_j

junction temperature

+125

[1] Class II, Level B for A1 (pin 3), A2 (pin 4). All other pins are Class II, Level A (100 mA).

12. Thermal characteristics

Table 23. Thermal characteristics

Symbol

Parameter

Conditions

Typ

Unit

C/W

[1]

R_th(j-a)

thermal resistance from junction to ambient

HTSSOP28

31

[1] Per JEDEC 51 standard for multilayer PCB.

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

13. Static characteristics

Table 24. Static characteristics

V_DD= 3 V to 5.5 V; V_SS= 0 V; T_amb= 20 C to +85 C (PCA9952TW, PCA9955TW);

T_amb= 40 C to +85 C (PCA9952TW/Q900, PCA9955TW/Q900); unless otherwise specified.

Symbol Parameter

Supply

Conditions

Min

Typ

Max

Unit

V_DD

I_DD

supply voltage

supply current

3

-

5.5

V

on pin V_DD; operating mode; no load;

f_SCL= 1 MHz

V_DD= 3.3 V

-

6.5

7.0

0.7

2

14

15

14

15

16

mA

V_DD= 5.5 V

I_DD

supply current

standby current

R_ext= open; LED[15:0] = off

R_ext= 2 k; LED[15:0] = off

R_ext= 1 k; LED[15:0] = off

R_ext= 2 k; LED[15:0] = on

R_ext= 1 k; LED[15:0] = on

3

2

3

I_stb

on pin V_DD; no load; f_SCL= 0 Hz;

MODE1[4] = 1; V_I= V_DD

V_DD= 3.3 V

-

100

2.65

1.25

600

700

2.8

-

A

V

V_DD= 5.5 V

-

V_POR

V_PDR

power-on reset voltage

no load; V_I= V_DDor V_SS

-

[1]

power-down reset voltage

0.8

V

Input SCL; input/output SDA

V_IL

V_IH

I_OL

LOW-level input voltage

HIGH-level input voltage

LOW-level output current

0.5

0.7V_DD

20

-

+0.3V_DD

V

-

5.5

-

V

V_OL= 0.4 V; V_DD= 3 V

V_OL= 0.4 V; V_DD= 5.0 V

V_I= V_DDor V_SS

-

mA

A

pF

30

-

I_L

leakage current

1

-

+1

10

C_i

input capacitance

V_I= V_SS

-

6

Current controlled outputs (LED[15:0])

I_O

output current

V_O= 0.8 V; IREFx = FFh

R_ext= 1 k

52

57.5

28.5

62

mA

R_ext= 2 k

25.5

31.5

I_O

output current variation

V_O= 0.8 V; IREFx = FFh

between bits (different ICs,

same channel); R_ext= 1 k

-

2.5

1.7

1.0

8

%

V

between bits (2 channels, same IC);

R_ext= 2 k

-

5.8

40

V_reg(drv)

driver regulation voltage

minimum regulation voltage;

0.8

IREFx = FFh; R_ext= 1 k

I_L(off)

V_th(L)

off-state leakage current

V_O= 40 V

1.0

-

+1

-

A

LOW-level threshold voltage

open LED protection; Error flag will trip

-

0.35

V

during verification test if V_O V_th(L)

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NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

Table 24. Static characteristics …continued

V_DD= 3 V to 5.5 V; V_SS= 0 V; T_amb= 20 C to +85 C (PCA9952TW, PCA9955TW);

T_amb= 40 C to +85 C (PCA9952TW/Q900, PCA9955TW/Q900); unless otherwise specified.

Symbol Parameter

V_th(H)HIGH-level threshold voltage

Conditions

Min

Typ

Max

Unit

short LED protection; Error flag will trip

-

2.5

-

V

during verification test if V_O V_th(H)

Address inputs, OE input (PCA9952 only), RESET input

V_IL

V_IH

I_LI

LOW-level input voltage

HIGH-level input voltage

input leakage current

input capacitance

0.5

0.7V_DD

1

-

+0.3V_DD

V

-

5.5

+1

5

V

-

A

pF

C_i

-

3.7

Overtemperature protection

T_th(otp)overtemperature protection

threshold temperature

rising

125

-

145

20

160

-

C

hysteresis

[1] V_DDmust be lowered to 0.8 V in order to reset part.

14. Dynamic characteristics

Table 25. Dynamic characteristics

Symbol Parameter

Conditions

Standard-mode

I²C-bus

Fast-mode

I²C-bus

Fast-mode Unit

Plus I²C-bus

Min

0

Max

100

-

Min

0

Max

400

Min

0

Max

f_SCL

t_BUF

SCL clock frequency

1000 kHz

bus free time between a STOP

and START condition

4.7

1.3

-

0.5

-

s

t_HD;STA

t_SU;STA

hold time (repeated) START

condition

4.0

4.7

-

0.6

0.26

set-up time for a repeated

START condition

t_SU;STO

t_HD;DAT

t_VD;ACK

t_VD;DAT

t_SU;DAT

t_LOW

set-up time for STOP condition

data hold time

4.0

0

-

0.6

-

0.26

0

-

s

-

3.45

-

0

0.1

ns

[1]

[2]

data valid acknowledge time

data valid time

0.3

250

4.7

4.0

-

0.9

-

0.05

50

0.45 s

0.1

data set-up time

100

-

ns

s

LOW period of the SCL clock

HIGH period of the SCL clock

-

1.3

-

0.5

0.26

-

t_HIGH

-

0.6

-

[3][4]

[5]

t_f

fall time of both SDA and SCL

signals

300

20 + 0.1C_b

300

120 ns

50 ns

t_r

rise time of both SDA and SCL

signals

-

1000 20 + 0.1C_b

300

50

-

[6]

t_SP

t_w(rst)

pulse width of spikes that must

be suppressed by the input filter

50

-

reset pulse width

2.5

-

s

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16-channel Fm+ I²C-bus 57 mA constant current LED driver

Table 25. Dynamic characteristics …continued

Symbol Parameter

Conditions

Standard-mode

I²C-bus

Fast-mode

I²C-bus

Fast-mode Unit

Plus I²C-bus

Min

Max

Min

Max

Min

Max

[7]

t_PLH

t_PHL

LOW to HIGH propagation

delay

OE to LEDn

disable

-

1.2

-

1.2

-

1.2 s

HIGH to LOW propagation

delay

OE to LEDn

enable

-

1.2

-

1.2

-

1.2 s

[1] t_VD;ACK= time for Acknowledgement signal from SCL LOW to SDA (out) LOW.

[2] _VD;DAT= minimum time for SDA data out to be valid following SCL LOW.

t

[3] A master device must internally provide a hold time of at least 300 ns for the SDA signal (refer to the V_ILof the SCL signal) in order to

bridge the undefined region of SCL’s falling edge.

[4] The maximum t_ffor the SDA and SCL bus lines is specified at 300 ns. The maximum fall time (t_f) for the SDA output stage is specified at

250 ns. This allows series protection resistors to be connected between the SDA and the SCL pins and the SDA/SCL bus lines without

exceeding the maximum specified t_f.

[5] C_b= total capacitance of one bus line in pF.

[6] Input filters on the SDA and SCL inputs suppress noise spikes less than 50 ns.

[7] Load resistor (R_L) for LEDn is 100  pull-up to V_DD

.

0.7 × V

0.3 × V

DD

SDA

DD

t

r

t

f

t

SP

t

HD;STA

BUF

t

LOW

0.7 × V

0.3 × V

DD

SCL

DD

t

SU;STO

HD;STA

SU;STA

t

SU;DAT

HD;DAT

HIGH

P

S

Sr

P

002aaa986

Fig 21. Definition of timing

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PCA9952; PCA9955

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16-channel Fm+ I²C-bus 57 mA constant current LED driver

START

condition

(S)

bit 7

MSB

(A7)

STOP

condition

(P)

bit 6

(A6)

bit 1

(D1)

bit 0

(D0)

acknowledge

(A)

protocol

t

HIGH

SU;STA

LOW

1 / f

SCL

0.7 × V

0.3 × V

DD

SCL

SDA

DD

t

f

BUF

t

r

0.7 × V

0.3 × V

DD

t

HD;DAT

VD;DAT

VD;ACK

SU;STO

HD;STA

SU;DAT

002aab285

Rise and fall times refer to V_ILand V_IH

.

Fig 22. I²C-bus timing diagram

OE

t

PLH

PHL

output data

002aag604

Fig 23. Output propagation delay

15. Test information

V

LED

open

V

SS

V

DD

R

L

50 Ω

V

O

I

PULSE

GENERATOR

DUT

C

L

R

T

50 pF

002aag289

R_L= Load resistor for LEDn. R_Lfor SDA = 165  (30 mA or less current).

C_L= Load capacitance includes jig and probe capacitance.

R_T= Termination resistance should be equal to the output impedance Z_oof the pulse generators.

Fig 24. Test circuitry for switching times

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PCA9952; PCA9955

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16-channel Fm+ I²C-bus 57 mA constant current LED driver

16. Package outline

HTSSOP28: plastic thermal enhanced thin shrink small outline package; 28 leads;

body width 4.4 mm; lead pitch 0.65 mm; exposed die pad

SOT1172-2

D

E

A

X

c

y

exposed die pad side

H

E

v

A

Z

D

h

28

15

Q

A

E

2

h

A

pin 1 index

A

1

A

3

θ

L

p

L

1

14

w

e

detail X

b

p

0

2.5

5 mm

scale

Dimensions

Unit

(1)

(2)

A

b

p

c

D

h

E

h

e

H

L

p

Q

v

w

y

Z

θ

°

1

2

3

E

6.6

6.4

6.2

0.75 0.40

0.62 0.37

0.50 0.3

0.80

0.63

0.50

8

max 1.1 0.15 0.95

mm nom

min

0.30 0.20 9.8 5.6 4.5 2.3

0.10 0.90 0.25 0.22 0.15 9.7 5.5 4.4 2.2 0.65

0.05 0.85 0.19 0.10 9.6 5.4 4.3 2.1

°

4

0

1.0

0.2 0.13 0.1

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

sot1172-2_po

References

Outline

version

European

projection

Issue date

IEC

- - -

JEDEC

JEITA

- - -

10-07-06

10-07-13

SOT1172-2

MO-153

Fig 25. Package outline SOT1172-2 (HTSSOP28)

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

17. Handling information

All input and output pins are protected against ElectroStatic Discharge (ESD) under

normal handling. When handling ensure that the appropriate precautions are taken as

described in JESD625-A or equivalent standards.

18. Soldering of SMD packages

This text provides a very brief insight into a complex technology. A more in-depth account

of soldering ICs can be found in Application Note AN10365 “Surface mount reflow

soldering description”.

18.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached to

Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both

the mechanical and the electrical connection. There is no single soldering method that is

ideal for all IC packages. Wave soldering is often preferred when through-hole and

Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not

suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high

densities that come with increased miniaturization.

18.2 Wave and reflow soldering

Wave soldering is a joining technology in which the joints are made by solder coming from

a standing wave of liquid solder. The wave soldering process is suitable for the following:

• Through-hole components

• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board

Not all SMDs can be wave soldered. Packages with solder balls, and some leadless

packages which have solder lands underneath the body, cannot be wave soldered. Also,

leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,

due to an increased probability of bridging.

The reflow soldering process involves applying solder paste to a board, followed by

component placement and exposure to a temperature profile. Leaded packages,

packages with solder balls, and leadless packages are all reflow solderable.

Key characteristics in both wave and reflow soldering are:

• Board specifications, including the board finish, solder masks and vias

• Package footprints, including solder thieves and orientation

• The moisture sensitivity level of the packages

• Package placement

• Inspection and repair

• Lead-free soldering versus SnPb soldering

18.3 Wave soldering

Key characteristics in wave soldering are:

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Product data sheet

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

• Process issues, such as application of adhesive and flux, clinching of leads, board

transport, the solder wave parameters, and the time during which components are

exposed to the wave

• Solder bath specifications, including temperature and impurities

18.4 Reflow soldering

Key characteristics in reflow soldering are:

• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to

higher minimum peak temperatures (see Figure 26) than a SnPb process, thus

reducing the process window

• Solder paste printing issues including smearing, release, and adjusting the process

window for a mix of large and small components on one board

• Reflow temperature profile; this profile includes preheat, reflow (in which the board is

heated to the peak temperature) and cooling down. It is imperative that the peak

temperature is high enough for the solder to make reliable solder joints (a solder paste

characteristic). In addition, the peak temperature must be low enough that the

packages and/or boards are not damaged. The peak temperature of the package

depends on package thickness and volume and is classified in accordance with

Table 26 and 27

Table 26. SnPb eutectic process (from J-STD-020D)

Package thickness (mm) Package reflow temperature (C)

Volume (mm³)

< 350

235

 350

220

< 2.5

 2.5

220

Table 27. Lead-free process (from J-STD-020D)

Package thickness (mm) Package reflow temperature (C)

Volume (mm³)

< 350

260

350 to 2000

> 2000

260

< 1.6

260

250

245

1.6 to 2.5

> 2.5

260

245

250

245

Moisture sensitivity precautions, as indicated on the packing, must be respected at all

times.

Studies have shown that small packages reach higher temperatures during reflow

soldering, see Figure 26.

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Product data sheet

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

maximum peak temperature

= MSL limit, damage level

temperature

minimum peak temperature

= minimum soldering temperature

peak

temperature

time

001aac844

MSL: Moisture Sensitivity Level

Fig 26. Temperature profiles for large and small components

For further information on temperature profiles, refer to Application Note AN10365

“Surface mount reflow soldering description”.

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Product data sheet

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42 of 48

PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

19. Soldering: PCB footprints

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627ꢀꢀꢁꢂꢃꢂ

+[

*[

3ꢂ

ꢇꢄꢁꢂꢆ

Q63[

636[

63[

Q63\

636\

63\

*\

$\

+\

%\ 6/\

63\ꢀWRW

63[ꢀWRW

&

'ꢂ

ꢍꢅ[ꢎ

'ꢁ

3ꢁ

6/[

*HQHULFꢀIRRWSULQWꢀSDWWHUQ

5HIHUꢀWRꢀWKHꢀSDFNDJHꢀRXWOLQHꢀGUDZLQJꢀIRUꢀDFWXDOꢀOD\RXW

VROGHUꢀODQG

VROGHUꢀODQGꢀSOXVꢀVROGHUꢀSDVWH

RFFXSLHGꢀDUHD

636[ 636\ Q63[ Q63\

ꢇꢄꢁꢂꢆ ꢇꢄꢁꢂꢆ

ꢃ

ꢈ

',0(16,216ꢀLQꢀPP

3ꢁ

3ꢂ

$\

%\

&

'ꢁ

'ꢂ

6/[

6/\

63[ꢀWRW 63\ꢀWRW 63[

ꢇꢄꢃꢇ

63\ꢀ

*[

*\

+[

+\

ꢇꢄꢉꢆ

ꢇꢄꢃꢆ

ꢃꢄꢅꢆ

ꢅꢄꢆꢇ

ꢁꢄꢈꢆ

ꢇꢄꢅꢇ

ꢇꢄꢉꢇ

ꢆꢄꢃꢆ

ꢂꢄꢅꢆ ꢀꢀꢀꢀꢆꢄꢆꢇꢀ ꢂꢄꢂꢇ

ꢇꢄꢃꢇ ꢊꢄꢆꢇ

ꢅꢄꢃꢆ

ꢁꢁꢄꢋꢇ

ꢃꢄꢃꢇ

ꢁꢁꢌꢇꢃꢌꢇꢉ

ꢁꢂꢌꢇꢆꢌꢂꢁ

,VVXHꢀGDWH

VRWꢀꢀꢁꢂꢃꢂBIU

Fig 27. PCB footprint for SOT1172-2 (HTSSOP28); reflow soldering

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Product data sheet

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PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

20. Abbreviations

Table 28. Abbreviations

Acronym

ACK

Description

Acknowledge

CDM

DAC

Charged-Device Model

Digital-to-Analog Converter

Device Under Test

DUT

EMI

ElectroMagnetic Interference

ElectroStatic Discharge

Human Body Model

ESD

HBM

I²C-bus

LED

Inter-Integrated Circuit bus

Light Emitting Diode

Least Significant Bit

LSB

MSB

Most Significant Bit

PCB

Printed-Circuit Board

Pulse Width Modulation

Red/Green/Blue

PWM

RGB

RGBA

SMBus

Red/Green/Blue/Amber

System Management Bus

21. References

[1] AN10897, “A guide to designing for ESD and EMC” — NXP Semiconductors

[2] AN11131, “How to improve system level ESD performance” —

NXP Semiconductors

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PCA9952; PCA9955

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16-channel Fm+ I²C-bus 57 mA constant current LED driver

22. Revision history

Table 29. Revision history

Document ID

Release date

Data sheet status Change Supersedes

notice

PCA9952_PCA9955 v.7

Modifications:

20130527

Product data sheet

-

PCA9952_PCA9955 v.6

PCA9952Q900_PCA9955Q900 v.1

• Section 2 “Features and benefits”:

–

bullet item for operating temperature re-written to indicate different temperature

ranges for PCA9952/55 and PCA9952/55/Q900

–

bullet item for ESD protection re-written to indicate different CDM voltages for

PCA9952/55 and PCA9952/55/Q900

• Section 3 “Applications”: added (new) seventh bullet item

• Table 1 “Ordering information”: added type numbers PCA9952TW/Q900 and

PCA9955TW/Q900

• Table 2 “Ordering options”: added type numbers PCA9952TW/Q900 and

PCA9955TW/Q900

• Figure 2 “Pin configuration for HTSSOP28”: added type numbers

PCA9952TW/Q900 and PCA9955TW/Q900

• Table 22 “Limiting values”: added ambient temperature range for type numbers

PCA9952TW/Q900 and PCA9955TW/Q900

• Table 24 “Static characteristics”:

–

appended “(PCA9952TW, PCA9955TW)” to phrase “T_amb= 20 C to +85 C”

in descriptive line below table title

–

added phrase “T_amb= 40 C to +85 C (PCA9952TW/Q900,

PCA9955TW/Q900)” to descriptive line below table title

PCA9952Q900_PCA9955Q900 v.1 20130426

Product data sheet

-

PCA9952_PCA9955 v.6

PCA9952_PCA9955 v.5

PCA9952_PCA9955 v.4

PCA9952_PCA9955 v.3

PCA9952_PCA9955 v.2

PCA9952_PCA9955 v.1

20130422

20121001

20120813

20120418

20120312

20111202

PCA9952_PCA9955 v.5

PCA9952_PCA9955 v.4

PCA9952_PCA9955 v.3

PCA9952_PCA9955 v.2

PCA9952_PCA9955 v.1

-

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16-channel Fm+ I²C-bus 57 mA constant current LED driver

23. Legal information

23.1 Data sheet status

Document status^[1][2]

Product status^[3]

Development

Definition

Objective [short] data sheet

This document contains data from the objective specification for product development.

This document contains data from the preliminary specification.

This document contains the product specification.

Preliminary [short] data sheet Qualification

Product [short] data sheet Production

[1]

[2]

[3]

Please consult the most recently issued document before initiating or completing a design.

The term ‘short data sheet’ is explained in section “Definitions”.

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

Suitability for use in automotive applications — This NXP

23.2 Definitions

Semiconductors product has been qualified for use in automotive

applications. Unless otherwise agreed in writing, the product is not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at the customer's own

risk.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and operation of their applications

and products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suitable and fit for the customer’s applications and

products planned, as well as for the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to offer functions and qualities beyond those described in the

Product data sheet.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessary

testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

23.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information. NXP Semiconductors takes no

responsibility for the content in this document if provided by an information

source outside of NXP Semiconductors.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequential damages (including - without limitation - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

PCA9952_PCA9955

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7 — 27 May 2013

46 of 48

PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

No offer to sell or license — Nothing in this document may be interpreted or

construed as an offer to sell products that is open for acceptance or the grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

23.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

I²C-bus — logo is a trademark of NXP B.V.

24. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

PCA9952_PCA9955

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7 — 27 May 2013

47 of 48

PCA9952; PCA9955

NXP Semiconductors

16-channel Fm+ I²C-bus 57 mA constant current LED driver

25. Contents

1

General description. . . . . . . . . . . . . . . . . . . . . . 1

7.8

Individual brightness control with group

dimming/blinking . . . . . . . . . . . . . . . . . . . . . . 25

2

Features and benefits . . . . . . . . . . . . . . . . . . . . 2

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Ordering information. . . . . . . . . . . . . . . . . . . . . 4

Ordering options. . . . . . . . . . . . . . . . . . . . . . . . 4

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 5

8

Characteristics of the I²C-bus . . . . . . . . . . . . 26

Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

START and STOP conditions. . . . . . . . . . . . . 26

System configuration . . . . . . . . . . . . . . . . . . . 26

Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . 27

3

8.1

8.1.1

8.2

8.3

4

4.1

5

6

6.1

6.2

Pinning information. . . . . . . . . . . . . . . . . . . . . . 6

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 7

9

Bus transactions. . . . . . . . . . . . . . . . . . . . . . . 28

Application design-in information. . . . . . . . . 32

Thermal considerations . . . . . . . . . . . . . . . . . 32

Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 34

Thermal characteristics . . . . . . . . . . . . . . . . . 34

Static characteristics . . . . . . . . . . . . . . . . . . . 35

Dynamic characteristics. . . . . . . . . . . . . . . . . 36

Test information . . . . . . . . . . . . . . . . . . . . . . . 38

Package outline. . . . . . . . . . . . . . . . . . . . . . . . 39

Handling information . . . . . . . . . . . . . . . . . . . 40

10

10.1

11

12

13

14

15

16

17

7

7.1

7.1.1

7.1.2

7.1.3

7.2

Functional description . . . . . . . . . . . . . . . . . . . 9

Device addresses. . . . . . . . . . . . . . . . . . . . . . . 9

Regular I²C-bus slave address. . . . . . . . . . . . . 9

LED All Call I²C-bus address . . . . . . . . . . . . . . 9

LED bit Sub Call I²C-bus addresses. . . . . . . . 10

Control register. . . . . . . . . . . . . . . . . . . . . . . . 10

Register definitions. . . . . . . . . . . . . . . . . . . . . 12

MODE1 — Mode register 1 . . . . . . . . . . . . . . 14

MODE2 — Mode register 2 . . . . . . . . . . . . . . 14

LEDOUT0 to LEDOUT3, LED driver output

7.3

7.3.1

7.3.2

7.3.3

18

Soldering of SMD packages. . . . . . . . . . . . . . 40

Introduction to soldering. . . . . . . . . . . . . . . . . 40

Wave and reflow soldering. . . . . . . . . . . . . . . 40

Wave soldering . . . . . . . . . . . . . . . . . . . . . . . 40

Reflow soldering . . . . . . . . . . . . . . . . . . . . . . 41

18.1

18.2

18.3

18.4

state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

GRPPWM, group duty cycle control. . . . . . . . 15

GRPFREQ, group frequency . . . . . . . . . . . . . 16

PWM0 to PWM15, individual brightness

7.3.4

7.3.5

7.3.6

control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

IREF0 to IREF15, LEDn output current value

registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

OFFSET — LEDn output delay offset register 18

LED bit Sub Call I²C-bus addresses for

PCA9952/55 . . . . . . . . . . . . . . . . . . . . . . . . . . 19

ALLCALLADR, LED All Call I²C-bus address. 19

RESERVED1 . . . . . . . . . . . . . . . . . . . . . . . . . 19

RESERVED2, RESERVED3 . . . . . . . . . . . . . 19

PWMALL — brightness control for all LEDn

19

20

21

22

Soldering: PCB footprints . . . . . . . . . . . . . . . 43

Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 44

References. . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Revision history . . . . . . . . . . . . . . . . . . . . . . . 45

7.3.7

7.3.8

7.3.9

23

Legal information . . . . . . . . . . . . . . . . . . . . . . 46

Data sheet status . . . . . . . . . . . . . . . . . . . . . . 46

Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 47

23.1

23.2

23.3

23.4

7.3.10

7.3.11

7.3.12

7.3.13

outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

IREFALL register: output current value for all

LEDn outputs . . . . . . . . . . . . . . . . . . . . . . . . . 20

LED driver constant current outputs . . . . . . . . 20

24

25

Contact information . . . . . . . . . . . . . . . . . . . . 47

Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

7.3.14

7.3.15

7.3.15.1 Adjusting output peak current. . . . . . . . . . . . . 20

7.3.16 LED error detection . . . . . . . . . . . . . . . . . . . . 22

7.3.16.1 Open-circuit detection principle . . . . . . . . . . . 22

7.3.16.2 Short-circuit detection principle. . . . . . . . . . . . 23

7.3.17

7.4

7.5

7.6

7.7

Overtemperature protection . . . . . . . . . . . . . . 23

Active LOW output enable input. . . . . . . . . . . 23

Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . 24

Hardware reset recovery . . . . . . . . . . . . . . . . 24

Software reset. . . . . . . . . . . . . . . . . . . . . . . . . 24

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 27 May 2013

Document identifier: PCA9952_PCA9955


型号：	PCA9952TW/Q900
厂家：	NXP
描述：	LED DISPLAY DRIVER 驱动接口集成电路
文件：	总48页 (文件大小：1057K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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