PCF2100CT/F1,118 [NXP]
PCF21xxC family - LCD drivers SOP 28-Pin;
| 型号： | PCF2100CT/F1,118 |
| 厂家： | 
NXP |
| 描述： | PCF21xxC family - LCD drivers SOP 28-Pin PC 驱动 CD 光电二极管 接口集成电路 |
| 文件： | 总25页 (文件大小：268K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PCF21xxC family
LCD drivers
Rev. 3 — 6 May 2015
Product data sheet
1. General description
The PCF21xxC family are single-chip, silicon gate CMOS LCD driver circuits. A 3-line bus
(C-bus) structure enables serial data transfer with microcontrollers.
2. Features and benefits
Supply voltage 2.25 V to 6.0 V
Low current consumption
Serial data input
C-bus control
One-point built-in oscillator
Stand-alone or expanded system
Power-on reset clear
LCD segments: 40 (PCF2100C), 64 (PCF2111C) and 32 (PCF2112C)
Multiplex rate: 1:2 (PCF2100C and PCF2111C) and 1:1 (PCF2112C)
Word length: 22 bits (PCF2100C) and 34 bits (PCF2111C and PCF2112C)
3. Ordering information
Table 1.
Ordering information
Type number
Package
Name
Description
Version
PCF2100CT
PCF2111CT
PCF2112CT
SO28
plastic small outline package; 28 leads; SOT136-1
body width 7.5 mm
VSO40
VSO40
plastic very small outline package;
40 leads
SOT158-1
plastic very small outline package;
40 leads
SOT158-1
PCF21xxC family
NXP Semiconductors
LCD drivers
3.1 Ordering options
Table 2.
Ordering options
Product type number Orderable part number Sales item
(12NC)
Delivery form
IC
revision
PCF2100CT/F1
PCF2111CT/1
PCF2112CT/1
PCF2100CT/F1,112
PCF2100CT/F1,118
PCF2111CT/1,112
PCF2111CT/1,118
PCF2112CT/1,112
PCF2112CT/1,118
935195690112 tube
1
935195690118 tape and reel, 13 inch
935278772112 tube
1
1
1
1
1
935278772118 tape and reel, 13 inch
935279199112 tube
935279199118 tape and reel, 13 inch
4. Marking
Table 3.
Marking codes
Type number
PCF2100CT
PCF2111CT
PCF2112CT
Marking code
PCF2100CT
PCF2111CT
PCF2112CT
5. Block diagram
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Fig 1. Block diagram; PCF2100C
PCF21XXC_FAM
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2015
2 of 25
PCF21xxC family
NXP Semiconductors
LCD drivers
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Fig 3. Block diagram; PCF2112C
PCF21XXC_FAM
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2015
3 of 25
PCF21xxC family
NXP Semiconductors
LCD drivers
6. Pinning information
6.1 Pinning
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Fig 4. Pin configuration
PCF2100C (SOT136-1)
Fig 5. Pin configuration PCF211C
(SOT158-1)
Fig 6. Pin configuration
PCF2112C (SOT158-1)
6.2 Pin description
Table 4.
Pin description
Input or input/output pins must always be at a defined level (VSS or VDD) unless otherwise specified.
Symbol
Pin
Description
PCF2100C
PCF2111C
PCF2112C
CLB
VDD
OSC
VSS
S32
S31
S30
S29
S28
S27
S26
S25
1
2
3
4
-
1
1
clock burst input (C-bus)
supply voltage
2
2
3
3
oscillator input
4
4
supply voltage ground
LCD driver output
5
5
-
6
6
-
7
7
-
8
8
-
9
9
-
10
11
12
10
11
12
-
-
PCF21XXC_FAM
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2015
4 of 25
PCF21xxC family
NXP Semiconductors
LCD drivers
Table 4.
Pin description …continued
Input or input/output pins must always be at a defined level (VSS or VDD) unless otherwise specified.
Symbol
Pin
Description
PCF2100C
PCF2111C
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
-
PCF2112C
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
-
S24
S23
S22
S21
S20
S19
S18
S17
S16
S15
S14
S13
S12
S11
S10
S9
-
LCD driver output
-
-
-
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
-
S8
S7
S6
S5
S4
S3
S2
S1
BP2
n.c.
BP1
BP
backplane driver output 2
not connected
37
-
26
-
38
-
backplane driver output 1
backplane driver output
data input line (C-bus)
data input line enable (C-bus)
38
39
40
DATA
DLEN
27
28
39
40
PCF21XXC_FAM
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2015
5 of 25
PCF21xxC family
NXP Semiconductors
LCD drivers
7. Functional description
An LCD segment or LED output is activated when the corresponding DATA bit is HIGH;
see Figure 7.
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Fig 7. C-bus data format
7.1 PCF2100C
When DATA bit 21 is HIGH, the A-latches (BP1) are loaded. With DATA bit 21 LOW, the
B-latches (BP2) are loaded. CLB pulse 23 transfers data from the shift register to the
selected latches.
7.2 PCF2111C
When DATA bit 33 is a HIGH, the A-latches (BP1) are loaded. With DATA bit 33 LOW, the
B-latches (BP2) are loaded. CLB pulse 35 transfers data from the shift register to the
selected latches.
7.3 PCF2112C
When DATA bit 33 is HIGH, the latches are loaded. CLB pulse 35 transfers data from the
shift register to the selected latches.
7.4 Bus control logic
The following tests are carried out by the bus control logic:
1. Test on leading zero
2. Test on number of DATA bits
3. Test of disturbed DLEN and DATA signals during transmission
If one of the test conditions is not fulfilled, no action follows the load condition (load pulse
with DLEN LOW) and the driver is ready to receive new data.
PCF21XXC_FAM
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2015
6 of 25
PCF21xxC family
NXP Semiconductors
LCD drivers
7.5 Timing
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Fig 9. Timing diagram for PCF2112C
PCF21XXC_FAM
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2015
7 of 25
PCF21xxC family
NXP Semiconductors
LCD drivers
7.6 Input circuitry
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VSS line is common. In systems where it is expected that VDD2 > VDD1 + 0.5 V, a resistor should be inserted to reduce the
current flowing through the input protection. Maximum input current 40 A.
Fig 10. Input circuitry
7.7 Expansion
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By connecting OSC to VSS the BP pins become inputs and generate signals synchronized to the single oscillator frequency,
thus allowing expansion of several members of the PCF21xxC family up to the BP drive capability of the master. The
PCF2112C can only function as a master for other PCF2112Cs.
Fig 11. Expansion possibility (using PCF2111C)
PCF21XXC_FAM
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2015
8 of 25
PCF21xxC family
NXP Semiconductors
LCD drivers
8. Safety notes
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling
electrostatic sensitive devices.
Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or
equivalent standards.
CAUTION
Static voltages across the liquid crystal display can build up when the LCD supply voltage
(VLCD) is on while the IC supply voltage (VDD) is off, or vice versa. This may cause unwanted
display artifacts. To avoid such artifacts, VLCD and VDD must be applied or removed together.
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDD
Parameter
Conditions
Min
Max
Unit
V
supply voltage
input voltage
0.5
+8.0
VI
on pins DLEN, CLB, DATA
and OSC
VSS 0.5
VDD + 0.5
V
VO
output voltage
on pins BP1, BP2 and
S1 to S32
VSS 0.5
VDD + 0.5
V
IDD
ISS
II
supply current
50
50
20
25
-
+50
+50
+20
+25
500
100
mA
mA
mA
mA
mW
mW
ground supply current
input current
IO
output current
[1]
Ptot
P/out
total power dissipation
power dissipation per
output
-
[2]
[3]
VESD
electrostatic discharge
voltage
HBM
-
2000
V
Ilu
latch-up current
-
100
mA
C
Tamb
Tstg
ambient temperature
storage temperature
operating device
40
65
+85
[4]
+150
C
[1] Derate by 7.7 mW/K when Tamb > 60 C.
[2] Pass level; Human Body Model (HBM), according to Ref. 7 “JESD22-A114”.
[3] Pass level; latch-up testing according to Ref. 8 “JESD78” at maximum ambient temperature (Tamb(max)).
[4] According to the store and transport requirements (see Ref. 13 “UM10569”) the devices have to be stored at a temperature of +8 C to
+45 C and a humidity of 25 % to 75 %.
PCF21XXC_FAM
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2015
9 of 25
PCF21xxC family
NXP Semiconductors
LCD drivers
10. Static characteristics
Table 6.
Static characteristics
VDD = 2.25 V to 6.0 V; VSS = 0 V; Tamb = 40 C to +80 C; RO = 1 M; CO = 680 pF; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Supply
VDD
supply voltage
supply current
2.25
-
6.0
50
V
[1]
[1]
[2]
IDD
-
-
-
20
20
1.0
A
A
V
Tamb = 25 C
30
VPOR
power-on reset voltage
1.6
Inputs CLB, DATA and DLEN
VIL
LOW-level input voltage
HIGH-level input voltage
input leakage current
input capacitance
-
-
-
-
-
0.8
-
V
VIH
2.0
V
ILI
VI = VSS or VDD
-
-
1
10
A
pF
[3]
Ci
Input OSC
Iosc
oscillator start-up current
VI = VSS
0.5
1.2
5.0
A
LCD outputs
VBP
voltage on pin BP
-
-
20
-
mV
[4]
[4]
ZO(BP)
backplane driver output
impedance
VDD = 5 V
VDD = 5 V
0.5
5.0
k
ZO(S)
segment driver output
impedance
-
1
7
k
[1] Outputs open; C-bus inactive; see Figure 13.
[2] Resets all logic, when VDD < VPOR
.
[3] Periodically sampled (not 100 % tested).
[4] Outputs measured one at a time.
PCF21XXC_FAM
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2015
10 of 25
PCF21xxC family
NXP Semiconductors
LCD drivers
11. Dynamic characteristics
Table 7.
DD = 2.25 V to 6.0 V; VSS = 0 V; Tamb = 40 C to +80 C; RO = 1 M; CO = 680 pF; all timing values are referenced to VIH
and VIL levels with an input voltage swing of VSS to VDD; unless otherwise specified.
Dynamic characteristics
V
Symbols Parameter
Conditions
Min
Typ
Max
Unit
Inputs CLB, DATA and DLEN; see Figure 12
tSUDA
tHDDA
tSUEN
tSUDI
tSULD
tBUSY
tWH
data setup time
data hold time
enable setup time
disable setup time
load pulse setup time
busy time
3
-
-
-
-
-
-
-
-
-
-
-
-
s
s
s
s
s
s
s
s
s
s
s
3
-
1
-
2
-
2.5
3
-
-
CLB HIGH time
CLB LOW time
CLB cycle time
rise time
1
-
tWL
5
-
tCLB
tr
10
-
-
10
10
tf
fall time
-
LCD timing; see Figure 12 to Figure 17
fLCD
PCF2100C, PCF2111C
PCF2112C; CO = 1.5 nF
with test loads; VDD = 5 V
with test loads; VDD = 5 V
60
30
-
75
35
20
20
100
50
Hz
Hz
s
s
tBS
transfer time
100
100
tPLCD
driver delay time
-
PCF21XXC_FAM
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2015
11 of 25
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Fig 12. C-bus timing
PCF21xxC family
NXP Semiconductors
LCD drivers
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voltage; CO = 1.5 nF (only PCF2112C)
Fig 16. Display frequency as a function of RO and CO;
Tamb = 25 C; VDD = 5 V
PCF21XXC_FAM
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2015
13 of 25
PCF21xxC family
NXP Semiconductors
LCD drivers
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PCF21XXC_FAM
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2015
14 of 25
PCF21xxC family
NXP Semiconductors
LCD drivers
12. Package outline
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Fig 19. Package outline SOT136-1 (SO28)
PCF21XXC_FAM
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2015
15 of 25
PCF21xxC family
NXP Semiconductors
LCD drivers
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Fig 20. Package outline SOT158-1 (VSO40)
PCF21XXC_FAM
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2015
16 of 25
PCF21xxC family
NXP Semiconductors
LCD drivers
13. Handling information
All input and output pins meet the requirements of the MIL-STD-883 class 2, method 3015
ElectroStatic Discharge (ESD) test. When handling Metal-Oxide Semiconductor (MOS)
devices ensure that all normal precautions are taken as described in JESD625-A,
IEC 61340-5 or equivalent standards.
14. Packing information
14.1 Tape and reel information
For tape and reel packing information, see Ref. 10 “SOT136-1_118” and Ref. 11
“SOT158-1_118”.
15. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
15.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
15.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
• Board specifications, including the board finish, solder masks and vias
• Package footprints, including solder thieves and orientation
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• The moisture sensitivity level of the packages
• Package placement
• Inspection and repair
• Lead-free soldering versus SnPb soldering
15.3 Wave soldering
Key characteristics in wave soldering are:
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
15.4 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 21) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 8 and 9
Table 8.
SnPb eutectic process (from J-STD-020D)
Package thickness (mm) Package reflow temperature (C)
Volume (mm3)
< 350
350
220
< 2.5
235
220
2.5
220
Table 9.
Lead-free process (from J-STD-020D)
Package thickness (mm) Package reflow temperature (C)
Volume (mm3)
< 350
260
350 to 2000
> 2000
260
< 1.6
260
250
245
1.6 to 2.5
> 2.5
260
245
250
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
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Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 21.
maximum peak temperature
= MSL limit, damage level
temperature
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 21. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
16. References
[1] AN10365 — Surface mount reflow soldering description
[2] AN10853 — ESD and EMC sensitivity of IC
[3] AN11267 — EMC and system level ESD design guidelines for LCD drivers
[4] IEC 60134 — Rating systems for electronic tubes and valves and analogous
semiconductor devices
[5] IEC 61340-5 — Protection of electronic devices from electrostatic phenomena
[6] IPC/JEDEC J-STD-020D — Moisture/Reflow Sensitivity Classification for
Nonhermetic Solid State Surface Mount Devices
[7] JESD22-A114 — Electrostatic Discharge (ESD) Sensitivity Testing Human Body
Model (HBM)
[8] JESD78 — IC Latch-Up Test
[9] JESD625-A — Requirements for Handling Electrostatic-Discharge-Sensitive
(ESDS) Devices
[10] SOT136-1_118 — SO28; Reel dry pack; SMD, 13", packing information
[11] SOT158-1_118 — VSO40; Reel pack; SMD, 13", packing information
[12] UM10204 — I2C-bus specification and user manual
[13] UM10569 — Store and transport requirements
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17. Revision history
Table 10. Revision history
Document ID
Release date
20150506
Data sheet status
Change notice
Supersedes
PCF21XXC_FAM v.3
Modifications:
Product data sheet
-
PCF21XXC_FAMILY v.2
• The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Changed Figure 16.
PCF21XXC_FAMILY v.2
PCF21XXC_FAMILY v.1
19970328
Product specification
-
PCF21XXC_FAMILY v.1
19950503
-
-
-
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18. Legal information
18.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use — NXP Semiconductors products are not designed,
18.2 Definitions
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
18.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
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Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
18.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
19. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
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20. Tables
Table 1. Ordering information . . . . . . . . . . . . . . . . . . . . .1
Table 2. Ordering options . . . . . . . . . . . . . . . . . . . . . . . .2
Table 3. Marking codes . . . . . . . . . . . . . . . . . . . . . . . . . .2
Table 4. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .4
Table 5. Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . .9
Table 6. Static characteristics . . . . . . . . . . . . . . . . . . . .10
Table 7. Dynamic characteristics . . . . . . . . . . . . . . . . . .11
Table 8. SnPb eutectic process (from J-STD-020D) . . .18
Table 9. Lead-free process (from J-STD-020D) . . . . . .18
Table 10. Revision history . . . . . . . . . . . . . . . . . . . . . . . .20
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21. Figures
Fig 1. Block diagram; PCF2100C . . . . . . . . . . . . . . . . . .2
Fig 2. Block diagram; PCF2111C. . . . . . . . . . . . . . . . . . .3
Fig 3. Block diagram; PCF2112C. . . . . . . . . . . . . . . . . . .3
Fig 4. Pin configuration PCF2100C (SOT136-1) . . . . . . .4
Fig 5. Pin configuration PCF211C (SOT158-1) . . . . . . . .4
Fig 6. Pin configuration PCF2112C (SOT158-1) . . . . . . .4
Fig 7. C-bus data format . . . . . . . . . . . . . . . . . . . . . . . . .6
Fig 8. Timing diagram for PCF2100C and PCF2111C. . .7
Fig 9. Timing diagram for PCF2112C. . . . . . . . . . . . . . . .7
Fig 10. Input circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Fig 11. Expansion possibility (using PCF2111C) . . . . . . . .8
Fig 12. C-bus timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Fig 13. Supply current as a function of supply voltage . .13
Fig 14. Display frequency as a function of supply
voltage; CO = 680 pF (except PCF2112C). . . . . .13
Fig 15. Display frequency as a function of supply
voltage; CO = 1.5 nF (only PCF2112C) . . . . . . . .13
Fig 16. Display frequency as a function of RO
and CO; Tamb = 25 °C; VDD = 5 V. . . . . . . . . . . . .13
Fig 17. Output resistance of backplane and segments
as a function of supply voltage. . . . . . . . . . . . . . .14
Fig 18. LOW-level output current as a function of
supply voltage (only PCF2112C) . . . . . . . . . . . . .14
Fig 19. Package outline SOT136-1 (SO28). . . . . . . . . . .15
Fig 20. Package outline SOT158-1 (VSO40). . . . . . . . . .16
Fig 21. Temperature profiles for large and small
components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
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22. Contents
1
General description. . . . . . . . . . . . . . . . . . . . . . 1
2
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 1
Ordering options. . . . . . . . . . . . . . . . . . . . . . . . 2
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3
3.1
4
5
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7
Functional description . . . . . . . . . . . . . . . . . . . 6
PCF2100C . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
PCF2111C . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
PCF2112C . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Bus control logic . . . . . . . . . . . . . . . . . . . . . . . . 6
Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Input circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Expansion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7.1
7.2
7.3
7.4
7.5
7.6
7.7
8
Safety notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9
Static characteristics. . . . . . . . . . . . . . . . . . . . 10
Dynamic characteristics . . . . . . . . . . . . . . . . . 11
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15
Handling information. . . . . . . . . . . . . . . . . . . . 17
Packing information . . . . . . . . . . . . . . . . . . . . 17
Tape and reel information. . . . . . . . . . . . . . . . 17
9
10
11
12
13
14
14.1
15
Soldering of SMD packages . . . . . . . . . . . . . . 17
Introduction to soldering . . . . . . . . . . . . . . . . . 17
Wave and reflow soldering . . . . . . . . . . . . . . . 17
Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 18
Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 18
15.1
15.2
15.3
15.4
16
17
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 20
18
Legal information. . . . . . . . . . . . . . . . . . . . . . . 21
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
18.1
18.2
18.3
18.4
19
20
21
22
Contact information. . . . . . . . . . . . . . . . . . . . . 22
Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2015.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 6 May 2015
Document identifier: PCF21XXC_FAM
相关型号：
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