PCF2128T [NXP]
Integrated RTC / TCXO / Crystal; 集成RTC / TCXO /晶体型号: | PCF2128T |
厂家: | NXP |
描述: | Integrated RTC / TCXO / Crystal |
文件: | 总10页 (文件大小:324K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PCF2128
Integrated RTC / TCXO / Crystal
Rev. 00.03 — 4 June 2007
Preliminary [short] data sheet
1. General description
The PCF2128 is a ready to run CMOS real time clock/calendar with an integrated
temperature compensated crystal oscillator (TCXO). In timekeeping applications the high
accuracy of the PCF2128 allows it to be used as a replacement for costly and higher
powered long wave receivers or GPS receivers. A programmable battery switch-over
circuit enables an uninterruptible power supply and consequently continuous timekeeping.
The PCF2128 additionally features 512 bytes of general purpose RAM, a programmable
watchdog, a time stamp facility and a voltage monitoring facility. Programming is possible
using either an SPI or an I2C-bus interface.
2. Features
Integration of a 32.768 kHz quartz
512 bytes of general purpose static
crystal in the same package as the RTC
RAM
temperature compensated crystal
oscillator (TCXO) with integrated
capacitors.
1 second or 1 minute interrupt output
accuracy:
oscillator stop detection
typically 3 ppm from−20 °C to +70 °C,
typically 5 ppm from −40 °C to +85 °C
provides year, month, day, weekday,
two line bi-directional 1 MHz fast mode
hours, minutes and seconds
plus I2C interface
programmable alarm function with
interrupt capability
timestamp input
programmable countdown timer with
interrupt capability
power-on reset
programmable watchdog timer with
interrupt and reset capability
3 line SPI interface with separate data
input and output (maximum speed
6.5 Mbits/s)
timestamp function with interrupt
programmable square wave output pin
capability
battery backup input pin and switch-over I2C-bus slave address: read A3H and
circuitry write A2H
extra power fail detection with input and clock operating voltage: <tbd> to 5.5 V
output pins
battery low detection
low backup current; typical 0.95 μA at
DD = 3.0 V and Tamb = 25 °C
selectable I2C and SPI interface
V
battery backed output voltage pin
PCF2128
NXP Semiconductors
Real time clock / calendar
3. Quick reference data
Table 1.
Quick reference data
VDD = 1.8 to 5.5 V; VSS = 0 V; Tamb = −40 to +85 °C unless otherwise specified.
Symbol
VDD
Parameter
Conditions
Min
Typ
Max
Unit
supply voltage
supply current
1.8
-
5.5
V
IDD
interface active
fSCL = 6.5 MHz
fSCL = 1.0 MHz
-
-
-
-
800
200
μA
μA
interface inactive (fSCL = 0 kHz)
timekeeping and power management
configuration, CLKOUT disabled;
VDD = 5.0 V
VDD = 3.0 V
-
-
2700
2100
-
-
nA
nA
interface inactive (fSCL = 0 kHz)
timekeeping configuration; Tamb = +25 °C
VDD = 5.0 V
VDD = 3.0 V
-
850
-
nA
-
450
-
nA
fSCL
SCL clock frequency
0
-
6.5
-
MHz
ppm
ppm
°C
Δf / f
frequency stability
(fo = 32.768 kHz)
T
amb = −40 to +85 °C
-
5
3
-
Tamb = −20 to +70 °C
-
5
Tamb
Tstg
ambient temperature
storage temperature
operating
−40
−65
+85
+150
-
°C
4. Ordering information
Table 2:
Ordering information
Type number Topside
mark
Package
Name
Description
plastic thin shrink small outline package; 20 leads; body width 4.4mm
Version
PCF2128T / 1 PCF2128T SO20
SOT163-1
PCF2128_SDS_0
© NXP B.V. 2007. All rights reserved.
Preliminary [short] data sheet
Rev. 00.03 — 4 June 2007
2 of 10
PCF2128
NXP Semiconductors
Real time clock / calendar
5. Block diagram
INT
17
TCXO
TEMP
OSCI
CONTROL 1
CONTROL 2
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
12
13
14
15
16
17
18
DIVIDER
AND
TIMER
32.768 kHz
OSCO
CONTROL 3
7
CLKOUT
SECONDS
MINUTES
18
V
OUT
internal
power
supply
HOURS
1 Hz
20
19
8
V
DD
DAYS
BATTERY BACK UP
SWITCH-OVER
CIRCUITRY
V
BAT
WEEKDAYS
LOGIC
CONTROL
V
SS
MONTHS
YEARS
OSCILLATOR
MONITOR
SECOND ALARM
MINUTE ALARM
HOUR ALARM
DAY ALARM
RESET
16
RST
4
3
2
1
SDA/CE
SDO
SDI
ADDRESS
REGISTER
WEEKDAY ALARM
CLOCKOUT CONTROL
TIMER CONTROL
COUNTDOWN TIMER
SERIAL BUS
INTERFACE
SCL
5
INTERFACE
SELECTORS
1/16 SECOND TIMESTAMP
SECOND TIMESTAMP
MINUTE TIMESTAMP
HOUR TIMESTAMP
DAY TIMESTAMP
IFS
TS
2
SCL
SDA/CE
I C BUS
INTERFACE
6
MONTH TIMESTAMP
YEAR TIMESTAMP
SCL
SDO
CRYSTAL AGING OFFSET 19
512 BYTES
STATIC RAM
RAM ADDRESS MSB
RAM ADDRESS LSB
RAM WRITE
1A
1B
1C
1D
SDI
SDA/CE
15
1.25 V
TEMPERATURE
SENSOR
RAM READ
PFI
TEMP
(internal)
14
13
PFO
TEST
001aag059_02
Fig 1. Block diagram of PCF2128
PCF2128_SDS_0
© NXP B.V. 2007. All rights reserved.
Preliminary [short] data sheet
Rev. 00.03 — 4 June 2007
3 of 10
PCF2128
NXP Semiconductors
Real time clock / calendar
6. Pinning information
6.1 Pinning
1
2
20
19
18
17
16
15
14
13
12
11
SCL
SDI
V
V
V
DD
die
BAT
OUT
3
SDO
oscillator
4
SDA/CE
IFS
INT
5
RST
PFI
PCF2128
6
TS
7
CLKOUT
PFO
TEST
n.c.
8
V
SS
9
n.c.
n.c.
10
n.c.
001aag576
001aag060
Fig 2. Pin configuration SO20
Fig 3. SO20 (3d)
Table 3:
Symbol
SCL
Pin description PCF2128
Pin Description
Symbol Pin Description
1
combined serial clock input for both I2C
and SPI interface. May float when CE
inactive.
VDD
20
positive supply voltage
SDI
2
3
4
serial data input for SPI interface. May
float when CE inactive.
VBAT
VOUT
INT
19
18
17
battery backup supply voltage
battery backed output voltage
SDO
serial data output for SPI interface,
push-pull
SDA / CE
combined serial data input / output for the
I2C interface and chip enable input (active
LOW) for the SPI interface.
interrupt output (open-drain; active
LOW)
IFS
5
interface selector input
RST
16
reset output (open drain; active LOW)
• connect to ground to select the SPI
interface
• connect to VOUT (pin 18) to select the
I2C interface
TS
6
timestamp input (active LOW) with 200 kΩ
PFI
PFO
TEST
nc
15
14
13
12
11
power fail input
internal pull-up resistor
CLKOUT
VSS
nc
7
clock output (open drain)
ground
power fail output (open drain; active
LOW)
8
Do not connect and do not use as feed
through.
9
Do not connect and do not use as feed
through.
Do not connect and do not use as feed
through.
nc
10
Do not connect and do not use as feed
through.
nc
Do not connect and do not use as feed
through.
PCF2128_SDS_0
© NXP B.V. 2007. All rights reserved.
Preliminary [short] data sheet
Rev. 00.03 — 4 June 2007
4 of 10
PCF2128
NXP Semiconductors
Real time clock / calendar
7. Limiting values
Table 4:
Symbol
VDD
Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
Parameter
Conditions
Min
−0.5
−0.5
Max
+6.5
+6.5
Unit
V
supply voltage
VBAT
backup battery supply
voltage
V
IDD
VI
supply current
−50
−0.5
−0.5
−10
−10
-
+50
+6.5
+6.5
+10
+10
300
+85
mA
V
input voltage
VO
II
output voltage
V
input current
mA
mA
mW
°C
°C
IO
output current
Ptot
Tamb
Tstg
total power dissipation
ambient temperature
storage temperature
−40
−65
+150
7.1 ESD values
• ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115 and 2000 V CDM per JESD22-C101.
• Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA.
8. Application information
• The PCF2128 is a ready to run real time clock; no external quartz is required.
• You can set different configurations in your application depending on the PCF2128
functions you want to use.
• The integration of the quartz crystal in the same package as the RTC has the
following advantages:
– elimination of crystal procurement issues
– elimination of RTC frequency tuning
– no more crystal PCB layout issues.
• You can select the SPI or I2C-bus interface using the IFS pin.
• By connecting a battery to VBAT an uninterruptible power supply is guaranteed.
• You can use the battery backed voltage VOUT to supply an external RAM to retain
RAM data in battery backup mode.
• You can connect PFI through an external voltage divider to VDD to allow extra power
fail detection. If not used, connect PFI to VSS
.
• You can connect the timestamp input pin TS to a push button for tamper detection.
PCF2128_SDS_0
© NXP B.V. 2007. All rights reserved.
Preliminary [short] data sheet
Rev. 00.03 — 4 June 2007
5 of 10
PCF2128
NXP Semiconductors
Real time clock / calendar
8.1 Application example
8.1.1 Timekeeping, power management, CLKOUT, timestamp and interface active
PCF2128 used for timekeeping, power management, CLKOUT and timestamp functions
(see Figure 4). The interface is active. Vout supplies an external chip (e.g. SRAM).
mgm002_09
VDD = 2.2 - 5.5 V
RPU
RPU
R1
PCF2128
microcontroller
SCL
1
2
3
4
5
6
7
VDD 20
SCL
SDI
INT
VBAT
19
SDI
SDO
CE
to the MCU
from PCF2128
INT
RST
PFO
VOUT
18
17
16
SDO
SDA / CE
IFS
INT
RST
PFO
RST
TS
PFI 15
CLKOUT
PFO
n.c.
n.c.
n.c.
14
Batt
100 nF
VSS
8
9
13
12
n.c.
100 nF
100 nF
VSS
R2
n.c.
10
11
SRAM
VDD
VSS
Fig 4. Application diagram: timekeeping, power management, CLKOUT, timestamp with the interface active
PCF2128_SDS_0
© NXP B.V. 2007. All rights reserved.
Preliminary [short] data sheet
Rev. 00.03 — 4 June 2007
6 of 10
PCF2128
NXP Semiconductors
Real time clock / calendar
9. Revision history
Table 5.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PCF2128__SDS_00.03
Modifications:
<tbd>
Preliminary
PCF2128__SDS_00.02
• Added Figure 3.
20070604 Preliminary
• Datasheet text ammended. Section 8.1 corrected.
PCF2128__SDS_00.02
Modifications:
PCF2128__SDS_00.01
-
PCF2128__SDS_00.01
20070509
Preliminary short data sheet
PCF2128_SDS_0
© NXP B.V. 2007. All rights reserved.
Preliminary [short] data sheet
Rev. 00.03 — 4 June 2007
7 of 10
PCF2128
NXP Semiconductors
Real time clock / calendar
10. Legal information
10.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
result in personal injury, death or severe property or environmental damage.
10.2 Definitions
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
10.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
10.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
I2C-bus — logo is a trademark of NXP B.V.
11. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
PCF2128_SDS_0
© NXP B.V. 2007. All rights reserved.
Preliminary [short] data sheet
Rev. 00.03 — 4 June 2007
8 of 10
PCF2128
NXP Semiconductors
Real time clock / calendar
Notes
PCF2128_SDS_0
© NXP B.V. 2007. All rights reserved.
Preliminary [short] data sheet
Rev. 00.03 — 4 June 2007
9 of 10
PCF2128
NXP Semiconductors
Real time clock / calendar
12. Contents
1
General description . . . . . . . . . . . . . . . . . . . . . . 1
2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
ESD values. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
4
5
6
6.1
7
7.1
8
8.1
8.1.1
Application information. . . . . . . . . . . . . . . . . . . 5
Application example . . . . . . . . . . . . . . . . . . . . . 6
Timekeeping, power management, CLKOUT,
timestamp and interface active. . . . . . . . . . . . . 6
9
Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 7
10
Legal information. . . . . . . . . . . . . . . . . . . . . . . . 8
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 8
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
10.1
10.2
10.3
10.4
11
12
Contact information. . . . . . . . . . . . . . . . . . . . . . 8
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 4 June 2007
Document identifier: PCF2128_SDS_0
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