PCF8591T [NXP]
8-bit A/D and D/A converter; 8位A / D和D / A转换器
| 型号： | PCF8591T |
| 厂家： | 
NXP |
| 描述： | 8-bit A/D and D/A converter |
| 文件： | 总28页 (文件大小：140K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
PCF8591
8-bit A/D and D/A converter
Product specification
2003 Jan 27
Supersedes data of 2001 Dec 13
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
CONTENTS
1
2
3
4
5
6
7
FEATURES
APPLICATIONS
GENERAL DESCRIPTION
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
FUNCTIONAL DESCRIPTION
7.1
7.2
7.3
7.4
7.5
7.6
Addressing
Control byte
D/A conversion
A/D conversion
Reference voltage
Oscillator
8
CHARACTERISTICS OF THE I2C-BUS
8.1
8.2
8.3
8.4
8.5
Bit transfer
Start and stop conditions
System configuration
Acknowledge
I2C-bus protocol
9
LIMITING VALUES
10
11
12
13
14
15
16
17
17.1
HANDLING
DC CHARACTERISTICS
D/A CHARACTERISTICS
A/D CHARACTERISTICS
AC CHARACTERISTICS
APPLICATION INFORMATION
PACKAGE OUTLINES
SOLDERING
Introduction to soldering through-hole mount
packages
17.2
17.3
17.4
Soldering by dipping or by solder wave
Manual soldering
Suitability of through-hole mount IC packages
for dipping and wave soldering methods
18
19
20
21
DATA SHEET STATUS
DEFINITIONS
DISCLAIMERS
PURCHASE OF PHILIPS I2C COMPONENTS
2003 Jan 27
2
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
1
FEATURES
• Single power supply
• Operating supply voltage 2.5 V to 6 V
• Low standby current
• Serial input/output via I2C-bus
• Address by 3 hardware address pins
• Sampling rate given by I2C-bus speed
3
GENERAL DESCRIPTION
The PCF8591 is a single-chip, single-supply low power
8-bit CMOS data acquisition device with four analog
inputs, one analog output and a serial I2C-bus interface.
Three address pins A0, A1 and A2 are used for
programming the hardware address, allowing the use of
up to eight devices connected to the I2C-bus without
additional hardware. Address, control and data to and from
the device are transferred serially via the two-line
bidirectional I2C-bus.
• 4 analog inputs programmable as single-ended or
differential inputs
• Auto-incremented channel selection
• Analog voltage range from VSS to VDD
• On-chip track and hold circuit
• 8-bit successive approximation A/D conversion
• Multiplying DAC with one analog output.
The functions of the device include analog input
multiplexing, on-chip track and hold function, 8-bit
analog-to-digital conversion and an 8-bit digital-to-analog
conversion. The maximum conversion rate is given by the
maximum speed of the I2C-bus.
2
APPLICATIONS
• Closed loop control systems
• Low power converter for remote data acquisition
• Battery operated equipment
• Acquisition of analog values in automotive, audio and
TV applications.
4
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
PCF8591P
DIP16
SO16
plastic dual in-line package; 16 leads (300 mil)
SOT38-4
PCF8591T
plastic small outline package; 16 leads; body width 7.5 mm
SOT162-1
2003 Jan 27
3
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
5
BLOCK DIAGRAM
SCL
SDA
A0
2
I C BUS
INTERFACE
A1
STATUS
REGISTER
DAC DATA
REGISTER
ADC DATA
REGISTER
PCF8591
A2
EXT
V
V
POWER ON
RESET
DD
SS
CONTROL
LOGIC
OSCILLATOR
OSC
AIN0
AIN1
AIN2
AIN3
SAMPLE
AND
HOLD
ANALOGUE
MULTIPLEXER
SUCCESSIVE
APPROXIMATION
REGISTER/LOGIC
COMPARATOR
SAMPLE
AND
HOLD
V
AOUT
REF
DAC
AGND
MBL821
Fig.1 Block diagram.
6
PINNING
SYMBOL
PIN
DESCRIPTION
AINO
1
2
3
4
5
6
7
8
9
analog inputs (A/D converter)
AIN1
AIN2
AIN3
A0
handbook, halfpage
AIN0
1
2
3
4
5
6
7
8
16 V
DD
AIN1
AIN2
AIN3
A0
15 AOUT
hardware address
14
V
REF
A1
13 AGND
12 EXT
11 OSC
10 SCL
PCF8591P
A2
VSS
SDA
SCL
OSC
EXT
negative supply voltage
I2C-bus data input/output
A1
A2
10 I2C-bus clock input
V
9
SDA
11 oscillator input/output
SS
12 external/internal switch for
oscillator input
MBL822
AGND
VREF
AOUT
VDD
13 analog ground
14 voltage reference input
15 analog output (D/A converter)
16 positive supply voltage
Fig.2 Pinning diagram (DIP16).
2003 Jan 27
4
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
handbook, halfpage
msb
lsb
1
0
0
1
A2
A1
A0 R/W
fixed part
programmable part
handbook, halfpage
MBL824
AIN0
AIN1
AIN2
AIN3
A0
1
2
3
4
5
6
7
8
16
V
DD
15 AOUT
Fig.4 Address byte.
14
13
12
11
10
9
V
REF
AGND
EXT
PCF8591T
7.2
Control byte
A1
OSC
SCL
The second byte sent to a PCF8591 device will be stored
in its control register and is required to control the device
function. The upper nibble of the control register is used for
enabling the analog output, and for programming the
analog inputs as single-ended or differential inputs. The
lower nibble selects one of the analog input channels
defined by the upper nibble (see Fig.5). If the
A2
V
SDA
SS
MBL823
auto-increment flag is set, the channel number is
incremented automatically after each A/D conversion.
If the auto-increment mode is desired in applications
where the internal oscillator is used, the analog output
enable flag in the control byte (bit 6) should be set. This
allows the internal oscillator to run continuously, thereby
preventing conversion errors resulting from oscillator
start-up delay. The analog output enable flag may be reset
at other times to reduce quiescent power consumption.
Fig.3 Pinning diagram (SO16).
7
FUNCTIONAL DESCRIPTION
Addressing
7.1
The selection of a non-existing input channel results in the
highest available channel number being allocated.
Therefore, if the auto-increment flag is set, the next
selected channel will be always channel 0. The most
significant bits of both nibbles are reserved for future
functions and have to be set to logic 0. After a Power-on
reset condition all bits of the control register are reset to
logic 0. The D/A converter and the oscillator are disabled
for power saving. The analog output is switched to a
high-impedance state.
Each PCF8591 device in an I2C-bus system is activated by
sending a valid address to the device. The address
consists of a fixed part and a programmable part. The
programmable part must be set according to the address
pins A0, A1 and A2. The address always has to be sent as
the first byte after the start condition in the I2C-bus
protocol. The last bit of the address byte is the
read/write-bit which sets the direction of the following data
transfer (see Figs 4, 16 and 17).
2003 Jan 27
5
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
msb
lsb
0
X
X
X
0
X
X
X
CONTROL BYTE
A/D CHANNEL NUMBER:
00
01
10
11
channel 0
channel 1
channel 2
channel 3
AUTO-INCREMENT FLAG:
(active if 1)
ANALOGUE INPUT PROGRAMMING:
00
Four single-ended inputs
AIN0
AIN1
AIN2
AIN3
channel 0
channel 1
channel 2
channel 3
01
Three differential inputs
AIN0
channel 0
channel 1
channel 2
AIN1
AIN2
AIN3
10
11
Single-ended and differential mixed
AIN0
AIN1
channel 0
channel 1
AIN2
AIN3
channel 2
Two differential inputs
AIN0
channel 0
channel 1
AIN1
AIN2
AIN3
ANALOGUE OUTPUT ENABLE FLAG:
(analogue output active if 1)
MBL825
Fig.5 Control byte.
6
2003 Jan 27
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
7.3
D/A conversion
control register. In the active state the output voltage is
held until a further data byte is sent.
The third byte sent to a PCF8591 device is stored in the
DAC data register and is converted to the corresponding
analog voltage using the on-chip D/A converter. This D/A
converter consists of a resistor divider chain connected to
the external reference voltage with 256 taps and selection
switches. The tap-decoder switches one of these taps to
the DAC output line (see Fig.6).
The on-chip D/A converter is also used for successive
approximation A/D conversion. In order to release the
DAC for an A/D conversion cycle the unity gain amplifier is
equipped with a track and hold circuit. This circuit holds the
output voltage while executing the A/D conversion.
The output voltage supplied to the analog output AOUT is
given by the formula shown in Fig.7. The waveforms of a
D/A conversion sequence are shown in Fig.8.
The analog output voltage is buffered by an auto-zeroed
unity gain amplifier. This buffer amplifier may be switched
on or off by setting the analog output enable flag of the
V
DAC out
REF
R256
R255
FF
D7
D6
R3
R2
R1
TAP
DECODER
02
D0
01
AGND
00
MBL826
Fig.6 DAC resistor divider chain.
2003 Jan 27
7
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
MBL827
msb
lsb
DAC data
register
D7
D6
D5
D4
D3
D2
V
D1
D0
7
- V
REF
AGND
i
Di × 2
∑
V
V
= V
+
AOUT
AOUT
AGND
256
i = 0
V
DD
V
REF
V
AGND
V
SS
00
01
02
03
04
FE
FF
HEX code
Fig.7 DAC data and DC conversion characteristics.
MBL828
PROTOCOL
S
ADDRESS
0
A
CONTROL BYTE
A
DATA BYTE 1
A
DATA BYTE 2
A
SCL
1
2
8
9
1
9
1
9
1
SDA
V
AOUT
high impedance state or
previous value held in DAC register
previous value held in
DAC register
value of data byte 1
time
Fig.8 D/A conversion sequence.
8
2003 Jan 27
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
7.4
A/D conversion
converted to the corresponding 8-bit binary code. Samples
picked up from differential inputs are converted to an 8-bit
twos complement code (see Figs 10 and 11).
The A/D converter makes use of the successive
approximation conversion technique. The on-chip D/A
converter and a high-gain comparator are used
temporarily during an A/D conversion cycle.
The conversion result is stored in the ADC data register
and awaits transmission. If the auto-increment flag is set
the next channel is selected.
An A/D conversion cycle is always started after sending a
valid read mode address to a PCF8591 device. The A/D
conversion cycle is triggered at the trailing edge of the
acknowledge clock pulse and is executed while
transmitting the result of the previous conversion (see
Fig.9).
The first byte transmitted in a read cycle contains the
conversion result code of the previous read cycle. After a
Power-on reset condition the first byte read is a
hexadecimal 80. The protocol of an I2C-bus read cycle is
shown in Chapter 8, Figs 16 and 17.
Once a conversion cycle is triggered an input voltage
sample of the selected channel is stored on the chip and is
The maximum A/D conversion rate is given by the actual
speed of the I2C-bus.
PROTOCOL
S
ADDRESS
1
A
DATA BYTE 0
A
DATA BYTE 1
A
DATA BYTE 2
A
SCL
1
2
8
9
1
9
1
9
1
SDA
sampling byte 1
sampling byte 2
sampling byte 3
conversion of byte 1
conversion of byte 2
conversion of byte 3
transmission
of previously
converted byte
transmission
of byte 1
transmission
of byte 2
MBL829
Fig.9 A/D conversion sequence.
2003 Jan 27
9
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
MBL830
HEX
code
FF
FE
V
− V
REF
AGND
V
=
lsb
256
04
03
02
01
00
0
1
2
3
4
254 255
V
− V
AGND
AIN
V
lsb
Fig.10 A/D conversion characteristics of single-ended inputs.
HEX
CODE
MBL831
7F
7E
02
01
00
−128 −127
−2
−1
0
1
2
126
127
V
− V
AIN −
AIN +
FF
V
lsb
FE
V
− V
REF
AGND
V
=
lsb
256
81
80
Fig.11 A/D conversion characteristics of differential inputs.
10
2003 Jan 27
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
7.5
Reference voltage
7.6
Oscillator
For the D/A and A/D conversion either a stable external
voltage reference or the supply voltage has to be applied
to the resistor divider chain (pins VREF and AGND).
The AGND pin has to be connected to the system analog
An on-chip oscillator generates the clock signal required
for the A/D conversion cycle and for refreshing the
auto-zeroed buffer amplifier. When using this oscillator the
EXT pin has to be connected to VSS. At the OSC pin the
oscillator frequency is available.
ground and may have a DC off-set with reference to VSS
.
A low frequency may be applied to the VREF and AGND
pins. This allows the use of the D/A converter as a
one-quadrant multiplier; see Chapter 15 and Fig.7.
If the EXT pin is connected to VDD the oscillator output
OSC is switched to a high-impedance state allowing the
user to feed an external clock signal to OSC.
The A/D converter may also be used as a one or two
quadrant analog divider. The analog input voltage is
divided by the reference voltage. The result is converted to
a binary code. In this application the user has to keep the
reference voltage stable during the conversion cycle.
2003 Jan 27
11
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
8
CHARACTERISTICS OF THE I2C-BUS
The I2C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a serial data
line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor. Data
transfer may be initiated only when the bus is not busy.
8.1
Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period
of the clock pulse as changes in the data line at this time will be interpreted as a control signal.
SDA
SCL
data line
stable;
data valid
change
of data
allowed
MBC621
Fig.12 Bit transfer.
8.2
Start and stop conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the
clock is HIGH, is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH, is
defined as the stop condition (P).
SDA
SCL
SDA
SCL
S
P
STOP condition
START condition
MBC622
Fig.13 Definition of START and STOP condition.
2003 Jan 27
12
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
8.3
System configuration
A device generating a message is a ‘transmitter’, a device receiving a message is the ‘receiver’. The device that controls
the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’.
SDA
SCL
MASTER
TRANSMITTER /
RECEIVER
SLAVE
TRANSMITTER /
RECEIVER
MASTER
TRANSMITTER /
RECEIVER
SLAVE
RECEIVER
MASTER
TRANSMITTER
MBA605
Fig.14 System configuration.
8.4
Acknowledge
The number of data bytes transferred between the start and stop conditions from transmitter to receiver is not limited.
Each data byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by
the transmitter whereas the master also generates an extra acknowledge related clock pulse. A slave receiver which is
addressed must generate an acknowledge after the reception of each byte. Also a master must generate an
acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that
acknowledges has to pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW
during the HIGH period of the acknowledge related clock pulse. A master receiver must signal an end of data to the
transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event the
transmitter must leave the data line HIGH to enable the master to generate a stop condition.
DATA OUTPUT
BY TRANSMITTER
not acknowledge
DATA OUTPUT
BY RECEIVER
acknowledge
SCL FROM
MASTER
1
2
8
9
S
clock pulse for
acknowledgement
START
condition
MBC602
Fig.15 Acknowledgement on the I2C-bus.
2003 Jan 27
13
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
8.5
I2C-bus protocol
After a start condition a valid hardware address has to be sent to a PCF8591 device. The read/write bit defines the
direction of the following single or multiple byte data transfer. For the format and the timing of the start condition (S), the
stop condition (P) and the acknowledge bit (A) refer to the I2C-bus characteristics. In the write mode a data transfer is
terminated by sending either a stop condition or the start condition of the next data transfer.
acknowledge
from PCF8591
acknowledge
from PCF8591
acknowledge
from PCF8591
S
ADDRESS
0
A
CONTROL BYTE
A
DATA BYTE
A
P/S
N = 0 to M
data bytes
MBL833
Fig.16 Bus protocol for write mode, D/A conversion.
acknowledge
from PCF8591
acknowledge
from master
no acknowledge
S
ADDRESS
1
A
DATA BYTE
A
LAST DATA BYTE
1
P
N = 0 to M
data bytes
MBL834
Fig.17 Bus protocol for read mode, A/D conversion.
2003 Jan 27
14
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
9
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL PARAMETER
VDD supply voltage (pin 16)
MIN.
MAX.
UNIT
−0.5
−0.5
−
+8.0
VDD + 0.5
±10
V
VI
II
input voltage (any input)
DC input current
V
mA
mA
mA
mW
mW
°C
IO
DC output current
−
±20
I
DD, ISS
VDD or VSS current
−
±50
Ptot
PO
Tamb
Tstg
total power dissipation per package
power dissipation per output
operating ambient temperature
storage temperature
−
300
−
100
−40
−65
+85
+150
°C
10 HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However it is good practice to take
normal precautions appropriate to handling MOS devices (see “Handling MOS devices”).
2003 Jan 27
15
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
11 DC CHARACTERISTICS
VDD = 2.5 V to 6 V; VSS = 0 V; Tamb = −40 °C to +85 °C unless otherwise specified.
SYMBOL
Supply
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDD
IDD
supply voltage (operating)
supply current
2.5
−
6.0
V
standby
VI = VSS or VDD; no load
−
1
15
µA
µA
mA
V
operating, AOUT off
operating, AOUT active
Power-on reset level
f
SCL = 100 kHz
SCL = 100 kHz
−
125
0.45
−
250
1.0
2.0
f
−
VPOR
note 1
0.8
Digital inputs/output: SCL, SDA, A0, A1, A2
VIL
VIH
IL
LOW level input voltage
HIGH level input voltage
leakage current
A0, A1, A2
0
−
−
0.3 × VDD
V
V
0.7 × VDD
VDD
VI = VSS to VDD
VI = VSS to VDD
−250
−1
−
−
−
−
+250
+1
5
nA
µA
pF
mA
SCL, SDA
Ci
input capacitance
−
IOL
LOW level SDA output current VOL = 0.4 V
3.0
−
Reference voltage inputs
VREF
VAGND
ILI
reference voltage
VREF > VAGND; note 2
VREF > VAGND; note 2
VSS + 1.6
VSS
−
VDD
V
analog ground voltage
input leakage current
input resistance
−
VDD − 0.8 V
−250
−
−
+250
nA
RREF
pins VREF and AGND
100
−
kΩ
Oscillator: OSC, EXT
ILI
input leakage current
oscillator frequency
−
−
−
250
nA
fOSC
0.75
1.25
MHz
Notes
1. The power on reset circuit resets the I2C-bus logic when VDD is less than VPOR
2. A further extension of the range is possible, if the following conditions are fulfilled:
REF + V
.
V
V
REF + V
AGND ≥ 0.8V, V
--------------------------------------
–
AGND ≥ 0.4V
--------------------------------------
DD
2
2
2003 Jan 27
16
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
12 D/A CHARACTERISTICS
VDD = 5.0 V; VSS = 0 V; VREF = 5.0 V; VAGND = 0 V; RL = 10 kΩ; CL = 100 pF; Tamb = −40 °C to +85 °C unless otherwise
specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Analog output
VOA
output voltage
no resistive load
RL = 10 kΩ
VSS
−
−
−
VDD
V
V
VSS
0.9 × VDD
ILO
output leakage current
AOUT disabled
−
250
nA
Accuracy
OSe
Le
offset error
Tamb = 25 °C
−
−
−
−
−
−
−
50
±1.5
1
mV
LSB
%
linearity error
−
Ge
gain error
no resistive load
to 1⁄2 LSB full scale step
−
tDAC
fDAC
SNRR
settling time
−
90
11.1
−
µs
conversion rate
supply noise rejection ratio
−
kHz
dB
f = 100 Hz;
40
VDDN = 0.1 × VPP
13 A/D CHARACTERISTICS
DD = 5.0 V; VSS = 0 V; VREF = 5.0 V; VAGND = 0 V; RS = 10 kΩ; Tamb = −40 °C to +85 °C unless otherwise specified.
V
SYMBOL
Analog inputs
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VIA
ILIA
CIA
CID
VIS
VID
analog input voltage
VSS
−
VDD
V
analog input leakage current
analog input capacitance
differential input capacitance
single-ended voltage
−
−
100
−
nA
pF
pF
V
−
10
10
−
−
−
measuring range
VAGND
VREF
differential voltage
measuring range;
VFS = VREF − VAGND
−
V
–VFS
+VFS
------------
2
-------------
2
Accuracy
OSe
Le
offset error
Tamb = 25 °C
−
−
−
−
−
−
−
20
±1.5
1
mV
LSB
%
linearity error
−
Ge
gain error
−
GSe
CMRR
SNRR
small-signal gain error
common-mode rejection ratio
supply noise rejection ratio
∆Vi = 16 LSB
−
5
%
60
40
−
dB
dB
f = 100 Hz;
−
VDDN = 0.1 × VPP
tADC
fADC
conversion time
−
−
−
−
90
µs
sampling/conversion rate
11.1
kHz
2003 Jan 27
17
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
MBL836
MBL835
160
200
handbook, halfpage
handbook, halfpage
I
I
DD
DD
(µA)
(µA)
−40 °c
+27 °c
120
150
80
40
100
50
0
+85 °c
0
2
3
4
5
6
2
3
4
5
6
V
(V)
V
(V)
DD
DD
a. Internal oscillator; Tamb = +27° C.
b. External oscillator.
Fig.18 Operating supply current as a function of supply voltage (analog output disabled).
MBL837
MBL838
500
500
handbook, halfpage
D/A output
impedance (Ω)
handbook, halfpage
D/A output
impedance (Ω)
400
400
300
300
200
100
0
200
100
0
00
02
04
06
08
0A
BO
CO
DO
EO
FO
FF
hex input code
hex input code
a. Output impedance near negative power rail;
b. Output impedance near positive power rail;
Tamb = +27 °C.
Tamb = +27 °C.
The x-axis represents the hex input-code equivalent of the output voltage.
Fig.19 Output impedance of analog output buffer (near power rails).
2003 Jan 27
18
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
14 AC CHARACTERISTICS
All timing values are valid within the operating supply voltage and ambient temperature range and reference to VIL and
IH with an input voltage swing of VSS to VDD
V
.
SYMBOL PARAMETER
I2C-bus timing (see Fig.20; note 1)
MIN.
TYP.
MAX.
UNIT
fSCL
SCL clock frequency
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
100
kHz
tSP
tolerable spike width on bus
bus free time
100
−
ns
µs
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
tBUF
4.7
4.7
4.0
4.7
4.0
−
tSU;STA
tHD;STA
tLOW
tHIGH
tr
START condition set-up time
START condition hold time
SCL LOW time
−
−
−
SCL HIGH time
−
SCL and SDA rise time
SCL and SDA fall time
data set-up time
1.0
0.3
−
tf
−
tSU;DAT
tHD;DAT
tVD;DAT
tSU;STO
250
0
data hold time
−
SCL LOW-to-data out valid
STOP condition set-up time
−
3.4
−
4.0
Note
1. A detailed description of the I2C-bus specification, with applications, is given in brochure “The I2C-bus and how to
use it”. This brochure may be ordered using the code 9398 393 40011.
START
CONDITION
(S)
BIT 7
MSB
(A7)
BIT 6
(A6)
BIT 0
LSB
(R/W)
ACKNOWLEDGE
(A)
STOP
CONDITION
(P)
PROTOCOL
t
t
t
HIGH
SU;STA
LOW
1 / f
SCL
SCL
SDA
t
t
t
f
BUF
r
t
t
t
t
t
HD;STA
SU;DAT
VD;DAT
SU;STO
HD;DAT
MBD820
Fig.20 I2C-bus timing diagram; rise and fall times refer to VIL and VIH.
2003 Jan 27
19
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
15 APPLICATION INFORMATION
Inputs must be connected to VSS or VDD when not in use. Analog inputs may also be connected to AGND or VREF
.
In order to prevent excessive ground and supply noise and to minimize cross-talk of the digital to analog signal paths the
user has to design the printed-circuit board layout very carefully. Supply lines common to a PCF8591 device and noisy
digital circuits and ground loops should be avoided. Decoupling capacitors (>10 µF) are recommended for power supply
and reference voltage inputs.
V
DD
V
V
V
DD
DD
DD
V
0
AIN0
AIN1
AIN2
AIN3
A0
AOUT
V
OUT
V
REF
AGND
V
DD
+θ
EXT
OSC
PCF8591
A1
SCL
SDA
A2
V
+θ
SS
V
DD
V
AIN0
AIN1
AIN2
AIN3
A0
AOUT
V
DD
OUT
V
V
REF
AGND
EXT
V
V
0
1
2
OSC
V
DD
PCF8591
A1
SCL
SDA
A2
V
SS
V
DD
MASTER
TRANSMITTER
ANALOGUE GROUND
DIGITAL GROUND
2
I C bus
MBL839
Fig.21 Application diagram.
20
2003 Jan 27
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
16 PACKAGE OUTLINES
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
b
2
16
9
M
H
pin 1 index
E
1
8
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
Z
A
A
A
2
(1)
(1)
1
w
UNIT
mm
b
b
b
c
D
E
e
e
L
M
M
H
1
2
1
E
max.
min.
max.
max.
1.73
1.30
0.53
0.38
1.25
0.85
0.36
0.23
19.50
18.55
6.48
6.20
3.60
3.05
8.25
7.80
10.0
8.3
4.2
0.51
3.2
2.54
0.10
7.62
0.30
0.254
0.01
0.76
0.068 0.021 0.049 0.014
0.051 0.015 0.033 0.009
0.77
0.73
0.26
0.24
0.14
0.12
0.32
0.31
0.39
0.33
inches
0.17
0.020
0.13
0.030
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-01-14
SOT38-4
2003 Jan 27
21
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
SO16: plastic small outline package; 16 leads; body width 7.5 mm
SOT162-1
D
E
A
X
c
H
v
M
A
E
y
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
detail X
e
w
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
10.5
10.1
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
mm
2.65
0.25
0.01
1.27
0.050
1.4
0.25 0.25
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.41
0.014 0.009 0.40
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches 0.10
0.055
0.01 0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
97-05-22
99-12-27
SOT162-1
075E03
MS-013
2003 Jan 27
22
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
17 SOLDERING
The total contact time of successive solder waves must not
exceed 5 seconds.
17.1 Introduction to soldering through-hole mount
packages
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
This text gives a brief insight to wave, dip and manual
soldering. A more in-depth account of soldering ICs can be
found in our “Data Handbook IC26; Integrated Circuit
Packages” (document order number 9398 652 90011).
Wave soldering is the preferred method for mounting of
through-hole mount IC packages on a printed-circuit
board.
17.3 Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
17.2 Soldering by dipping or by solder wave
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds.
300 and 400 °C, contact may be up to 5 seconds.
17.4 Suitability of through-hole mount IC packages for dipping and wave soldering methods
SOLDERING METHOD
PACKAGE
DIPPING
WAVE
DBS, DIP, HDIP, SDIP, SIL
suitable
suitable(1)
Note
1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
2003 Jan 27
23
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
18 DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
19 DEFINITIONS
20 DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2003 Jan 27
24
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
21 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
2003 Jan 27
25
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
NOTES
2003 Jan 27
26
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
NOTES
2003 Jan 27
27
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2003
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
403512/06/pp28
Date of release: 2003 Jan 27
Document order number: 9397 750 10464
相关型号：
PCF8591T-T
IC SPECIALTY ANALOG CIRCUIT, PDSO16, 7.50 MM, PLASTIC, SOT162-1, SO-16, Analog IC:Other
NXP
PCF8591T/2
IC SPECIALTY ANALOG CIRCUIT, PDSO16, 7.50 MM, LEAD FREE, PLASTIC, SOT162-1, SO-16, Analog IC:Other
NXP
PCF8591TD
IC SPECIALTY ANALOG CIRCUIT, PDSO16, 7.50 MM, LEAD FREE, PLASTIC, SOT162-1, SO-16, Analog IC:Other
NXP
PCF8593N
IC REAL TIME CLOCK, PDIP8, 0.300 INCH, PLASTIC, MO-001AN, SOT-97-1, DIP-8, Timer or RTC
NXP
©2020 ICPDF网 联系我们和版权申明