PHP33NQ20T [NXP]

N-channel TrenchMOS⑩ standard level FET; N沟道的TrenchMOS ™标准水平FET
PHP33NQ20T
型号: PHP33NQ20T
厂家: NXP    NXP
描述:

N-channel TrenchMOS⑩ standard level FET
N沟道的TrenchMOS ™标准水平FET

晶体 晶体管 功率场效应晶体管 开关 脉冲 局域网
文件: 总13页 (文件大小:83K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PHP/PHB33NQ20T  
N-channel TrenchMOS™ standard level FET  
Rev. 01 — 8 November 2004  
Product data sheet  
1. Product profile  
1.1 General description  
Standard level N-channel enhancement mode field effect transistor in a plastic package  
using TrenchMOS™ technology.  
1.2 Features  
Low on-state resistance  
Low thermal resistance  
Fast switching  
Low gate charge.  
1.3 Applications  
DC-to-DC primary side switching.  
1.4 Quick reference data  
VDS 200 V  
ID 32.7 A  
RDSon 77 mΩ  
Qgd = 9.6 nC (typ).  
2. Pinning information  
Table 1:  
Discrete pinning  
Pin Description  
Simplified outline  
Symbol  
1
2
3
gate  
D
S
mb  
mb  
[1]  
drain  
source  
G
mb mounting base;  
connected to drain  
mbb076  
2
1
3
1
2 3  
SOT78 (TO-220AB)  
SOT404 (D2-PAK)  
[1] It is not possible to make a connection to pin 2 of the SOT404 package.  
PHP/PHB33NQ20T  
Philips Semiconductors  
N-channel TrenchMOS™ standard level FET  
3. Ordering information  
Table 2:  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
PHP33NQ20T  
PHB33NQ20T  
TO-220AB Plastic single-ended package; heatsink mounted; 1 mounting hole; 3 lead  
TO-220AB  
SOT78  
D2-PAK  
Plastic single-ended surface mounted package (D2-PAK); 3 leads (one lead SOT404  
cropped)  
4. Limiting values  
Table 3:  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol Parameter  
Conditions  
Min  
Max  
200  
Unit  
V
VDS  
VDGR  
VGS  
ID  
drain-source voltage (DC)  
25 °C Tj 175 °C  
-
drain-gate voltage (DC)  
gate-source voltage (DC)  
drain current (DC)  
25 °C Tj 175 °C; RGS = 20 kΩ  
-
200  
V
-
±20  
V
Tmb = 25 °C; VGS = 10 V; Figure 2 and 3  
Tmb = 100 °C; VGS = 10 V; Figure 2  
Tmb = 25 °C; pulsed; tp 10 µs; Figure 3  
Tmb = 25 °C; Figure 1  
-
32.7  
23.1  
65.4  
230  
A
-
A
IDM  
Ptot  
Tstg  
Tj  
peak drain current  
-
A
total power dissipation  
storage temperature  
junction temperature  
-
W
°C  
°C  
55  
55  
+175  
+175  
Source-drain diode  
IS  
source (diode forward) current (DC) Tmb = 25 °C  
-
-
32.7  
65.4  
A
A
ISM  
peak source (diode forward) current Tmb = 25 °C; pulsed; tp 10 µs  
Avalanche ruggedness  
EDS(AL)S non-repetitive drain-source  
avalanche energy  
unclamped inductive load; ID = 10.4 A;  
tp = 0.14 ms; VDD 200 V; RGS = 50 ;  
-
190  
mJ  
VGS = 10 V; starting at Tj = 25 °C  
9397 750 14003  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 01 — 8 November 2004  
2 of 13  
PHP/PHB33NQ20T  
Philips Semiconductors  
N-channel TrenchMOS™ standard level FET  
03aa16  
03aa24  
120  
120  
Ider  
(%)  
Pder  
(%)  
80  
80  
40  
0
40  
0
0
50  
100  
150  
200  
mb (°C)  
0
50  
100  
150  
200  
Tmb ( C)  
°
T
Ptot  
ID  
Pder  
=
× 100%  
Ider  
=
× 100%  
-----------------------  
-------------------  
P
I
°
°
tot(25 C)  
D(25 C)  
Fig 1. Normalized total power dissipation as a  
function of mounting base temperature.  
Fig 2. Normalized continuous drain current as a  
function of mounting base temperature.  
03ao10  
102  
t = 10  
p
s
µ
ID  
(A)  
100  
s
µ
Limit RDSon = VDS / ID  
10  
DC  
1 ms  
10 ms  
1
10-1  
1
10  
102  
103  
VDS (V)  
Tmb = 25 °C; IDM is single pulse; VGS = 10 V  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.  
9397 750 14003  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 01 — 8 November 2004  
3 of 13  
PHP/PHB33NQ20T  
Philips Semiconductors  
N-channel TrenchMOS™ standard level FET  
5. Thermal characteristics  
Table 4:  
Symbol Parameter  
Rth(j-mb) thermal resistance from junction to mounting base Figure 4  
Thermal characteristics  
Conditions  
Min  
Typ  
Max Unit  
-
-
0.65 K/W  
Rth(j-a)  
thermal resistance from junction to ambient  
SOT78  
vertical in free air  
-
-
60  
50  
-
-
K/W  
K/W  
SOT404  
mounted on a printed-circuit  
board; minimum footprint;  
vertical in still air  
5.1 Transient thermal impedance  
03ao09  
10  
Zth(j-mb)  
(K/W)  
1
= 0.5  
δ
0.2  
10-1  
0.1  
0.05  
tp  
P
δ =  
0.02  
T
single pulse  
10-2  
10-3  
t
tp  
T
10-5  
10-4  
10-3  
10-2  
10-1  
1
tp (s)  
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.  
9397 750 14003  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 01 — 8 November 2004  
4 of 13  
PHP/PHB33NQ20T  
Philips Semiconductors  
N-channel TrenchMOS™ standard level FET  
6. Characteristics  
Table 5:  
Characteristics  
Tj = 25 °C unless otherwise specified.  
Symbol Parameter  
Conditions  
Min  
Typ  
Max Unit  
Static characteristics  
V(BR)DSS drain-source breakdown voltage  
ID = 250 µA; VGS = 0 V  
Tj = 25 °C  
200  
180  
-
-
-
-
V
V
Tj = 55 °C  
VGS(th)  
gate-source threshold voltage  
drain-source leakage current  
ID = 1 mA; VDS = VGS; Figure 9 and 10  
Tj = 25 °C  
2
1
-
3
-
4
V
V
V
Tj = 175 °C  
-
Tj = 55 °C  
-
4.4  
IDSS  
VDS = 160 V; VGS = 0 V  
Tj = 25 °C  
-
-
-
-
1
µA  
µA  
nA  
Tj = 175 °C  
-
500  
100  
IGSS  
gate-source leakage current  
VGS = ±20 V; VDS = 0 V  
VGS = 10 V; ID = 15 A; Figure 6 and 8  
Tj = 25 °C  
10  
RDSon  
drain-source on-state resistance  
-
-
65  
77  
mΩ  
mΩ  
Tj = 175 °C  
182  
215  
Dynamic characteristics  
Qg(tot)  
Qgs  
Qgd  
Ciss  
Coss  
Crss  
td(on)  
tr  
total gate charge  
gate-source charge  
gate-drain (Miller) charge  
input capacitance  
output capacitance  
reverse transfer capacitance  
turn-on delay time  
rise time  
ID = 25 A; VDS = 100 V; VGS = 10 V;  
Figure 11  
-
-
-
-
-
-
-
-
-
-
32.2  
6.5  
9.6  
1870  
230  
70  
-
-
-
-
-
-
-
-
-
-
nC  
nC  
nC  
pF  
pF  
pF  
ns  
ns  
ns  
ns  
VGS = 0 V; VDS = 25 V; f = 1 MHz;  
Figure 13  
VDS = 100 V; RL = 4 ;  
12  
VGS = 10 V; RG = 6 Ω  
35  
td(off)  
tf  
turn-off delay time  
fall time  
43  
45  
Source-drain diode  
VSD  
trr  
source-drain (diode forward) voltage IS = 25 A; VGS = 0 V; Figure 12  
-
-
-
0.87 1.2  
V
reverse recovery time  
recovered charge  
IS = 20 A; dIS/dt = 100 A/µs; VGS = 0 V  
150  
645  
-
-
ns  
nC  
Qr  
9397 750 14003  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 01 — 8 November 2004  
5 of 13  
PHP/PHB33NQ20T  
Philips Semiconductors  
N-channel TrenchMOS™ standard level FET  
03ao11  
03ao12  
40  
125  
RDSon  
(m  
10 V 5 V  
T = 25  
j
C
T = 25 C  
°
j
°
ID  
)
(A)  
4.6 V  
VGS = 4.4 V  
4.6 V  
30  
100  
5 V  
4.4 V  
4.2 V  
20  
10  
0
75  
10 V  
50  
4 V  
VGS = 3.8 V  
25  
0
1
2
3
4
5
0
10  
20  
30  
40  
VDS (V)  
ID (A)  
Tj = 25 °C  
Tj = 25 °C  
Fig 5. Output characteristics: drain current as a  
function of drain-source voltage; typical values.  
Fig 6. Drain-source on-state resistance as a function  
of drain current; typical values.  
03ao13  
03al52  
40  
ID  
3
VDS > ID x RDSon  
(A)  
a
30  
2
20  
1
0
175  
C
°
T = 25 C  
°
j
10  
0
0
2
4
6
-60  
0
60  
120  
180  
VGS (V)  
Tj (°C)  
Tj = 25 °C and 175 °C; VDS > ID × RDSon  
RDSon  
a =  
----------------------------  
RDSon(25 C)  
°
Fig 7. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values.  
Fig 8. Normalized drain-source on-state resistance  
factor as a function of junction temperature.  
9397 750 14003  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 01 — 8 November 2004  
6 of 13  
PHP/PHB33NQ20T  
Philips Semiconductors  
N-channel TrenchMOS™ standard level FET  
03aa32  
03aa35  
5
VGS(th)  
(V)  
10-1  
ID  
(A)  
10-2  
4
max  
min  
typ  
max  
3
10-3  
10-4  
10-5  
10-6  
typ  
min  
2
1
0
-60  
0
60  
120  
180  
0
2
4
6
V
GS (V)  
T ( C)  
°
j
ID = 1 mA; VDS = VGS  
Tj = 25 °C; VDS = 5 V  
Fig 9. Gate-source threshold voltage as a function of  
junction temperature.  
Fig 10. Sub-threshold drain current as a function of  
gate-source voltage.  
03ao16  
10  
ID = 25 A  
T = 25  
VGS  
(V)  
C
°
j
8
6
4
2
0
100 V  
160 V  
VDS = 40 V  
0
10  
20  
30  
40  
Q
G (nC)  
ID = 25 A; VDS = 40 V, 100 V and 160 V  
Fig 11. Gate-source voltage as a function of gate charge; typical values.  
9397 750 14003  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 01 — 8 November 2004  
7 of 13  
PHP/PHB33NQ20T  
Philips Semiconductors  
N-channel TrenchMOS™ standard level FET  
03ao14  
03ao15  
40  
104  
VGS = 0 V  
IS  
C
(pF)  
(A)  
Ciss  
30  
103  
20  
10  
Coss  
102  
Crss  
175  
C
°
T = 25  
j
C
°
0
10  
10-1  
0
0.3  
0.6  
0.9  
1.2  
1
10  
102  
VDS (V)  
VSD (V)  
Tj = 25 °C and 175 °C; VGS = 0 V  
VGS = 0 V; f = 1 MHz  
Fig 12. Source (diode forward) current as a function of  
source-drain (diode forward) voltage; typical  
values.  
Fig 13. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values.  
9397 750 14003  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 01 — 8 November 2004  
8 of 13  
PHP/PHB33NQ20T  
Philips Semiconductors  
N-channel TrenchMOS™ standard level FET  
7. Package outline  
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB  
SOT78  
E
p
A
A
1
q
mounting  
base  
D
1
D
(1)  
L
L
2
1
Q
b
1
L
1
2
3
b
c
e
e
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
b
L
max.  
(1)  
2
e
A
b
D
E
L
D
L
1
A
1
c
UNIT  
p
q
Q
1
1
4.5  
4.1  
1.39  
1.27  
0.9  
0.6  
1.3  
1.0  
0.7  
0.4  
15.8  
15.2  
6.4  
5.9  
10.3  
9.7  
15.0  
13.5  
3.30  
2.79  
3.8  
3.6  
3.0  
2.7  
2.6  
2.2  
mm  
3.0  
2.54  
Note  
1. Terminals in this zone are not tinned.  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
01-02-16  
03-01-22  
SOT78  
3-lead TO-220AB  
SC-46  
Fig 14. SOT78 (TO-220AB) package outline.  
9397 750 14003  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 01 — 8 November 2004  
9 of 13  
PHP/PHB33NQ20T  
Philips Semiconductors  
N-channel TrenchMOS™ standard level FET  
2
Plastic single-ended surface mounted package (D -PAK); 3 leads (one lead cropped)  
SOT404  
A
A
E
1
mounting  
base  
D
1
D
H
D
2
L
p
1
3
c
b
e
e
Q
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
D
E
A
A
b
UNIT  
c
D
e
L
H
Q
1
1
p
D
max.  
4.50  
4.10  
1.40  
1.27  
0.85  
0.60  
0.64  
0.46  
1.60  
1.20  
10.30  
9.70  
2.90 15.80 2.60  
2.10 14.80 2.20  
mm  
11  
2.54  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
01-02-12  
04-10-13  
SOT404  
Fig 15. SOT404 (D2-PAK) package outline.  
9397 750 14003  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 01 — 8 November 2004  
10 of 13  
PHP/PHB33NQ20T  
Philips Semiconductors  
N-channel TrenchMOS™ standard level FET  
8. Revision history  
Table 6:  
Revision history  
Document ID  
Release Data sheet Change  
Doc. number  
Supersedes  
date  
20041108 Product  
data sheet  
status  
notice  
PHP_PHB33NQ20T_1  
-
9397 750 14003  
-
9397 750 14003  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 01 — 8 November 2004  
11 of 13  
PHP/PHB33NQ20T  
Philips Semiconductors  
N-channel TrenchMOS™ standard level FET  
9. Data sheet status  
Level Data sheet status[1] Product status[2] [3]  
Definition  
I
Objective data  
Development  
This data sheet contains data from the objective specification for product development. Philips  
Semiconductors reserves the right to change the specification in any manner without notice.  
II  
Preliminary data  
Qualification  
This data sheet contains data from the preliminary specification. Supplementary data will be published  
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in  
order to improve the design and supply the best possible product.  
III  
Product data  
Production  
This data sheet contains data from the product specification. Philips Semiconductors reserves the  
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant  
changes will be communicated via a Customer Product/Process Change Notification (CPCN).  
[1]  
[2]  
Please consult the most recently issued data sheet before initiating or completing a design.  
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at  
URL http://www.semiconductors.philips.com.  
[3]  
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
customers using or selling these products for use in such applications do so  
at their own risk and agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
10. Definitions  
Short-form specification The data in a short-form specification is  
extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Right to make changes — Philips Semiconductors reserves the right to  
make changes in the products - including circuits, standard cells, and/or  
software - described or contained herein in order to improve design and/or  
performance. When the product is in full production (status ‘Production’),  
relevant changes will be communicated via a Customer Product/Process  
Change Notification (CPCN). Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no  
license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are  
free from patent, copyright, or mask work right infringement, unless otherwise  
specified.  
Limiting values definition Limiting values given are in accordance with  
the Absolute Maximum Rating System (IEC 60134). Stress above one or  
more of the limiting values may cause permanent damage to the device.  
These are stress ratings only and operation of the device at these or at any  
other conditions above those given in the Characteristics sections of the  
specification is not implied. Exposure to limiting values for extended periods  
may affect device reliability.  
Application information Applications that are described herein for any  
of these products are for illustrative purposes only. Philips Semiconductors  
make no representation or warranty that such applications will be suitable for  
the specified use without further testing or modification.  
12. Trademarks  
TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V.  
11. Disclaimers  
Life support — These products are not designed for use in life support  
appliances, devices, or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors  
13. Contact information  
For additional information, please visit: http://www.semiconductors.philips.com  
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com  
9397 750 14003  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data sheet  
Rev. 01 — 8 November 2004  
12 of 13  
PHP/PHB33NQ20T  
Philips Semiconductors  
N-channel TrenchMOS™ standard level FET  
14. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
General description. . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1  
1.1  
1.2  
1.3  
1.4  
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4  
Transient thermal impedance . . . . . . . . . . . . . . 4  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 12  
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Contact information . . . . . . . . . . . . . . . . . . . . 12  
3
4
5
5.1  
6
7
8
9
10  
11  
12  
13  
© Koninklijke Philips Electronics N.V. 2004  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior  
written consent of the copyright owner. The information presented in this document does  
not form part of any quotation or contract, is believed to be accurate and reliable and may  
be changed without notice. No liability will be accepted by the publisher for any  
consequence of its use. Publication thereof does not convey nor imply any license under  
patent- or other industrial or intellectual property rights.  
Date of release: 8 November 2004  
Document number: 9397 750 14003  
Published in The Netherlands  

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PHP3N20E

PowerMOS transistor
NXP

PHP3N20E

Power Field-Effect Transistor, N-Channel, Metal-oxide Semiconductor FET,
PHILIPS