PMBF107-T [NXP]
TRANSISTOR 100 mA, 200 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, FET General Purpose Small Signal;型号: | PMBF107-T |
厂家: | NXP |
描述: | TRANSISTOR 100 mA, 200 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, FET General Purpose Small Signal 开关 光电二极管 晶体管 |
文件: | 总8页 (文件大小:59K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DISCRETE SEMICONDUCTORS
DATA SHEET
book, halfpage
PMBF107
N-channel enhancement mode
vertical D-MOS transistor
1998 Mar 06
Product specification
Supersedes data of April 1995
File under Discrete Semiconductors, SC13b
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
PMBF107
FEATURES
PINNING - SOT23
• Direct interface to C-MOS, TTL, etc.
• High-speed switching
PIN
SYMBOL
DESCRIPTION
1
2
3
g
s
d
gate
• No secondary breakdown.
source
drain
APPLICATIONS
• Relay, high-speed and line transformer drivers.
DESCRIPTION
d
s
3
N-channel enhancement mode vertical D-MOS transistor
in a SOT23 package, intended for use as a line current
interruptor in telephone sets.
g
1
2
CAUTION
MBB076 - 1
Top view
MSB003
This product is supplied in anti-static packing to prevent
damage caused by electrostatic discharge during
transport and handling. For further information, refer to
Philips specs.: SNW-EQ-608, SNW-FQ-302A and
SNW-FQ-302B.
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA
SYMBOL
VDS
PARAMETER
drain-source voltage
CONDITIONS
MAX.
200
UNIT
V
ID
drain current (DC)
100
28
mA
Ω
RDSon
VGSth
drain-source on-resistance
gate-source threshold voltage
ID = 20 mA; VGS = 2.6 V
ID = 1 mA; VGS = VDS
2.4
V
1998 Mar 06
2
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
PMBF107
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
drain-source voltage
CONDITIONS
MIN.
MAX.
200
UNIT
VDS
VGSO
ID
−
−
−
−
−
V
V
gate-source voltage
drain current (DC)
drain current
open drain
±20
100
250
250
+150
150
mA
mA
mW
°C
IDM
Ptot
Tstg
Tj
peak value
total power dissipation
storage temperature
junction temperature
Tamb = 25 °C; note 1
−65
−
°C
Note
1. Device mounted on an FR4 printed-circuit board.
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
VALUE
UNIT
Rth j-a
thermal resistance from junction to ambient; note 1
500
K/W
Note
1. Device mounted on an FR4 printed-circuit board.
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
VGS = 0; ID = 10 µA
MIN.
200
−
TYP.
MAX. UNIT
V(BR)DSS
IDSS
drain-source breakdown voltage
drain-source leakage current
drain cut-off current
−
−
V
VGS = 0; VDS = 130 V
VGS = 0.2 V; VDS = 70 V
VGS = ±15 V; VDS = 0;
VGS = VDS; ID = 1 mA
VGS = 2.6 V; ID = 20 mA
−
30
nA
µA
nA
V
IDSX
−
−
1
IGSS
gate-source leakage current
gate-source threshold voltage
drain-source on-state resistance
−
−
±10
2.4
28
−
VGSth
RDSon
0.8
−
−
20
14
170
50
16
4
Ω
V
GS = 10 V; ID = 150 mA
−
Ω
yfs
Ciss
Coss
Crss
transfer admittance
input capacitance
VDS = 15 V; ID = 250 mA
75
−
−
mS
pF
pF
pF
VGS = 0; VDS = 10 V; f = 1 MHz
VGS = 0; VDS = 10 V; f = 1 MHz
VGS = 0; VDS = 10 V; f = 1 MHz
65
25
10
output capacitance
feedback capacitance
−
−
Switching times (see Figs 2 and 3)
ton
turn-on time
VGS = 0 to 10 V; VDD = 50 V;
ID = 250 mA
−
−
2
5
10
20
ns
ns
toff
turn-off time
VGS = 0 to 10 V; VDD = 50 V;
ID = 200 mA
1998 Mar 06
3
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
PMBF107
handbook, halfpage
INPUT
90 %
V
= 50 V
handbook, halfpage
DD
10 %
90 %
10 V
0 V
OUTPUT
I
D
10 %
50 Ω
t
t
off
on
MBB691
MBB692
Fig.2 Switching time test circuit.
Fig.3 Input and output waveforms.
MDA783
MDA782
300
300
handbook, halfpage
handbook, halfpage
V
= 10 V
I
GS
P
D
tot
5 V
4 V
(mA)
(mW)
3 V
200
200
100
100
0
0
0
0
4
8
12
16
50
100
150
T
200
(°C)
V
(V)
DS
amb
Fig.4 Power derating curve.
Fig.5 Typical output characteristics; Tj = 25 °C.
1998 Mar 06
4
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
PMBF107
MDA702
MDA784
30
300
handbook, halfpage
handbook, halfpage
R
DSon
(Ω)
I
4 V
V
= 3 V
D
GS
26
(mA)
5 V
200
22
10 V
18
14
100
10
1
0
3
2
10
10
10
0
1
2
3
4
I
(mA)
V
(V)
D
GS
Fig.6 Typical transfer characteristic;
Fig.7 Typical on-resistance as a function of
VDS = 10 V; Tj = 25 °C.
drain current; Tj = 25 °C.
MDA703
60
handbook, halfpage
C
(pF)
40
20
C
C
iss
oss
rss
C
0
0
10
20
30
V
(V)
DS
Fig.8 Typical capacitances as a function of
drain-source voltage; VGS = 0; f = 1 MHz;
Tj = 25 °C.
1998 Mar 06
5
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
PMBF107
PACKAGE OUTLINE
Plastic surface mounted package; 3 leads
SOT23
D
B
E
A
X
H
v
M
A
E
3
Q
A
A
1
c
1
2
e
1
b
p
w M
B
L
p
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
UNIT
b
p
c
D
E
e
e
H
L
Q
v
w
A
p
1
E
max.
1.1
0.9
0.48
0.38
0.15
0.09
3.0
2.8
1.4
1.2
2.5
2.1
0.45
0.15
0.55
0.45
mm
0.1
1.9
0.95
0.2
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
97-02-28
SOT23
1998 Mar 06
6
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
PMBF107
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1998 Mar 06
7
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© Philips Electronics N.V. 1997
SCA54
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Printed in The Netherlands
135108/00/03/pp8
Date of release: 1998 Mar 06
Document order number: 9397 750 03369
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