PSMN4R8-100BSEJ [NXP]
PSMN4R8-100BSE - N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK D2PAK 3-Pin;型号: | PSMN4R8-100BSEJ |
厂家: | NXP |
描述: | PSMN4R8-100BSE - N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK D2PAK 3-Pin |
文件: | 总13页 (文件大小:259K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
K
A
P
2
PSMN4R8-100BSE
N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK
D
12 April 2013
Product data sheet
1. General description
Standard level N-channel MOSFET in a D2PAK package qualified to 175 °C. Part of
NXP's "NextPower Live" portfolio, the PSMN4R8-100BSE complements the latest "hot-
swap" controllers - robust enough to withstand substantial inrush currents during turn on,
whilst offering a low RDS(on) characteristic to keep temperatures down and efficiency up in
continued use. Ideal for telecommunication systems based on a 48 V backplane / supply
rail.
2. Features and benefits
Enhanced forward biased safe operating area for superior linear mode operation
Very low RDS(on) for low conduction losses
•
•
3. Applications
Electronic fuse
Hot swap
Load switch
Soft start
•
•
•
•
4. Quick reference data
Table 1.
Symbol
Quick reference data
Parameter
Conditions
Min
Typ
Max
100
707
405
Unit
V
VDS
IDM
Ptot
drain-source voltage
peak drain current
Tj ≥ 25 °C; Tj ≤ 175 °C
pulsed; Tmb = 25 °C; tp ≤ 10 µs; Fig. 4
-
-
-
-
-
-
A
total power dissipation Tmb = 25 °C; Fig. 2
W
Static characteristics
RDSon drain-source on-state
resistance
Dynamic characteristics
VGS = 10 V; ID = 25 A; Tj = 25 °C;
Fig. 12
-
4.1
4.8
mΩ
QGD
gate-drain charge
total gate charge
VGS = 10 V; ID = 25 A; VDS = 50 V;
Fig. 14; Fig. 15
-
-
59
83
nC
nC
QG(tot)
196
278
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NXP Semiconductors
PSMN4R8-100BSE
N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK
Symbol
Avalanche Ruggedness
EDS(AL)S non-repetitive drain-
Parameter
Conditions
Min
Typ
Max
Unit
VGS = 10 V; Tj(init) = 25 °C; ID = 120 A;
Vsup ≤ 100 V; RGS = 50 Ω; unclamped;
Fig. 3
-
-
542
mJ
source avalanche
energy
5. Pinning information
Table 2.
Pin
Pinning information
Symbol Description
Simplified outline
Graphic symbol
mb
D
S
1
G
D
S
D
gate
2
drain[1]
source
G
3
mbb076
mb
mounting base; connected to
drain
2
1
3
D2PAK (SOT404)
[1] It is not possible to make connection to pin 2
6. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
PSMN4R8-100BSE
D2PAK
plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404
(one lead cropped)
7. Marking
Table 4.
Marking codes
Type number
Marking code
PSMN4R8-100BSE
PSMN4R8-100BSE
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
Max
100
100
20
Unit
V
drain-source voltage
drain-gate voltage
gate-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ
-
VDGR
-
V
VGS
-20
V
PSMN4R8-100BSE
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Product data sheet
12 April 2013
2 / 13
NXP Semiconductors
PSMN4R8-100BSE
N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK
Symbol
Parameter
Conditions
Min
Max
120
120
707
405
175
175
260
Unit
A
ID
drain current
VGS = 10 V; Tj = 25 °C; Fig. 1
VGS = 10 V; Tmb = 100 °C; Fig. 1
pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 4
Tmb = 25 °C; Fig. 2
[1]
[1]
-
-
A
IDM
peak drain current
-
A
Ptot
Tstg
Tj
total power dissipation
storage temperature
junction temperature
peak soldering temperature
-
W
°C
°C
°C
-55
-55
-
Tsld(M)
Source-drain diode
IS
source current
peak source current
Tmb = 25 °C
[1]
-
-
120
707
A
A
ISM
pulsed; tp ≤ 10 µs; Tmb = 25 °C
Avalanche Ruggedness
EDS(AL)S non-repetitive drain-source
avalanche energy
VGS = 10 V; Tj(init) = 25 °C; ID = 120 A;
Vsup ≤ 100 V; RGS = 50 Ω; unclamped;
Fig. 3
-
542
mJ
[1] Continuous current limited by package.
03aa16
003aaj964
120
200
I
D
(A)
P
der
(%)
160
80
(1)
120
80
40
0
40
0
0
50
100
150
200
0
50
100
150
200
T
( C)
°
T
(°C)
mb
mb
(1) Capped at 120A due to package
Fig. 2. Normalized total power dissipation as a
function of mounting base temperature
Fig. 1. Continuous drain current as a function of
mounting base temperature
PSMN4R8-100BSE
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Product data sheet
12 April 2013
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NXP Semiconductors
PSMN4R8-100BSE
N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK
003aaj965
3
2
10
10
I
AL
(A)
(1)
(2)
10
1
10
-3
-2
-1
10
10
1
AL
10
t
(ms)
Fig. 3. Single pulse avalanche rating; avalanche current as a function of avalanche time
003aaj966
104
ID
(A)
103
Limit R
= V / I
DS D
DSon
t =10
s
µ
s
102
10
p
100
µ
1 ms
DC
10 ms
100 ms
1
10-1
10-1
1
10
102
103
V
(V)
DS
Fig. 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
9. Thermal characteristics
Table 6.
Symbol
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Rth(j-mb)
thermal resistance
from junction to
mounting base
Fig. 5
-
0.3
0.37
K/W
Rth(j-a)
thermal resistance
from junction to
ambient
Minimum footprint; mounted on a
printed circuit board
-
50
-
K/W
PSMN4R8-100BSE
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© NXP B.V. 2013. All rights reserved
Product data sheet
12 April 2013
4 / 13
NXP Semiconductors
PSMN4R8-100BSE
N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK
003aaj353
1
Z
th(j-mb)
(K/W)
= 0.5
δ
10-1
0.2
0.1
0.05
tp
P
δ=
10-2
T
0.02
t
tp
single shot
T
10-3
10-6
10-5
10-4
10-3
10-2
10-1
1
t (s)
p
Fig. 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
10. Characteristics
Table 7.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
100
90
2
-
-
V
V
V
-
-
VGS(th)
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C;
voltage
3
4
Fig. 10; Fig. 11
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 175 °C;
VGSth
1
-
-
-
-
V
V
voltage
Fig. 11
ID = 1 mA; VDS = VGS; Tj = -55 °C;
Fig. 11
4.6
IDSS
drain leakage current
gate leakage current
VDS = 100 V; VGS = 0 V; Tj = 25 °C
VDS = 100 V; VGS = 0 V; Tj = 175 °C
VGS = -20 V; VDS = 0 V; Tj = 25 °C
VGS = 20 V; VDS = 0 V; Tj = 25 °C
-
-
-
-
-
0.16
-
10
µA
µA
nA
nA
mΩ
500
100
100
4.8
IGSS
10
10
4.1
RDSon
drain-source on-state
resistance
VGS = 10 V; ID = 25 A; Tj = 25 °C;
Fig. 12
VGS = 10 V; ID = 25 A; Tj = 100 °C;
Fig. 13; Fig. 12
-
-
8.7
13
mΩ
mΩ
Ω
VGS = 10 V; ID = 25 A; Tj = 175 °C;
Fig. 12; Fig. 13
-
-
RG
gate resistance
f = 1 MHz
0.43
0.85
1.7
PSMN4R8-100BSE
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Product data sheet
12 April 2013
5 / 13
NXP Semiconductors
PSMN4R8-100BSE
N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Dynamic characteristics
QG(tot)
total gate charge
ID = 25 A; VDS = 50 V; VGS = 10 V;
Fig. 14; Fig. 15
-
196
278
nC
ID = 0 A; VDS = 0 V; VGS = 10 V
-
-
-
-
166.9 234
nC
nC
nC
V
QGS
gate-source charge
gate-drain charge
ID = 25 A; VDS = 50 V; VGS = 10 V;
Fig. 14; Fig. 15
40
59
4.3
56
83
-
QGD
VGS(pl)
gate-source plateau
voltage
ID = 25 A; VDS = 50 V; Fig. 14; Fig. 15
Ciss
Coss
Crss
input capacitance
output capacitance
VDS = 50 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; Fig. 16
-
-
-
10665 14400 pF
674
459
910
643
pF
pF
reverse transfer
capacitance
td(on)
tr
td(off)
tf
turn-on delay time
rise time
VDS = 50 V; RL = 2 Ω; VGS = 10 V;
RG(ext) = 4.7 Ω
-
-
-
-
41
61.5
97.5
ns
ns
65
turn-off delay time
fall time
127
69
190.5 ns
103.5 ns
Source-drain diode
VSD source-drain voltage
trr
IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 17
-
-
-
0.79
72
1.2
94
V
reverse recovery time IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V;
ns
nC
VDS = 50 V
Qr
recovered charge
227
296
003aaj968
003aaj969
120
20
10
6
R
I
DSon
D
5.5
(m
)
Ω
(A)
15
10
5
80
5
40
4.5
V
(V) = 4
GS
V
0
0
0
1
2
3
4
0
4
8
12
16
(V)
V
(V)
DS
GS
Fig. 6. Output characteristics; drain current as a
function of drain-source voltage; typical values
Fig. 7. Drain-source on-state resistance as a function
of gate-source voltage; typical values
PSMN4R8-100BSE
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Product data sheet
12 April 2013
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NXP Semiconductors
PSMN4R8-100BSE
N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK
003aaj970
003aaj971
200
300
I
g
D
fs
(A)
(S)
160
240
120
80
40
0
180
120
60
T = 25 C
°
T = 150
C
°
j
j
0
0
60
120
180
240
300
0
2
4
6
8
V
(V)
I
(A)
GS
D
Fig. 9. Transfer characteristics; drain current as a
function of gate-source voltage; typical values
Fig. 8. Forward transconductance as a function of
drain current; typical values
03aa35
003aad280
- 1
10
5
I
V
D
GS(th)
(A)
(V)
min
typ
max
- 2
- 3
- 4
- 5
- 6
10
10
10
10
10
4
max
3
typ
2
min
1
0
0
2
4
6
- 60
0
60
120
180
V
(V)
T (°C)
j
GS
Fig. 10. Sub-threshold drain current as a function of
gate-source voltage
Fig. 11. Gate-source threshold voltage as a function of
junction temperature
PSMN4R8-100BSE
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Product data sheet
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NXP Semiconductors
PSMN4R8-100BSE
N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK
003aad774
003aaj974
30
3.2
4.5
5
5.5
R
DSon
a
(m
)
Ω
2.4
20
10
0
1.6
0.8
0
6
V
(V) = 10
GS
-60
0
60
120
180
0
40
80
120
T (°C)
j
I (A)
D
Fig. 12. Drain-source on-state resistance as a function Fig. 13. Normalized drain-source on-state resistance
of drain current; typical values
factor as a function of junction temperature
003aaj976
10
V
DS
V
GS
(V)
I
D
8
6
4
2
0
20 V
V
80 V
GS(pl)
V
GS(th)
GS
V
= 50V
DS
V
Q
Q
GS1
GS2
Q
Q
GD
GS
Q
G(tot)
003aaa508
Fig. 14. Gate charge waveform definitions
0
50
100
150
200
Q
250
(nC)
G
Fig. 15. Gate-source voltage as a function of gate
charge; typical values
PSMN4R8-100BSE
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Product data sheet
12 April 2013
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NXP Semiconductors
PSMN4R8-100BSE
N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK
105
120
003aaj977
003aaj978
I
S
C
(pF)
(A)
C
iss
104
103
102
80
T = 175 C
°
j
C
40
oss
T = 25
C
°
j
C
rss
0
10-1
1
10
102
0
0.3
0.6
0.9
1.2
V
(V)
V
(V)
SD
DS
Fig. 16. Input, output and reverse transfer capacitances Fig. 17. Source current as a function of source-drain
as a function of drain-source voltage; typical
values
voltage; typical values
PSMN4R8-100BSE
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Product data sheet
12 April 2013
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NXP Semiconductors
PSMN4R8-100BSE
N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK
11. Package outline
Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)
SOT404
A
A
E
1
mounting
base
D
1
D
H
D
2
L
p
1
3
c
b
b
2
e
e
Q
0
5 mm
scale
Dimensions (mm are the original dimensions)
Unit
A
A
b
b
c
D
D
1
E
e
H
D
L
p
Q
1
2
max 4.5 1.40 0.85 1.45 0.64 11
nom
min 4.1 1.27 0.60 1.05 0.46
1.6 10.3
1.2 9.7
15.8 2.9 2.6
14.8 2.1 2.2
2.54
mm
sot404_po
References
Outline
version
European
projection
Issue date
IEC
JEDEC
JEITA
06-03-16
13-02-25
SOT404
Fig. 18. Package outline D2PAK (SOT404)
PSMN4R8-100BSE
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Product data sheet
12 April 2013
10 / 13
NXP Semiconductors
PSMN4R8-100BSE
N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation -
lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
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Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Document
Product
Definition
status [1][2] status [3]
Objective
[short] data
sheet
Development This document contains data from
the objective specification for product
development.
Right to make changes — NXP Semiconductors reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Preliminary
[short] data
sheet
Qualification This document contains data from the
preliminary specification.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
Product
[short] data
sheet
Production
This document contains the product
specification.
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the Internet at URL http://www.nxp.com.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Applications — Applications that are described herein for any of these
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representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
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Preview — The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
NXP Semiconductors does not give any representations or warranties as to
the accuracy or completeness of information included herein and shall have
no liability for the consequences of use of such information.
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applications and products using NXP Semiconductors products, and NXP
Semiconductors accepts no liability for any assistance with applications or
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customer’s applications and products planned, as well as for the planned
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associated with their applications and products.
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representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
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damage, costs or problem which is based on any weakness or default
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is deemed to offer functions and qualities beyond those described in the
Product data sheet.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
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Characteristics sections of this document is not warranted. Constant or
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Limited warranty and liability — Information in this document is believed
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or construed as an offer to sell products that is open for acceptance or the
PSMN4R8-100BSE
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved
Product data sheet
12 April 2013
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NXP Semiconductors
PSMN4R8-100BSE
N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK
grant, conveyance or implication of any license under any copyrights, patents
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standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
12.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
PSMN4R8-100BSE
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved
Product data sheet
12 April 2013
12 / 13
NXP Semiconductors
PSMN4R8-100BSE
N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK
13. Contents
1
General description ............................................... 1
2
Features and benefits ............................................1
Applications ........................................................... 1
Quick reference data ............................................. 1
Pinning information ...............................................2
Ordering information .............................................2
Marking ...................................................................2
Limiting values .......................................................2
Thermal characteristics .........................................4
Characteristics .......................................................5
Package outline ................................................... 10
3
4
5
6
7
8
9
10
11
12
Legal information .................................................11
Data sheet status ............................................... 11
Definitions ...........................................................11
Disclaimers .........................................................11
Trademarks ........................................................ 12
12.1
12.2
12.3
12.4
© NXP B.V. 2013. All rights reserved
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 12 April 2013
PSMN4R8-100BSE
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved
Product data sheet
12 April 2013
13 / 13
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