PSMN7R6-60BS [NXP]

92A, 60V, 0.0078ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, D2PAK-3;
PSMN7R6-60BS
型号: PSMN7R6-60BS
厂家: NXP    NXP
描述:

92A, 60V, 0.0078ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, D2PAK-3

开关 脉冲 晶体管
文件: 总14页 (文件大小:201K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PSMN7R6-60BS  
AK  
D2P  
N-channel 60 V 7.8 mstandard level MOSFET in D2PAK  
Rev. 2 — 2 March 2012  
Product data sheet  
1. Product profile  
1.1 General description  
Standard level N-channel MOSFET in a D2PAK package qualified to 175 °C. This product  
is designed and qualified for use in a wide range of industrial, communications and  
domestic equipment.  
1.2 Features and benefits  
High efficiency due to low switching  
Suitable for standard level gate drive  
and conduction losses  
sources  
1.3 Applications  
DC-to-DC converters  
Load switching  
Motor control  
Server power supplies  
1.4 Quick reference data  
Table 1.  
Symbol  
VDS  
Quick reference data  
Parameter  
Conditions  
Min  
Typ  
Max  
60  
Unit  
V
drain-source voltage  
drain current  
Tj 25 °C; Tj 175 °C  
Tmb = 25 °C; VGS = 10 V; see Figure 1  
-
-
-
-
-
ID  
-
92  
A
Ptot  
total power dissipation Tmb = 25 °C; see Figure 2  
junction temperature  
-
149  
175  
W
Tj  
-55  
°C  
Static characteristics  
RDSon drain-source on-state  
resistance  
Dynamic characteristics  
VGS = 10 V; ID = 25 A; Tj = 25 °C;  
see Figure 13; see Figure 9  
-
5.9  
7.8  
mΩ  
QGD  
gate-drain charge  
VGS = 10 V; ID = 25 A; VDS = 30 V;  
see Figure 15; see Figure 14  
-
-
10.6  
38.7  
-
-
nC  
nC  
QG(tot)  
total gate charge  
VGS = 10 V; ID = 25 A; VDS = 30 V;  
see Figure 14; see Figure 15  
Avalanche ruggedness  
EDS(AL)S non-repetitive  
VGS = 10 V; Tj(init) = 25 °C; ID = 92 A;  
-
-
110  
mJ  
drain-source  
Vsup 100 V; RGS = 50 ; unclamped  
avalanche energy  
 
 
 
 
 
PSMN7R6-60BS  
NXP Semiconductors  
N-channel 60 V 7.8 mstandard level MOSFET in D2PAK  
2. Pinning information  
Table 2.  
Pinning information  
Symbol Description  
Pin  
1
Simplified outline  
Graphic symbol  
G
D
S
D
gate  
drain[1]  
mb  
D
S
2
3
source  
G
mb  
mounting base; connected to  
drain  
mbb076  
2
1
3
SOT404 (D2PAK)  
[1] It is not possible to make connection to pin 2.  
3. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
PSMN7R6-60BS  
D2PAK  
plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404  
(one lead cropped)  
4. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Max  
60  
Unit  
V
drain-source voltage  
drain-gate voltage  
gate-source voltage  
drain current  
Tj 25 °C; Tj 175 °C  
RGS = 20 kΩ  
-
VDGR  
VGS  
-
60  
V
-20  
20  
V
ID  
VGS = 10 V; Tmb = 100 °C; see Figure 1  
VGS = 10 V; Tmb = 25 °C; see Figure 1  
-
-
-
65  
A
92  
A
IDM  
peak drain current  
pulsed; tp 10 µs; Tmb = 25 °C;  
389  
A
see Figure 3  
Ptot  
Tstg  
Tj  
total power dissipation  
storage temperature  
Tmb = 25 °C; see Figure 2  
-
149  
175  
175  
260  
W
-55  
-55  
-
°C  
°C  
°C  
junction temperature  
Tsld(M)  
peak soldering temperature  
Source-drain diode  
IS  
source current  
peak source current  
Tmb = 25 °C  
-
-
92  
A
A
ISM  
pulsed; tp 10 µs; Tmb = 25 °C  
389  
Avalanche ruggedness  
EDS(AL)S  
non-repetitive drain-source  
avalanche energy  
VGS = 10 V; Tj(init) = 25 °C; ID = 92 A;  
Vsup 100 V; RGS = 50 ; unclamped  
-
110  
mJ  
PSMN7R6-60BS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 2 March 2012  
2 of 14  
 
 
 
 
PSMN7R6-60BS  
NXP Semiconductors  
N-channel 60 V 7.8 mstandard level MOSFET in D2PAK  
03aa16  
003aad661  
120  
100  
I
D
(A)  
P
der  
(%)  
80  
60  
40  
20  
0
80  
40  
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
T
mb  
(°C)  
T
(°C)  
mb  
Fig 1. Continuous drain current as a function of  
mounting base temperature  
Fig 2. Normalized total power dissipation as a  
function of mounting base temperature  
003aad700  
3
10  
I
D
Limit R  
= V / I  
DS D  
(A)  
DSon  
2
10 μs  
10  
100 μs  
10  
DC  
1 ms  
10 ms  
100 ms  
1
1  
10  
10  
2  
2
1
10  
10  
V
(V)  
DS  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage  
PSMN7R6-60BS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 2 March 2012  
3 of 14  
PSMN7R6-60BS  
NXP Semiconductors  
N-channel 60 V 7.8 mstandard level MOSFET in D2PAK  
5. Thermal characteristics  
Table 5.  
Symbol  
Rth(j-mb)  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
thermal resistance from junction to see Figure 4  
mounting base  
-
0.49  
1.01  
K/W  
Rth(j-a)  
thermal resistance from junction to Minimum footprint; mounted on a  
-
50  
-
K/W  
ambient  
printed circuit board  
003aad662  
1
Z
th  
δ = 0.5  
(K/W)  
0.2  
1  
2  
10  
0.1  
0.02  
0.05  
t
p
single shot  
P
δ =  
T
10  
t
t
p
T
3  
10  
3  
2  
6  
5  
4  
1  
10  
10  
10  
1
10  
10  
10  
t
(s)  
p
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration  
PSMN7R6-60BS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 2 March 2012  
4 of 14  
 
 
PSMN7R6-60BS  
NXP Semiconductors  
N-channel 60 V 7.8 mstandard level MOSFET in D2PAK  
6. Characteristics  
Table 6.  
Symbol  
Characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
V(BR)DSS  
drain-source  
breakdown voltage  
ID = 250 µA; VGS = 0 V; Tj = -55 °C  
ID = 250 µA; VGS = 0 V; Tj = 25 °C  
54  
60  
2
-
-
V
V
V
-
-
VGS(th)  
VGSth  
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C;  
voltage see Figure 10; see Figure 11  
3
4
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 175 °C;  
voltage  
1
-
-
-
-
V
V
see Figure 11  
ID = 1 mA; VDS = VGS; Tj = -55 °C;  
see Figure 11  
4.6  
IDSS  
drain leakage current  
gate leakage current  
VDS = 60 V; VGS = 0 V; Tj = 25 °C  
VDS = 60 V; VGS = 0 V; Tj = 125 °C  
VGS = 20 V; VDS = 0 V; Tj = 25 °C  
VGS = -20 V; VDS = 0 V; Tj = 25 °C  
-
-
-
-
-
0.05  
10  
µA  
µA  
nA  
nA  
mΩ  
-
100  
100  
100  
18  
IGSS  
2
2
RDSon  
drain-source on-state  
resistance  
VGS = 10 V; ID = 25 A; Tj = 175 °C;  
see Figure 12  
13.3  
VGS = 10 V; ID = 25 A; Tj = 25 °C;  
see Figure 13; see Figure 9  
-
-
5.9  
7.8  
-
mΩ  
RG  
gate resistance  
f = 1 MHz  
0.98  
Dynamic characteristics  
QG(tot)  
QGS  
total gate charge  
ID = 25 A; VDS = 30 V; VGS = 10 V;  
see Figure 14; see Figure 15  
-
-
-
38.7  
12.9  
6.9  
-
-
-
nC  
nC  
nC  
gate-source charge  
QGS(th)  
pre-threshold  
gate-source charge  
QGS(th-pl)  
QGD  
VGS(pl)  
Ciss  
post-threshold  
gate-source charge  
-
-
-
-
-
-
6
-
-
-
-
-
-
nC  
nC  
V
gate-drain charge  
ID = 25 A; VDS = 30 V; VGS = 10 V;  
see Figure 15; see Figure 14  
10.6  
5.6  
gate-source plateau  
voltage  
ID = 25 A; VDS = 30 V; see Figure 14;  
see Figure 15  
input capacitance  
VDS = 30 V; VGS = 0 V; f = 1 MHz;  
Tj = 25 °C; see Figure 16; see Figure 8  
2651  
342  
183  
pF  
pF  
pF  
Coss  
output capacitance  
VDS = 30 V; VGS = 0 V; f = 1 MHz;  
Tj = 25 °C; see Figure 16  
Crss  
reverse transfer  
capacitance  
VDS = 30 V; VGS = 0 V; f = 1 MHz;  
Tj = 25 °C; see Figure 16; see Figure 8  
td(on)  
tr  
td(off)  
tf  
turn-on delay time  
rise time  
VDS = 30 V; RL = 1.2 ; VGS = 10 V;  
RG(ext) = 4.7 Ω  
-
-
-
-
19  
21  
37  
13  
-
-
-
-
ns  
ns  
ns  
ns  
turn-off delay time  
fall time  
PSMN7R6-60BS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 2 March 2012  
5 of 14  
 
PSMN7R6-60BS  
NXP Semiconductors  
N-channel 60 V 7.8 mstandard level MOSFET in D2PAK  
Table 6.  
Symbol  
Characteristics …continued  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Source-drain diode  
VSD  
source-drain voltage  
IS = 25 A; VGS = 0 V; Tj = 25 °C;  
see Figure 17  
-
0.86  
1.2  
V
trr  
reverse recovery time IS = 25 A; dIS/dt = 100 A/µs; VGS = 0 V;  
-
-
40.4  
56  
-
-
ns  
VDS = 30 V  
Qr  
recovered charge  
nC  
003aad663  
003aad669  
100  
160  
6.0  
15  
10  
I
D
g
fs  
5.5  
5.0  
(A)  
(S)  
8.0  
80  
60  
40  
20  
0
120  
80  
40  
0
V
(V) = 4.5  
1.5  
GS  
0
0.5  
1
2
0
20  
40  
60  
80  
100  
V
(V)  
DS  
I
D
(A)  
Fig 5. Output characteristics: drain current as a  
function of drain-source voltage; typical values  
Fig 6. Forward transconductance as a function of  
drain current; typical values  
003aad665  
003aad664  
100  
4000  
C
iss  
I
D
C
(A)  
80  
(pF)  
3000  
60  
40  
C
rss  
2000  
1000  
0
T = 25 °C  
T = 175 °C  
j
j
20  
0
0
2
4
6
0
5
10  
15  
20  
V
GS  
(V)  
V
(V)  
GS  
Fig 7. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values  
Fig 8. Input and reverse transfer capacitances as a  
function of gate-source voltage; typical values  
PSMN7R6-60BS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 2 March 2012  
6 of 14  
PSMN7R6-60BS  
NXP Semiconductors  
N-channel 60 V 7.8 mstandard level MOSFET in D2PAK  
03aa35  
003aad666  
1  
10  
20  
I
R
D
DSon  
(A)  
(mΩ)  
min  
typ  
max  
2  
3  
4  
5  
6  
10  
10  
10  
10  
10  
16  
12  
8
4
0
0
5
10  
15  
20  
0
2
4
6
V
GS  
(V)  
V
(V)  
GS  
Fig 9. Drain-source on-state resistance as a function  
of gate-source voltage; typical values  
Fig 10. Sub-threshold drain current as a function of  
gate-source voltage  
003aad280  
003aad696  
5
2.4  
V
a
GS(th)  
(V)  
2
4
3
2
1
0
max  
1.6  
1.2  
0.8  
0.4  
0
typ  
min  
60  
0
60  
120  
180  
-60  
0
60  
120  
180  
T ( C)  
°
T (°C)  
j
j
Fig 11. Gate-source threshold voltage as a function of  
junction temperature  
Fig 12. Normalized drain-source on-state resistance  
factor as a function of junction temperature  
PSMN7R6-60BS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 2 March 2012  
7 of 14  
PSMN7R6-60BS  
NXP Semiconductors  
N-channel 60 V 7.8 mstandard level MOSFET in D2PAK  
003aad667  
003aad671  
30  
10  
4.5  
5.0  
5.5  
V
GS  
R
(V)  
DSon  
30 V  
(mΩ)  
8
6
4
2
0
V
= 12 V  
DS  
48 V  
20  
6.0  
10  
V
(V) = 15  
10.0  
8.0  
GS  
0
0
10  
20  
30  
40  
50  
0
20  
40  
60  
80  
100  
I
(A)  
D
Q
G
(nC)  
Fig 13. Drain-source on-state resistance as a function  
of drain current; typical values  
Fig 14. Gate-source voltage as a function of gate  
charge; typical values  
003aad668  
4
10  
C
(pF)  
V
DS  
C
iss  
I
D
3
V
GS(pl)  
10  
V
GS(th)  
GS  
C
oss  
V
Q
Q
GS1  
GS2  
C
rss  
Q
Q
GD  
GS  
Q
2
G(tot)  
10  
2  
1  
2
10  
10  
1
10  
10  
003aaa508  
V
(V)  
DS  
Fig 15. Gate charge waveform definitions  
Fig 16. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values  
PSMN7R6-60BS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 2 March 2012  
8 of 14  
PSMN7R6-60BS  
NXP Semiconductors  
N-channel 60 V 7.8 mstandard level MOSFET in D2PAK  
003aad670  
100  
I
S
(A)  
80  
60  
40  
20  
0
T = 175 °C  
T = 25 °C  
j
j
0
0.3  
0.6  
0.9  
1.2  
V
SD  
(V)  
Fig 17. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values  
PSMN7R6-60BS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 2 March 2012  
9 of 14  
PSMN7R6-60BS  
NXP Semiconductors  
N-channel 60 V 7.8 mstandard level MOSFET in D2PAK  
7. Package outline  
Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)  
SOT404  
A
A
E
1
mounting  
base  
D
1
D
H
D
2
L
p
1
3
c
b
e
e
Q
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
D
E
A
A
b
UNIT  
c
D
e
L
H
Q
1
1
p
D
max.  
4.50  
4.10  
1.40  
1.27  
0.85  
0.60  
0.64  
0.46  
1.60  
1.20  
10.30  
9.70  
2.90 15.80 2.60  
2.10 14.80 2.20  
mm  
11  
2.54  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
05-02-11  
06-03-16  
SOT404  
Fig 18. Package outline SOT404 (D2PAK)  
PSMN7R6-60BS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 2 March 2012  
10 of 14  
 
PSMN7R6-60BS  
NXP Semiconductors  
N-channel 60 V 7.8 mstandard level MOSFET in D2PAK  
8. Revision history  
Table 7.  
Revision history  
Document ID  
Release date  
Data sheet status  
Change notice  
Supersedes  
PSMN7R6-60BS v.2  
Modifications:  
20120302  
Product data sheet  
-
PSMN7R6-60BS v.1  
Status changed from objective to product.  
Various changes to content.  
PSMN7R6-60BS v.1  
20111020  
Objective data sheet  
-
-
PSMN7R6-60BS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 2 March 2012  
11 of 14  
 
PSMN7R6-60BS  
NXP Semiconductors  
N-channel 60 V 7.8 mstandard level MOSFET in D2PAK  
9. Legal information  
9.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Definition  
Objective [short] data sheet  
Development  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term 'short data sheet' is explained in section "Definitions".  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product  
status information is available on the Internet at URLhttp://www.nxp.com.  
Right to make changes— NXP Semiconductors reserves the right to make  
9.2 Definitions  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Preview— The document is a preview version only. The document is still  
subject to formal approval, which may result in modifications or additions.  
NXP Semiconductors does not give any representations or warranties as to  
the accuracy or completeness of information included herein and shall have  
no liability for the consequences of use of such information.  
Suitability for use— NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors and its suppliers accept no liability for  
inclusion and/or use of NXP Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at the customer’s own  
risk.  
Draft— The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet— A short data sheet is an extract from a full data sheet with  
the same product type number(s) and title. A short data sheet is intended for  
quick reference only and should not be relied upon to contain detailed and full  
information. For detailed and full information see the relevant full data sheet,  
which is available on request via the local NXP Semiconductors sales office.  
In case of any inconsistency or conflict with the short data sheet, the full data  
sheet shall prevail.  
Quick reference data— The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Applications— Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Product specification— The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
9.3 Disclaimers  
Limited warranty and liability— Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information. NXP Semiconductors takes no  
responsibility for the content in this document if provided by an information  
source outside of NXP Semiconductors.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Limiting values— Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with theTerms and conditions of commercial saleof NXP Semiconductors.  
PSMN7R6-60BS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 2 March 2012  
12 of 14  
 
 
 
 
 
 
 
PSMN7R6-60BS  
NXP Semiconductors  
N-channel 60 V 7.8 mstandard level MOSFET in D2PAK  
Terms and conditions of commercial sale— NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published athttp://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards, customer  
(a) shall use the product without NXP Semiconductors’ warranty of the  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
NXP Semiconductors’ specifications such use shall be solely at customer’s  
own risk, and (c) customer fully indemnifies NXP Semiconductors for any  
liability, damages or failed product claims resulting from customer design and  
use of the product for automotive applications beyond NXP Semiconductors’  
standard warranty and NXP Semiconductors’ product specifications.  
No offer to sell or license— Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Translations— A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
Export control— This document as well as the item(s) described herein may  
be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
9.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
Non-automotive qualified products— Unless this data sheet expressly  
states that this specific NXP Semiconductors product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor tested  
in accordance with automotive testing or application requirements. NXP  
Semiconductors accepts no liability for inclusion and/or use of  
Adelante,Bitport,Bitsound,CoolFlux,CoReUse,DESFire,EZ-HV,FabKey,G  
reenChip,HiPerSmart,HITAG,I²C-buslogo,ICODE,I-CODE,ITEC,Labelution  
,MIFARE,MIFARE Plus,MIFARE Ultralight,MoReUse,QLPAK,Silicon  
Tuner,SiliconMAX,SmartXA,STARplug,TOPFET,TrenchMOS,TriMediaand  
UCODE— are trademarks of NXP B.V.  
non-automotive qualified products in automotive equipment or applications.  
HD RadioandHD Radiologo — are trademarks of iBiquity Digital Corporation.  
10. Contact information  
For more information, please visit:http://www.nxp.com  
For sales office addresses, please send an email to:salesaddresses@nxp.com  
PSMN7R6-60BS  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 2 March 2012  
13 of 14  
 
 
PSMN7R6-60BS  
NXP Semiconductors  
N-channel 60 V 7.8 mstandard level MOSFET in D2PAK  
11. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
General description . . . . . . . . . . . . . . . . . . . . . .1  
Features and benefits. . . . . . . . . . . . . . . . . . . . .1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
Quick reference data . . . . . . . . . . . . . . . . . . . . .1  
1.1  
1.2  
1.3  
1.4  
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2  
Ordering information. . . . . . . . . . . . . . . . . . . . . .2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2  
Thermal characteristics . . . . . . . . . . . . . . . . . . .4  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .5  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .11  
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .12  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .12  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
9.1  
9.2  
9.3  
9.4  
10  
Contact information. . . . . . . . . . . . . . . . . . . . . .13  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2012.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 2 March 2012  
Document identifier: PSMN7R6-60BS  

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