PUMB2,115 [NXP]

PEMB2; PUMB2 - PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = 47 kΩ TSSOP 6-Pin;
PUMB2,115
型号: PUMB2,115
厂家: NXP    NXP
描述:

PEMB2; PUMB2 - PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = 47 kΩ TSSOP 6-Pin

开关 光电二极管 晶体管
文件: 总14页 (文件大小:590K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PEMB2; PUMB2  
PNP/PNP resistor-equipped transistors;  
R1 = 47 k, R2 = 47 k  
Rev. 3 — 17 November 2011  
Product data sheet  
1. Product profile  
1.1 General description  
PNP/PNP double Resistor-Equipped Transistors (RET) in Surface-Mounted  
Device (SMD) plastic packages.  
Table 1.  
Product overview  
Type number Package  
NXP  
NPN/PNP  
complement  
NPN/NPN  
complement  
Package  
configuration  
JEITA  
PEMB2  
SOT666  
-
PEMD12  
PUMD12  
PEMH2  
PUMH2  
ultra small and flat  
lead  
PUMB2  
SOT363  
SC-88  
very small  
1.2 Features and benefits  
100 mA output current capability  
Built-in bias resistors  
Reduces component count  
Reduces pick and place costs  
AEC-Q101 qualified  
Simplifies circuit design  
1.3 Applications  
Low current peripheral driver  
Control of IC inputs  
Replaces general-purpose transistors in digital applications  
1.4 Quick reference data  
Table 2.  
Symbol  
Quick reference data  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Per transistor  
VCEO collector-emitter voltage  
IO  
open base  
-
-
50  
100  
61  
V
output current  
-
-
mA  
k  
R1  
bias resistor 1 (input)  
bias resistor ratio  
33  
0.8  
47  
1
R2/R1  
1.2  
 
 
 
 
 
PEMB2; PUMB2  
NXP Semiconductors  
PNP/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k  
2. Pinning information  
Table 3.  
Pinning  
Pin  
1
Description  
Simplified outline  
Graphic symbol  
GND (emitter) TR1  
input (base) TR1  
output (collector) TR2  
GND (emitter) TR2  
input (base) TR2  
output (collector) TR1  
6
5
4
6
5
4
2
3
R1 R2  
4
TR2  
TR1  
5
1
2
3
R2 R1  
6
001aab555  
1
2
3
006aaa212  
3. Ordering information  
Table 4.  
Ordering information  
Type number Package  
Name  
Description  
Version  
SOT666  
SOT363  
PEMB2  
PUMB2  
-
plastic surface-mounted package; 6 leads  
plastic surface-mounted package; 6 leads  
SC-88  
4. Marking  
Table 5.  
Marking codes  
Type number  
PEMB2  
Marking code[1]  
B2  
PUMB2  
B*2  
[1] * = placeholder for manufacturing site code  
PEMB2_PUMB2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 17 November 2011  
2 of 14  
 
 
 
 
PEMB2; PUMB2  
NXP Semiconductors  
PNP/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k  
5. Limiting values  
Table 6.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
Parameter  
Conditions  
Min  
Max  
Unit  
Per transistor  
VCBO  
VCEO  
VEBO  
VI  
collector-base voltage  
open emitter  
open base  
-
-
-
50  
50  
10  
V
V
V
collector-emitter voltage  
emitter-base voltage  
input voltage  
open collector  
positive  
-
-
-
-
+10  
V
negative  
40  
V
IO  
output current  
100  
100  
mA  
mA  
ICM  
peak collector current  
single pulse;  
tp 1 ms  
Ptot  
total power dissipation  
PEMB2 (SOT666)  
PUMB2 (SOT363)  
Tamb 25 C  
[1][2]  
[1]  
-
-
200  
200  
mW  
mW  
Per device  
Ptot  
total power dissipation  
PEMB2 (SOT666)  
Tamb 25 C  
[1][2]  
[1]  
-
300  
mW  
mW  
C  
PUMB2 (SOT363)  
junction temperature  
ambient temperature  
storage temperature  
-
300  
Tj  
-
150  
Tamb  
Tstg  
65  
65  
+150  
+150  
C  
C  
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard  
footprint.  
[2] Reflow soldering is the only recommended soldering method.  
PEMB2_PUMB2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 17 November 2011  
3 of 14  
 
 
 
PEMB2; PUMB2  
NXP Semiconductors  
PNP/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k  
006aac749  
400  
P
tot  
(mW)  
300  
200  
100  
0
-75  
-25  
25  
75  
125  
175  
(°C)  
T
amb  
FR4 PCB, standard footprint  
Fig 1. Per device: Power derating curve for SOT363 (SC-88) and SOT666  
6. Thermal characteristics  
Table 7.  
Symbol  
Per transistor  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max Unit  
Rth(j-a)  
thermal resistance from  
in free air  
junction to ambient  
PEMB2 (SOT666)  
PUMB2 (SOT363)  
[1][2]  
[1]  
-
-
-
-
625  
625  
K/W  
K/W  
Per device  
Rth(j-a)  
thermal resistance from  
junction to ambient  
in free air  
[1][2]  
[1]  
PEMB2 (SOT666)  
PUMB2 (SOT363)  
-
-
-
-
417  
417  
K/W  
K/W  
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.  
[2] Reflow soldering is the only recommended soldering method.  
PEMB2_PUMB2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 17 November 2011  
4 of 14  
 
 
 
 
PEMB2; PUMB2  
NXP Semiconductors  
PNP/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k  
006aac751  
3
10  
duty cycle = 1  
Z
th(j-a)  
0.75  
0.33  
(K/W)  
0.5  
0.2  
2
10  
0.1  
0.02  
0
0.05  
0.01  
10  
1
10  
-5  
-4  
-3  
-2  
-1  
2
3
10  
10  
10  
10  
1
10  
10  
10  
t
(s)  
p
FR4 PCB, standard footprint  
Fig 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration for  
PEMB2 (SOT666); typical values  
006aac750  
3
10  
duty cycle = 1  
Z
th(j-a)  
0.75  
0.33  
(K/W)  
0.5  
0.2  
2
10  
0.1  
0.05  
0.01  
0.02  
0
10  
1
10  
-5  
-4  
-3  
-2  
-1  
2
3
10  
10  
10  
10  
1
10  
10  
10  
t
(s)  
p
FR4 PCB, standard footprint  
Fig 3. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration for  
PUMB2 (SOT363); typical values  
PEMB2_PUMB2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 17 November 2011  
5 of 14  
PEMB2; PUMB2  
NXP Semiconductors  
PNP/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k  
7. Characteristics  
Table 8.  
Characteristics  
T
amb = 25 C unless otherwise specified.  
Symbol Parameter  
Per transistor  
Conditions  
Min  
Typ  
Max Unit  
ICBO  
collector-base cut-off  
current  
VCB = 50 V; IE = 0 A  
-
-
100 nA  
ICEO  
collector-emitter cut-off VCE = 30 V; IB = 0 A  
-
-
-
-
1  
5  
A  
A  
current  
VCE = 30 V; IB = 0 A;  
Tj = 150 C  
IEBO  
emitter-base cut-off  
current  
VEB = 5 V; IC = 0 A  
-
-
90  
A  
hFE  
DC current gain  
VCE = 5 V; IC = 5 mA  
80  
-
-
-
-
VCEsat  
collector-emitter  
IC = 10 mA; IB = 0.5 mA  
150 mV  
saturation voltage  
VI(off)  
VI(on)  
R1  
off-state input voltage  
on-state input voltage  
bias resistor 1 (input)  
bias resistor ratio  
VCE = 5 V; IC = 100 A  
VCE = 0.3 V; IC = 2 mA  
-
1.2 0.8  
V
3  
33  
0.8  
-
1.6  
47  
1
-
V
61  
1.2  
3
k  
R2/R1  
Cc  
collector capacitance  
VCB = 10 V; IE = ie = 0 A;  
-
pF  
f = 1 MHz  
[1]  
fT  
transition frequency  
VCE = 5 V; IC = 10 mA;  
-
180  
-
MHz  
f = 100 MHz  
[1] Characteristics of built-in transistor  
PEMB2_PUMB2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 17 November 2011  
6 of 14  
 
 
 
PEMB2; PUMB2  
NXP Semiconductors  
PNP/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k  
006aac758  
006aac759  
3
10  
-1  
h
FE  
(1)  
(2)  
(3)  
V
CEsat  
(V)  
2
10  
-1  
-10  
(1)  
(2)  
(3)  
10  
-2  
1
-10  
-10  
-1  
2
-1  
2
-1  
-10  
-10  
-10  
-1  
-10  
-10  
I
C
(mA)  
I (mA)  
C
VCE = 5 V  
amb = 100 C  
IC/IB = 20  
(1) Tamb = 100 C  
(1)  
T
(2) Tamb = 25 C  
(3) Tamb = 40 C  
(2) Tamb = 25 C  
(3) Tamb = 40 C  
Fig 4. DC current gain as a function of collector  
current; typical values  
Fig 5. Collector-emitter saturation voltage as a  
function of collector current; typical values  
006aac760  
006aac761  
-10  
-10  
V
(V)  
V
I(off)  
(V)  
I(on)  
(1)  
(2)  
(3)  
(1)  
(2)  
(3)  
-1  
-1  
-1  
-1  
-10  
-10  
-1  
2
-1  
-10  
-1  
-10  
-10  
-10  
-1  
-10  
I
C
(mA)  
I (mA)  
C
VCE = 0.3 V  
(1) Tamb = 40 C  
(2) amb = 25 C  
(3) Tamb = 100 C  
VCE = 5 V  
(1) Tamb = 40 C  
(2) amb = 25 C  
(3) Tamb = 100 C  
T
T
Fig 6. On-state input voltage as a function of  
collector current; typical values  
Fig 7. Off-state input voltage as a function of  
collector current; typical values  
PEMB2_PUMB2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 17 November 2011  
7 of 14  
PEMB2; PUMB2  
NXP Semiconductors  
PNP/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k  
006aac762  
006aac763  
3
9
10  
C
c
(pF)  
f
T
(MHz)  
6
3
0
2
10  
10  
-10  
-1  
2
0
-10  
-20  
-30  
-40  
V
-50  
(V)  
-1  
-10  
-10  
I (mA)  
C
CB  
f = 1 MHz; Tamb = 25 C  
VCE = 5 V; Tamb = 25 C  
Fig 8. Collector capacitance as a function of  
collector-base voltage; typical values of  
built-in transistor  
Fig 9. Transition frequency as a function of collector  
current; typical values of built-in transistor  
8. Test information  
8.1 Quality information  
This product has been qualified in accordance with the Automotive Electronics Council  
(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is  
suitable for use in automotive applications.  
9. Package outline  
2.2  
1.8  
1.1  
0.8  
1.7  
1.5  
0.6  
0.5  
0.45  
0.15  
6
5
4
6
5
4
0.3  
0.1  
2.2 1.35  
2.0 1.15  
1.7 1.3  
1.5 1.1  
pin 1  
index  
pin 1 index  
1
2
3
1
2
3
0.25  
0.10  
0.3  
0.2  
0.18  
0.08  
0.27  
0.17  
0.65  
0.5  
1.3  
1
Dimensions in mm  
04-11-08  
Dimensions in mm  
06-03-16  
Fig 10. Package outline PEMB2 (SOT666)  
Fig 11. Package outline PUMB2 (SOT363)  
PEMB2_PUMB2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 17 November 2011  
8 of 14  
 
 
 
 
PEMB2; PUMB2  
NXP Semiconductors  
PNP/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k  
10. Packing information  
Table 9.  
Packing methods  
The indicated -xxx are the last three digits of the 12NC ordering code.[1]  
Type  
Package Description  
Packing quantity  
number  
3000 4000 8000 10000  
PEMB2  
PUMB2  
SOT666 2 mm pitch, 8 mm tape and reel  
4 mm pitch, 8 mm tape and reel  
-
-
-315  
-
-
-115  
-
-
-
-
[2]  
[3]  
SOT363 4 mm pitch, 8 mm tape and reel; T1  
4 mm pitch, 8 mm tape and reel; T2  
-115  
-125  
-
-
-135  
-165  
[1] For further information and the availability of packing methods, see Section 14.  
[2] T1: normal taping  
[3] T2: reverse taping  
11. Soldering  
2.75  
2.45  
2.1  
1.6  
solder lands  
0.4  
(6×)  
0.3  
(2×)  
0.25  
(2×)  
placement area  
0.538  
0.55  
(2×)  
1.075  
1.7  
2
solder paste  
occupied area  
0.325 0.375  
(4×) (4×)  
Dimensions in mm  
1.7  
0.45  
0.6  
(4×)  
(2×)  
0.5  
0.65  
(4×)  
(2×)  
sot666_fr  
Reflow soldering is the only recommended soldering method.  
Fig 12. Reflow soldering footprint PEMB2 (SOT666)  
PEMB2_PUMB2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 17 November 2011  
9 of 14  
 
 
 
 
 
PEMB2; PUMB2  
NXP Semiconductors  
PNP/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k  
2.65  
solder lands  
0.4 (2×)  
1.5  
2.35  
0.6  
(4×)  
0.5  
(4×)  
solder resist  
solder paste  
0.5  
(4×)  
0.6  
(2×)  
occupied area  
0.6  
(4×)  
Dimensions in mm  
1.8  
sot363_fr  
Fig 13. Reflow soldering footprint PUMB2 (SOT363)  
1.5  
solder lands  
solder resist  
occupied area  
2.5  
0.3  
4.5  
1.5  
Dimensions in mm  
preferred transport  
direction during soldering  
1.3  
1.3  
2.45  
5.3  
sot363_fw  
Fig 14. Wave soldering footprint PUMB2 (SOT363)  
PEMB2_PUMB2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 17 November 2011  
10 of 14  
PEMB2; PUMB2  
NXP Semiconductors  
PNP/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k  
12. Revision history  
Table 10. Revision history  
Document ID  
Release date  
20111117  
Data sheet status  
Change notice  
Supersedes  
PEMB2_PUMB2 v.3  
Modifications:  
Product data sheet  
-
PEMB2_PUMB2 v.2  
The format of this document has been redesigned to comply with the new identity  
guidelines of NXP Semiconductors.  
Legal texts have been adapted to the new company name where appropriate.  
Section 1 “Product profile”: updated  
Section 4 “Marking”: updated  
Figure 1 to 9: added  
Section 5 “Limiting values”: updated  
Section 6 “Thermal characteristics”: updated  
Table 8 “Characteristics”: Vi(on) redefined to VI(on) on-state input voltage, Vi(off) redefined  
to VI(off) off-state input voltage, ICEO updated, fT added  
Section 8 “Test information”: added  
Section 9 “Package outline”: superseded by minimized package outline drawing  
Section 10 “Packing information”: added  
Section 11 “Soldering”: added  
Section 13 “Legal information”: updated  
PEMB2_PUMB2 v.2  
20031015  
Product data sheet  
-
PUMB2 v.1  
PEMB2 v.1  
PEMB2 v.1  
PUMB2 v.1  
20010914  
19910803  
Product specification  
Product specification  
-
-
-
-
PEMB2_PUMB2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 17 November 2011  
11 of 14  
 
PEMB2; PUMB2  
NXP Semiconductors  
PNP/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k  
13. Legal information  
13.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
malfunction of an NXP Semiconductors product can reasonably be expected  
13.2 Definitions  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
13.3 Disclaimers  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
PEMB2_PUMB2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 17 November 2011  
12 of 14  
 
 
 
 
PEMB2; PUMB2  
NXP Semiconductors  
PNP/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
13.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
14. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
PEMB2_PUMB2  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 3 — 17 November 2011  
13 of 14  
 
 
PEMB2; PUMB2  
NXP Semiconductors  
PNP/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k  
15. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
General description . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits. . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data . . . . . . . . . . . . . . . . . . . . 1  
1.1  
1.2  
1.3  
1.4  
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Thermal characteristics . . . . . . . . . . . . . . . . . . 4  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Test information. . . . . . . . . . . . . . . . . . . . . . . . . 8  
Quality information . . . . . . . . . . . . . . . . . . . . . . 8  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Packing information . . . . . . . . . . . . . . . . . . . . . 9  
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11  
3
4
5
6
7
8
8.1  
9
10  
11  
12  
13  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 12  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
13.1  
13.2  
13.3  
13.4  
14  
15  
Contact information. . . . . . . . . . . . . . . . . . . . . 13  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2011.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 17 November 2011  
Document identifier: PEMB2_PUMB2  
 

相关型号:

SI9130DB

5- and 3.3-V Step-Down Synchronous Converters

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9135LG-T1

SMBus Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9135LG-T1-E3

SMBus Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9135_11

SMBus Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9136_11

Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9130CG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9130LG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9130_11

Pin-Programmable Dual Controller - Portable PCs

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9137

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9137DB

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9137LG

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9122E

500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY