SE5560F [NXP]
Switched-mode power supply control circuit; 开关电源的控制电路
| 型号： | SE5560F |
| 厂家： | 
NXP |
| 描述： | Switched-mode power supply control circuit |
| 文件： | 总16页 (文件大小：243K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Philips Semiconductors
Product specification
Switched-mode power supply control circuit
NE/SE5560
DESCRIPTION
PIN CONFIGURATION
The NE/SE5560 is a control circuit for use in switched-mode power
supplies. This single monolithic chip incorporates all the control and
housekeeping (protection) functions required in switched-mode
power supplies, including an internal temperature-compensated
reference source, internal Zener references, sawtooth generator,
pulse-width modulator, output stage and various protection circuits.
D, F, N Packages
1
2
3
4
5
6
7
8
V
16
15
14
13
12
11
10
9
FEEDFORWARD
OUTPUT (COLL)
OUTPUT (EMIT)
CC
V
Z
FEEDBACK
GAIN
DEMAG: OVERVOLTAGE
GND
MODULATOR
FEATURES
• Stabilized power supply
CURRENT LIMITING
REMOTE ON/OFF
DUTY CYCLE CONTROL
R
T
• Temperature-compensated reference source
• Sawtooth generator
EXTERNAL SYNC
C
T
SL00360
• Pulse-width modulator
Figure 1. Pin Configuration
• Remote on/off switching
• Current limiting
• Low supply voltage protection
• Loop fault protection
• Demagnetization/overvoltage protection
• Maximum duty cycle clamp
• Feed-forward control
• External synchronization
ORDERING INFORMATION
DESCRIPTION
TEMPERATURE RANGE
ORDER CODE
NE5560N
DWG #
SOT38-4
SOT162-1
SOT38-4
0582B
16-Pin Plastic Dual In-Line Package (DIP)
16-Pin Plastic Small Outline Large (SOL) Package
16-Pin Plastic Dual In-Line Package (DIP)
16-Pin Cerdip Dual In-Line Package (CERDIP)
0 to 70°C
0°C to 70°C
NE5560D
-55°C to 125°C
-55°C to 125°C
SE5560N
SE5560F
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
RATING
UNIT
1
Supply
V
Voltage-forced mode
Current-fed mode
+18
30
V
CC
I
mA
CC
Output transistor (at 20-30V max)
Output current
I
40
mA
V
OUT
Collector voltage (Pin 15)
Max. emitter voltage (Pin 14)
Operating ambient temperature range
SE5560
V
+1.4V
CC
+5
V
T
A
-55 to +125
0 to 70
°C
°C
°C
NE5560
T
Storage temperature range
-65 to +150
STG
NOTES:
1. Does not include current for timing resistors or capacitors.
1
1994 Aug 31
853-0125 13721
Philips Semiconductors
Product specification
Switched-mode power supply control circuit
NE/SE5560
BLOCK DIAGRAM
FEED
EXTERNAL
DEMAGNETIZATION
R
C
FORWARD
SYNC INPUT
T
7
T
8
OVER-VOLTAGE PROTECTION
9
16
13
0.6V
+
–
SAWTOOTH
GENERATOR
REFERENCE
VOLTAGE
V
CC
0.48V
0.6V
+
–
PULSE WIDTH
MODULATOR
FEEDBACK
VOLTAGE
3
4
15
14
+
–
GAIN ADJUST
S
R
OUTPUTS
LATCH
Q
5
8
MODULATOR
INPUT
–
+
+
CUTY CYCLE
CONTROL
–
+
0.6V
Q
1
100Ω
R
S
START
STOP
1kΩ
0.6V
0.48V
–
+
11
CURRENT
LIMITING
OC
1
2
STABILIZED
SUPPLY
V
Z
+
–
0.6V
+
1
–
10
12
REMOTE
ON/OFF
V
CC
NOTE:
1. See Voltage/Current fed supply characteristic curve.
SL00361
Figure 2. Block Diagram
2
1994 Aug 31
Philips Semiconductors
Product specification
Switched-mode power supply control circuit
NE/SE5560
DC ELECTRICAL CHARACTERISTICS
T =25°C, V =12V, unless otherwise specified.
A
CC
SE5560
Typ
NE5560
SYMBOL
Reference sections
PARAMETER
TEST CONDITIONS
UNIT
Min
Max
Min
Typ
Max
V
REF
Internal reference voltage
25°C
3.69
3.65
3.72
3.81
3.85
3.57
3.53
3.72
3.95
4.00
V
V
Over temperature
Temperature coefficient of V
Internal Zener reference
-100
8.4
-100
8.4
ppm/°C
V
REF
V
Z
I =-7mA
L
7.8
8.8
7.8
8.8
Temperature coefficient of V
200
200
ppm/°C
Z
Oscillator section
Frequency range
Over temperature
50
0
100k
98
50
0
100k
98
Hz
%
Initial accuracy oscillator
Duty cycle range
R=5kΩ
5
5
f =20kHz
O
%
Modulator
Voltage at Pin 5=2V Over
temperature
Modulation input current
0.2
0.2
20
20
0.2
0.2
20
20
µA
µA
Housekeeping function
Pin 6, input current
At 2V
I
IN‘
Over temperature
For 50% max duty cycle
Pin 6, duty cycle limit control
% of duty
cycle
15kHz to 50kHz/41% of V
40
8
50
9.0
600
60
40
8
50
9.0
600
60
Z
Pin 1, low supply voltage
protection thresholds
10.5
720
10.5
720
V
Pin 3, feedback loop protection trip
threshold
400
400
mV
At 2V
Pin 3, pull-up current
-7
-15
-35
-7
-15
-35
µA
Pin 13,
demagnetization/over-voltage
protection trip on threshold
Over temperature
470
600
720
470
600
720
mV
At 0.25V
25°C
I
IN
Pin 13, input current
-0.6
40
-10
-20
-0.6
40
-10
-20
µA
Over temperature
Pin 16, feed-forward duty cycle
control
% original
duty cycle
Voltage at Pin 16=2V
30
50
30
50
Z
At 16V, V =18V
CC
*Pin 16, feed-forward input current
25°C
0.2
5
0.2
5
µA
µA
Over temperature
10
10
External synchronization
Pin 9 Off
On
0
2
0.8
0
2
0.8
V
V
V
Z
V
Z
Sink current
Voltage at Pin 9=0V, 25°C
-65
-85
-100
-125
-65
-85
-125
-125
µA
µA
Over temperature
Remote
Pin 10 Off
On
0
2
0.8
0
2
0.8
V
V
V
Z
V
Z
At 0V
25°C
Sink current
-100
-125
-125
-125
µA
µA
Over temperature
3
1994 Aug 31
Philips Semiconductors
Product specification
Switched-mode power supply control circuit
NE/SE5560
DC ELECTRICAL CHARACTERISTICS (Continued)
SE5560
Typ
NE5560
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
Min
Max
Min
Typ
Max
Current limiting
I
IN
Pin 11 Input current
Voltage at
-2
-20
-2
-20
µA
Pin 11=250mV
25°C
Over temperature
Inhibit delay time for 20%
-40
0.8
-40
0.8
µA
µs
Single pulse inhibit delay
0.7
0.7
overdrive at 40mA I
OUT
OC2
Trip Levels: Shut down, slow start,
low level
0.500 0.600 0.700 0.500 0.600 0.700
V
OC1
Current limit, high level
0.400 0.480 0.560 0.400 0.560 0.500
0.750 0.800 0.850 0.750 0.800 0.850
V
V
∆OC
Low Level in terms of high level,
OC
2
Error amplifier
V
V
Output voltage swing
Output voltage swing
Open-loop gain
6.2
9.5
0.7
6.2
9.5
0.7
V
V
OH
OL
54
60
3
54
60
3
dB
Ω
R
Feedback resistor
10k
10k
F
BW
Small-signal bandwidth
MHz
Output stage
V
(SAT) I =40mA
0.5
0.5
V
mA
V
CE
C
Output current (Pin 15)
40
5
40
5
Max. emitter voltage (Pin 14)
6
6
1
Supply voltage/current
I
Supply current
I =0, voltage-forced,
Z
CC
V
=12V, 25°C
10
15
23
30
10
15
24
30
mA
mA
V
CC
Over temp.
V
V
Supply voltage
Supply voltage
I
I
=10mA current-fed
=30mA current-fed
20
20
19
20
CC
CC
V
CC
CC
NOTES:
1. Does not include current for timing resistors or capacitors.
4
1994 Aug 31
Philips Semiconductors
Product specification
Switched-mode power supply control circuit
NE/SE5560
MAXIMUM PIN VOLTAGES
NE5560
Pin No
Function
Maximum Voltage
1
2
V
V
See Note 1
Do not force (8.4V)
CC
Z
3
Feedback
Gain
V
Z
4
5
Modulator
Duty Cycle Control
V
V
Z
6
Z
7
R
T
C
T
Current force mode
8
9
External Sync
V
V
V
Z
10
11
12
13
14
15
16
Remote On/Off
Current Limiting
GND
Z
CC
GND
Demagnetization/Overvoltage
Output (Emit)
V
V
V
V
CC
Z
Output (Collector)
Feed-forward
+2V
BE
CC
CC
NOTES:
1. When voltage-forced, maximum is 18V; when current-fed, maximum is 30mA. See voltage-/current-fed supply characteristic curve.
TYPICAL PERFORMANCE CHARACTERISTICS
Error Amplifier
Open-Loop Phase
Open-Loop Gain
0
–30
60
50
40
30
20
10
0
–60
–90
–120
–150
–180
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
SL00362
Figure 3. Typical Performance Characteristics
5
1994 Aug 31
Philips Semiconductors
Product specification
Switched-mode power supply control circuit
NE/SE5560
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
Soft-Start Min. Duty Cycle vs R + R
Graph for Determining δ
1
2
MAX
δ (%)
δ MAX (%)
100
90
80
70
60
50
40
30
20
10
80
70
60
50
40
30
20
10
δ
90%
MAX
2
R
R
1
2
δ
70%
MAX
DUTY
CYCLE
CONTROL
6
δ
50%
30%
MAX
12
δ
MAX
R
2
R + R
1 2
(Ω)
3
4
10
R
* R
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
10
2
3
4
5
6
7
8 9
2
1
2
NE5560
Voltage-/Current-Fed
Supply Characteristics
Current-Fed Dropping Resistor
Power Derating Curve
mA
1.0
VS
20
10
0
SE
R
VCC
NE
V
* V
CC
50
24
V
1
CC
S
R
+
VCC
(10 20mA)
GND
12
SEE DC ELECTRICAL
CHARACTERISTICS
FOR CURRENT FED
V
RANGE
CC
V
10
20
CC
30
0
–60°C
25°C 70°C
125°C
V
T
A
OPERATING CURVE
Regulation vs Error
Amp Closed Gain
Transfer Curve of Pulse-Width
Modular Duty Cycle vs Input Voltage
∆V /V
(%)
O
REF
δ (%)
7
6
5
4
R
f
+ 20
4
R
100
90
80
70
60
50
40
30
20
10
S
R
1
3
R
S
–
+
3
2
R
f
V
(3.72V)
REF
+ 100
+ 500
R
S
1
0.9
0.8
0.7
0.6
0.5
0.4
R
f
R
S
0.3
0.2
0.1
δ
0
V
4,5,6 (V)
1
2
3
4
5
6
10
20
30
40
50
60
70
80
90
SL00363
Figure 4. Typical Performance Characteristics
6
1994 Aug 31
Philips Semiconductors
Product specification
Switched-mode power supply control circuit
NE/SE5560
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
Typical Frequency Plot vs R and
T
C
T
f(kHz)
δ
1000
100
90
80
70
60
50
40
30
20
10
100
R=5kΩ
R=10kΩ
R=20kΩ
90
80
70
60
50
40
30
20
R=40kΩ
10
9
8
7
6
5
4
3
2
1
V
16
V
1
1.5
2
2.5
Z
CnF)
2
2.5
3
3.5
4
4.5
SL00364
Figure 5. Typical Performance Characteristics
– An output transistor of which both the collector (Pin 15) and the
emitter (Pin 14) are externally available. This allows for normal
or inverse output pulses.
THEORY OF OPERATION
The following functions are incorporated:
– A temperature-compensated reference source.
– A power supply that can be either voltage- or current-driven
(Pins 1 and 12). The internally-generated stabilized output
voltage VZ is connected to Pin 2.
– An error amplifier with Pin 3 as input. The output is connected
to Pin 4 so that the gain is adjustable with external resistors.
– A sawtooth generator with a TTL-compatible synchronization
– A special function is the so-called feed-forward at Pin 16. The
amplitude of the sawtooth generator is modulated in such a way
that the duty cycle becomes inversely proportional to the
voltage on this pin: δ ~ 1/V16.
input (Pins 7, 8, 9).
– A pulse-width modulator with a duty cycle range from 0 to 95%.
The PWM has two additional inputs:
– Loop fault protection circuits assure that the duty cycle is
reduced to zero or a low value for open- or short-circuited
feedback loops.
Pin 6 can be used for a precise setting of δ
MAX
Pin 5 gives a direct access to the modulator, allowing for real
constant-current operation:
– A gate at the output of the PWM provides a simple dynamic
current limit.
Stabilized Power Supply (Pins 1, 2, 12)
The power supply of the NE5560 is of the well known series
regulation type and provides a stabilized output voltage of typically
8.5V.
– A latch that is set by the flyback of the sawtooth and reset by
the output pulse of the above mentioned gate prohibits double
pulsing.
This voltage V is also present at Pin 2 and can be used for precise
Z
– Another latch functions as a start-stop circuit; it provides a fast
switch-off and a slow start.
setting of δ
and to supply external circuitry. Its max. current
MAX
capability is 5mA.
– A current protection circuit that operates via the start-stop
circuit. This is a combined function with the current limit circuit,
therefore Pin 11 has two trip-on levels; the lower one for
cycle-by-cycle current limiting, the upper one for current
protection by means of switch-off and slow-start.
The circuit can be fed directly from a DC voltage source between
10.5V and 18V or can be current-driven via a limiting resistor. In the
latter case, internal pinch-off resistors will limit the maximum supply
voltage: typical 23V for 10mA and max. 30V for 30mA.
The low supply voltage protection is active when V
10.5V and inhibits the output pulse (no hysteresis).
is below
– A TTL-compatible remote on/off input at Pin 10, also operating
via the start-stop circuit.
(1-12)
– An inhibit input at Pin 13. The output pulse can be inhibited
immediately.
When the supply voltage surpasses the 10.5V level, the IC starts
delivering output pulses via the slow-start function.
– An output gate that is commanded by the latches and the inhibit
circuit.
7
1994 Aug 31
Philips Semiconductors
Product specification
Switched-mode power supply control circuit
NE/SE5560
The current consumption at 12V is less than 10mA, provided that no
current is drawn from V and R ≥20kΩ.
the voltage drop over R
zero, provided that R >100k. When the feedback loop is
(3-4)
. As a result, the duty cycle will become
(3-4)
Z
(7-12)
short-circuited, the duty cycle would jump to the adjusted maximum
duty cycle. Therefore, an additional comparator is active for
feedback voltages at Pin 3 below 0.6V. Now an internal resistor of
The Sawtooth Generator
Figure 6 shows the principal circuitry of the oscillator. A resistor
between Pin 7 and Pin 12 (GND) determines the constant current
typically 1k is shunted to the impedance on the δ
setting Pin 6.
MAX
that charges the timing capacitor C
.
Depending on this impedance, δ will be reduced to a value δ . This
(8-12)
0
will be discussed further.
This causes a linear increasing voltage on Pin 8 until the upper level
of 5.6V is reached. Comparator H sets the RS flip-flop and Q1
The Pulse-Width Modulator
discharges C
down to 1.1V, where comparator L resets the
(8-12)
The function of the PWM circuit is to translate a feedback voltage
into a periodical pulse of which the duty cycle depends on that
feedback voltage. As can be seen in Figure 10, the PWM circuit in
the NE5560 is a long-tailed pair in which the sawtooth on Pin 8 is
compared with the LOWEST voltage on either Pin 4 (error amplifier),
flip-flop. During this flyback time, Q2 inhibits the output.
Synchronization at a frequency lower than the free-running
frequency is accomplished via the TTL gate on Pin 9. By activating
9
this gate (V <2V), the setting of the sawtooth is prevented. This is
indicated in Figure 7.
Pin 5, or Pin 6 (δ
and slow-start). The transfer graph is given in
MAX
Figure 11. The output of the PWM causes the resetting of the output
bi-stable.
Figure 8 shows a typical plot of the oscillator frequency against the
timing capacitor. The frequency range of the NE5560 goes from
<50Hz up to >100kHz.
Limitation of the Maximum Duty Cycle
With Pins 5 and 6 not connected and with a rather low feedback
voltage on Pin 3, the NE5560 will deliver output pulses with a duty
cycle of ≈ 95%. In many SMPS applications, however, this high δ will
cause problems. Especially in forward converters, where the
transformer will saturate when δ exceeds 50%, a limitation of the
maximum duty cycle is a must.
Reference Voltage Source
The internal reference voltage source is based on the bandgap
voltage of silicon. Good design practice assures a temperature
dependency typically ±100ppm/°C. The reference voltage is
connected to the positive input of the error amplifier and has a
typical value of 3.72V.
A DC voltage applied to Pin 6 (PWM input) will set δ
in accordance with Figure 11. For low tolerances of δ
at a value
MAX
Error Amplifier Compensation
, this
MAX
For closed-loop gains less than 40dB, it is necessary to add a
simple compensation capacitor as shown in Figures 8 and 9.
voltage on Pin 6 should be set with a resistor divider from V (Pin 2).
The upper and lower sawtooth levels are also set by means of an
Z
internal resistor divider from V , so forming a bridge configuration
Z
Error Amplifier with Loop-Fault Protection Circuits
This operational amplifier is of a generally used concept and has an
open-loop gain of typically 60dB. As can be seen in Figure 9, the
inverting input is connected to Pin 3 for a feedback information
with the δ
setting is low because tolerances in V are
Z
MAX
compensated and the sawtooth levels are determined by internal
resistor matching rather than by absolute resistor tolerance. Figure
12 can be used for determining the tap on the bleeder for a certain
proportional to V .
O
δ
setting.
MAX
The output goes to the PWM circuit, but is also connected to Pin 4,
As already mentioned, Figure 13 gives a graphical representation of
this. The value δo is limited to the lower and the higher side;
so that the required gain can be set with R and R
. This is
(3-4)
S
indicated in Figure 9, showing the relative change of the feedback
voltage as a function of the duty cycle. Additionally, Pin 4 can be
used for phase shift networks that improve the loop stability.
• It must be large enough to ensure that at maximum load and mini-
mum input voltage the resulting feedback voltage on Pin 3
exceeds 0.6V.
When the SMPS feedback loop is interrupted, the error amplifier
would settle in the middle of its active region because of the
• It must be small enough to limit the amount of energy in the SMPS
when a loop fault occurs. In practice, a value of 10-15% will be a
good compromise.
feedback via R . This would result in a large duty cycle. A current
(3-4)
source on Pin 3 prevents this by pushing the input voltage high via
V
Z
TO PWM
5.6V
–
Q1
N
+
SET
TO OUTPUT LATCH
Q2
–
7
L
RESET
1.1V
+
8
R
T
C
T
9 SYN
SL00365
Figure 6. Sawtooth Generator
8
1994 Aug 31
Philips Semiconductors
Product specification
Switched-mode power supply control circuit
NE/SE5560
5.6V
1.1V
SET
V
S
RESET
INHIBIT
‘SET’
>2V
V
S
<0.8V
SL00366
Figure 7. Sawtooth Oscillator Synchronization
60dB
SLOPE
20dB/DECADE
1kHz
10kHz
1MHz
SL00367
Figure 8. Error Amplifier Compensation Open-Loop Gain
3.72V
START/
STOP
+
ERROR
AMP
3
–
(+)
PWM
OUT
RESET
O.C.
(–)
(–)
(–)
6
8
4
5
SL00368
Figure 9. Error Amplifier
9
1994 Aug 31
Philips Semiconductors
Product specification
Switched-mode power supply control circuit
NE/SE5560
∆V /V
(%)
O
REF
7
6
5
4
R
f
+ 20
4
R
S
R
1
3
R
S
–
+
3
2
R
f
V
(3.72V)
REF
+ 100
+ 500
R
S
1
0.9
0.8
0.7
0.6
0.5
0.4
R
f
R
S
0.3
0.2
0.1
δ
10
20
30
40
50
60
70
80
90
a. Duty Cycle — δ — % Regulation
3.72V
START/
STOP
+
ERROR
AMP
3
–
(+)
PWM
OUT
RESET
O.C.
(–)
(–)
(–)
6
8
4
5
b. Pulse-Width Modulation
Figure 10.
SL00369
Extra PWM Input (Pin 5)
δ (%)
100
The PWM has an additional inverting input: Pin 5. It allows for
attacking the duty cycle via the PWM circuit, independently from the
90
80
70
60
50
40
30
20
10
0
feedback and the δ
information. This is necessary when the
MAX
SMPS must have a real constant-current behavior, possibly with a
fold-back characteristic. However, the realization of this feature must
be done with additional external components. When not used, Pin 5
should be tied to Pin 6.
V
4,5,6 (V)
SL00370
1
2
3
4
5
6
Figure 11. Transfer Curve of Pulse-Width Modulator
Duty Cycle vs Input Voltage
10
1994 Aug 31
Philips Semiconductors
Product specification
Switched-mode power supply control circuit
NE/SE5560
δ MAX (%)
100
90
80
70
60
50
40
30
20
10
2
R
R
1
2
DUTY
CYCLE
CONTROL
6
12
R
2
R
* R
0
0.1 0.2
0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
1
2
SL00371
Figure 12. Graph for Determining δ
MAX
δ (%)
80
70
60
50
40
30
20
10
δ
90%
MAX
δ
70%
MAX
δ
50%
30%
MAX
δ
MAX
R
+ R
2
1
3
4
10
(Ω)
10
2
3
4
5
6
7
8 9
2
SL00372
Figure 13. Soft-Start Minimum Duty Cycle vs R + R
1
2
0.6V
0.48V
from
PWM
START
STOP
RESET
OF OUTPUT
BISTABLE
11
SL00373
Figure 14. Current Protection Input
11
1994 Aug 31
Philips Semiconductors
Product specification
Switched-mode power supply control circuit
NE/SE5560
current limit diminishes at low duty cycle values. When δ becomes
very small, the storage time of the power transistor becomes
dominant. The current will now increase again, until it surpasses the
reference of the second comparator. The output of this comparator
activates the start-stop circuit and causes an immediate inhibit of the
output pulses. After a certain deadtime, the circuit starts again with
very narrow output pulses. The effect of this two-level current
protection circuit is visualized in Figure 15.
OC
1
NORMAL OPERATING
POINT
The Start-Stop Circuit
OC
2
The function of this protection circuit is to stop the output pulses as
soon as a fault occurs and to keep the output stopped for several
periods. After this dead-time, the output starts with a very small,
gradually increasing duty cycle. When the fault is persistent, this will
cause a cyclic switch-off/switch-on condition. This “hiccup” mode
effectively limits the energy during fault conditions. The realization
and the working of the circuit are indicated in Figures 12 and 13.
The dead time and the soft-start are determined by an external
LEVEL 1 LEVEL 2
.48 .60 (V)
V
(CURRENT LIMITING)
11
capacitor that is connected to Pin 6 (δ
setting).
MAX
SL00374
An RS flip-flop can be set by three different functions:
1. Remote on/off on Pin 10.
Figure 15. Output Characteristics
2. Overcurrent protection on Pin 11.
3. Low supply voltage protection (internal).
Dynamic Current Limit and Current Protection
As soon as one of these functions cause a setting of the flip-flop, the
output pulses are blocked via the output gate. In the same time
transistor Q1 is forward-biased, resulting in a discharge of the
capacitor on Pin 6.
(Pin 11)
In many applications, it is not necessary to have a real
constant-current output of the SMPS.
Protection of the power transistor will be the prime goal. This can be
realized with the NE5560 in an economical way. A resistor (or a
current transformer) in the emitter of the power transistor gives a
replica of the collector current. This signal must be connected to Pin
11. As can be seen in Figure 14, this input has two comparators with
different reference levels. The output of the comparator with the
lower 0.48V reference is connected to the same gate as the output
of the PWM.
The discharging current is limited by an internal 150Ω resistor in the
emitter of Q1. The voltage at Pin 6 decreases to below the lower
level of the sawtooth. When V6 has dropped to 0.6V, this will
activate a comparator and the flip-flop is reset. The output stage is
no longer blocked and Q1 is cut off. Now V will charge the
Z
capacitor via R1 to the normal δ
voltage. The output starts
MAX
delivering very narrow pulses as soon as V6 exceeds the lower
sawtooth level. The duty cycle of the output pulse now gradually
increases to a value determined by the feedback on Pin 3, or by the
When activated, it will immediately reset the output flip-flop, so
reducing the duty cycle. The effectiveness of this cycle-by-cycle
static δ
setting on Pin 6.
MAX
PWM
2
6
LATCH
V
Z
15
R
1
Q
1
Q
2
R
2
START/
STOP
14
100Ω
C
SS
SET
RESET
LOW SUPPLY
VOLTAGE
PROTECTION
0.6V
12
0.48V
0.6V
11
10
SL00375
Figure 16. Start-Stop Circuit
12
1994 Aug 31
Philips Semiconductors
Product specification
Switched-mode power supply control circuit
NE/SE5560
5.6V
V
6
SAWTOOTH
1.1V
DISCHARGE
DEAD
CHARGE
.6V
TIME
V
15
δ INCREASES
SET
RESET
SL00376
Figure 17. Start-Stop Circuit
Remote On/Off Circuit (Pin 10)
V
1
V
Z
In systems where two or more power supplies are used, it is often
necessary to switch these supplies on and off in a sequential way.
Furthermore, there are many applications in which a supply must be
switched by a logical signal. This can be done via the
FLYBACK
SET
TTL-compatible remote on/off input on Pin 10. The output pulse is
inhibited for levels below 0.8V. The output of the IC is no longer
blocked when the remote on/off input is left floating or when a
voltage >2V is applied. Start-up occurs via the slow-start circuit.
15
14
RESET
The Output Stage
V
Z
The output stage of the NE5560 contains a flip-flop, a push-pull
driven output transistor, and a gate, as indicated in Figure 18. The
flip-flop is set by the flyback of the sawtooth. Resetting occurs by a
signal either from the PWM or the current limit circuit. With this
configuration, it is assured that the output is switched only once per
period, thus prohibiting double pulsing. The collector and emitter of
the output transistor are connected to respectively Pin 15 and Pin
14, allowing for normal or inverted output pulses. An
0.6V
+
–
13
FROM START STOP
NOTES:
The signal V can be derived from the demagnetizing winding in
13
a forward converter as shown below.
internally-grounded emitter would cause intolerable voltage spikes
over the bonding wire, especially at high output currents.
This current capability of the output transistor is 40mA peak for V
CE
0.4V. An internal clamping diode to the supply voltage protects the
collector against overvoltages. The max. voltage at the emitter (Pin
14) must not exceed +5V. A gate, activated by one of the set or
reset pulses, or by a command from the start-stop circuit will
immediately switch-off the output transistor by short-circuiting its
base. The external inhibitor (Pin 13) operates also via this base.
B
+
S1
P1
P2
Demagnetization Sense
As indicated in Figure 18, the output of this NPN comparator will
block the output pulse, when a voltage above 0.6V is applied to Pin
13. A specific application for this function is to prevent saturation of
forward-converter transformers. This is indicated in Figure 19.
–
“I” “I” “n”
Feed-Forward (Pin 16)
H
The basic formula for a forward converter is
SL00377
dVIN
n
VOUT
+
(n + transformer ratio)
Figure 18. Output Stage
This means that in order to keep V
at a constant value, the duty
OUT
This loop now only has to regulate for load variations which require
only a low feedback gain in the normal operation area. The
transformer of a forward converter must be designed in such a way
cycle δ must be made inversely proportional to the input voltage. A
pre-regulation (feed-forward) with the function δ~1/V can ease the
IN
feedback-loop design.
13
1994 Aug 31
Philips Semiconductors
Product specification
Switched-mode power supply control circuit
NE/SE5560
that it does not saturate, even under transient conditions, where the
16
2
DO NOT EXCEED V
max. inductance is determined by δ
×V max. A regulation of
MAX IN
CC
FEED-FORWARD
INPUT
δ
~1/V will allow for a considerable reduction or simplification of
IN
MAX
the transformer. The function of δ~1/V can be realized by using
IN
Pin 16 of the NE5560.
R
1
6
δ
MAX
C
SS
R
2
ON
ON
ON
7
R
T
8
C
T
(50)
δ
δ
δ
δ
δ
δ
3
1
1
2
2
3
T
T
T
SL00379
Figure 20. External δ Maximum Control
SL00378
Figure 19. Output Stage Inhibit
V
2XV
Z
16
Figure 20 shows the electrical realization. When the voltage at Pin
16 exceeds the stabilized voltage V (Pin 2), it will increase the
Z
charging current for the timing capacitor on Pin 8.
V
Z
The operating frequency is not affected, because the upper trip level
for sawtooth increases also. Note that the δ
voltage on Pin 6
MAX
d
d
MAX
MAX
2
remains constant because it is set via V . Figure 21 visualizes the
1
Z
effect on δ
and the normal operating duty cycle δ. For V =2×V ,
16 Z
MAX
these duty cycles have halved. The graph for δ=f(V ) is given in
16
Figure 22.
δ
MAX
LEVEL
WORKING
δ LEVEL
NOTE:
V
must be less than Pin 1 voltage.
16
T
T
APPLICATIONS
SL00380
Figure 21. Feed-Forward Circuitry
NE/SE5560 Push-Pull Regulator
This application describes the use of the Philips Semiconductors
NE/SE5560 adapted to function as a push-pull switched mode
regulator, as shown in Figures 23 and 24.
δ
100
Input voltage range is +12V to +18V for a nominal output of +30V
and -30V at a maximum load current of 1A with an average
efficiency of 81%.
90
80
70
60
50
40
30
20
10
Features include feed-forward input compensation, cycle-to-cycle
drive current protection and other voltage sensing, line (to positive
output) regulation <1% for an input range of +13V to +18V and load
regulation to positive output of <3% for ∆I (+) of 0.1 to 1A.
L
The main pulse-width modulator operates to 48kHz with power
switching at 24kHz.
V
16
V
1
1.5
2
2.5
Z
SL00381
Figure 22. Feed-Forward Regulation
14
1994 Aug 31
Philips Semiconductors
Product specification
Switched-mode power supply control circuit
NE/SE5560
NOTES:
Power ground and signal ground must be kept separated
T1, Primary = 130T (C.T.) #26
Secondary = 18T (C.T.) #22
Core = Ferroxcube 3622
3C8 material
C.T. = 50T #26 0n
Ferroxcube 2616 core (3C8)
F2D bobbin
T2, Primary = 16T (C.T.) #18 Secondaries (each) 52T (C.T.) #22
Core = Ferroxcube 4229 3C8 material
L
, L = 120T #20 on single gapped EC35 Ferroxcube core. 3C8 material.
2
1
SL00382
Figure 23. NE/SE5560 Push-Pull Switched-Mode Regulated Supply with CMOS Drive Conversion Logic
15
1994 Aug 31
Philips Semiconductors
Product specification
Switched-mode power supply control circuit
NE/SE5560
NOTES:
Power ground and signal ground must be kept separated
T1, Primary = 130T (C.T.) #26
Secondary = 18T (C.T.) #22
Core = Ferroxcube 3622
3C8 material
C.T. = 50T #26 0n
Ferroxcube 2616 core (3C8)
F2D bobbin
T2, Primary = 16T (C.T.) #18 Secondaries (each) 52T (C.T.) #22
Core = Ferroxcube 4229 3C8 material
L
, L = 120T #20 on single gapped EC35 Ferroxcube core. 3C8 material.
2
1
SL00383
Figure 24. NE/SE5560 Push-Pull Switched-Mode Regulated With TTL Drive Conversion Logic
16
1994 Aug 31
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