T1023NXE7PQA [NXP]
RISC Microprocessor, 64-Bit, CMOS, PBGA525;
| 型号： | T1023NXE7PQA |
| 厂家： | 
NXP |
| 描述： | RISC Microprocessor, 64-Bit, CMOS, PBGA525 时钟 外围集成电路 |
| 文件： | 总3页 (文件大小：135K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
QorIQ T1024/14 and T1023/13
Communications Processors
Next-generation system-on-chip (SoC) for low-cost enterprise and service provider
edge and network control applications
TARGET APPLICATIONS
single- or dual-core performance for cost and power sensitive
networking systems. Both versions offer an excellent software
compatible 64-bit and I/O upgrade path for the popular QorIQ
P10XX family of 32-bit communications processors.
Wired and wireless branch routers
WLAN 11ac enterprise access points
Service provider WLAN access points
Unified threat management gateways
Multifunction printers
SOFTWARE AND TOOL SUPPORT
With the help of our partner network, we deliver a wide
range of tools, run-time software, reference solutions and
services to accelerate your designs.
Router and switch controllers
Line card controllers
CodeWarrior Development Studio for Power Architecture
technology
Industrial automation and computing, single board
computers
Proprietary QorIQ Linux® SDK
Aerospace and defense ruggedized network equipment
VortiQa application software
– VortiQa application identification software (AIS)
– Enterprise software for networking
– VortiQa open network switch software
– VortiQa open network director software
The QorIQ T1024/23 communications processors combine
single or dual 64-bit cores, built on Power Architecture®
technology, with high-performance Data Path Acceleration
Architecture (DPAA) and network peripheral bus interfaces
required for networking and telecommunications applications.
The T1024 and T1014 processors come in a full featured 23
x 23 mm package which provides scalable pin compatibility
with the quad-core T1042 processor, and even the eight-core
T2081 processor, for price and power scaling with a single
system design. The T1023 and T1013 processors are interfaces
and power-optimized SoCs designed to deliver impressive
Professional services and support
– Commercial services
QorIQ P1020 AND T102X PROCESSORS COMPARISON TABLE
P1020/11
T1023/13
1-2 x e5500
64-bit
T1024/14
1-2 x e5500
64-bit
T1042
4 x e5500
64-bit
Core
1-2 x e500v2
– Linux SDK support package
Power ISA
32-bit
Max MHz
800
1400
1400
1400
– Reference design software (RDS)
support package
L2 Backside Cache
Platform Cache
DDR Type and Speed
DDR Speed
DDR Width
SerDes
–
256 KB
256 KB
3L/4 1600MTs
to 1600MTs
36 b
256 KB
256 KB
3L/4 1600MTs
to 1600MTs
36 b/72 b
4
256 KB
256 KB
3L/4 1600MTs
to 1600MTs
36 b/72 b
8
256 KB
Third-party software and tools
2/3 1333MTs
to 1333MTs
– Enea, Green Hills, Mentor Graphics
and Wind River
36 b
4
4
PCIe Lanes
GbE
2 x 1 v1
3 x 1 v2
up to 4
1
3 x 1 v2
up to 4
1
4 x 1 v2
up to 5
-
up to 3
10GbE I/O
MACSEC
–
–
All ports
DPAA
All ports
DPAA
All ports
DPAA
Hardware Offload
Crypto
–
SEC 3.x
–
SEC 5.x
–
SEC 5.x
–
SEC 5.x
Yes
Pattern Matching
QUICC Engine TDM/
HDLC, ISDN, Industrial
Yes
–
Yes
Yes
SATA
–
2.0 x 1
2.0 x 1
2.0 x 2
USB
2.0 x 2
2.0 x 2 w Phy
2.0 x 2 w Phy
2.0 x 2 w Phy
Lossless Deep Sleep
Auto Response
Display Interface
Single Clock Source
Package
–
–
Yes
Yes
–
–
Yes
Yes
–
-
Yes
Yes
Yes
Yes
–
31 x 31 PBGA
No
Yes
19 x 19 FCBGA
No
23 x 23 FCBGA
Yes
23 x 23 FCBGA
Yes
Pin Compatible
QORIQ T1014 AND T1024 COMMUNICATIONS PROCESSOR
Not on T1014
Power Architecture®
e5500
256 KB
Backside
L2 Cache
32/64-bit
32 KB
32 KB
I-Cache
256 KB
DDR3L/4
Platform Cache
D-Cache
Memory Controller
Security Fuse Processor
Security Monitor
16-bit IFC
CoreNet Coherency Fabric
Peripheral
Access
PAMU
PAMU
Parse, Classify, Distribute
PAMU
PAMU
Mgmt. Unit
Real-Time Debug
Power Management
SDXC/eMMC
2x DUART
QUICC
Engine
Security 5.x Queue
(XoR CRC) Mgr.
Watchpoint
2x DMA
10GbE
1GbE 1GbE 1GbE
Cross Trigger
4x I2C
Perf.
Trace
Monitor
Buffer
Mgr.
SPI, GPIO
2x USB 2.0 w/PHY
DIU
4-Lane 10 GHz SerDes
Core Complex (CPU, L2, L3 Cache)
Basic Peripherals and Interconnect
Accelerators and Memory Control
Networking Elements
QorIQ T1023/24 PROCESSORS FEATURES LIST
Two or four e5500 single-threaded
cores built on Power Architecture
technology
•
•
•
•
Up to 1.4 GHz with 64-bit ISA support
Low latency, per core, core clocked 256 KB dedicated cache
Hybrid 32-bit mode to support legacy software and transition to a 64-bit architecture
Nap, wait and doze low-power modes
CoreNet platform cache
•
•
256 KB shared platform cache for stashing support
Hierarchical interconnect fabric
CoreNet fabric supporting coherent and non-coherent transactions with prioritization and
bandwidth allocation amongst CoreNet endpoints
•
•
QMAN fabric supporting packet-level queue management and quality of service
64-bit DDR3L/4 SDRAM memory
controller with ECC support
32-bit or 64-bit low power DDR up to 1600 MT/s
DPAA incorporating acceleration for
the following functions
•
•
•
•
•
•
Full L2/3 tunneling and en/decrypt offload support for functions such as WLAN
CAPWAP/DTLS secure wired links
Packet parsing, classification and distribution
Queue management for scheduling, packet sequencing and congestion management
Hardware buffer management for buffer allocation and de-allocation
Cryptography acceleration (SEC 5.x)
SerDes
•
•
Four lanes at up to 10 Gbit/s
Supports SGMII, 2.5 Gbit SGMII, QSGMII, XFI, 10G BASE-KR, PCI Express® and SATA
Ethernet interfaces
•
•
Up to 4 x Ethernet MACs
QUICC Engine module
Integrated support for legacy WAN protocols TDM, HDLC, UART, ISDN and industrial
protocols
High-speed
•
Three PCI Express 2.0 controller
peripheral interfaces
Additional peripheral interfaces
•
•
•
•
•
•
•
One serial ATA (SATA 2.0) controller
Two high-speed USB 2.0 controllers with integrated PHYs
Enhanced secure digital host controller (SD/MMC/eMMC)
Enhanced serial peripheral interface
Two I2C controllers
Four UARTS
Integrated flash controller supporting NAND and NOR flash memory
DMA
•
•
Dual four channel
Support for hardware virtualization
and partitioning enforcement
Extra privileged level for hypervisor support
QorIQ trust architecture
Single source clocking
•
•
Secure boot, secure debug, tamper detection, volatile key storage
For BOM cost reduction
www.nxp.com/QorIQ
© 2014-2015 Freescale Semiconductor, Inc.
CodeWarrior, QorlQ and VortiQa are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. CoreNet and QUICC
Engine are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective
owners. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are trademarks
and service marks licensed by Power.org.
Document Number: T1024FS REV 2
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