TDA1517ATW/N1,118 [NXP]
TDA1517ATW - 8 W BTL or 2 × 4 W SE power TSSOP2 20-Pin;
| 型号： | TDA1517ATW/N1,118 |
| 厂家： | 
NXP |
| 描述： | TDA1517ATW - 8 W BTL or 2 × 4 W SE power TSSOP2 20-Pin 放大器 光电二极管 商用集成电路 |
| 文件： | 总20页 (文件大小：131K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA1517ATW
8 W BTL or 2 × 4 W SE power
amplifier
Product specification
2001 Apr 17
Supersedes data of 2001 Feb 14
File under Integrated Circuits, IC01
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
FEATURES
• Electrostatic discharge protection
• Thermal protection
• Requires very few external components
• Reverse polarity safe
• Flexibility in use: mono Bridge-Tied Load (BTL) and
stereo Single-Ended (SE); it should be noted that in
stereo applications the outputs of both amplifiers are in
opposite phase
• Capable of handling high energy on outputs (VP = 0 V)
• No switch-on/switch-off plop
• Low thermal resistance.
• High output power
• Low offset voltage at output (important for BTL)
• Fixed gain
GENERAL DESCRIPTION
The TDA1517ATW is an integrated class-AB output
amplifier contained in a plastic heatsink thin shrink small
outline package (HTSSOP20). The device is primarily
developed for multimedia applications.
• Good ripple rejection
• Mode select switch (operating, mute and standby)
• AC and DC short-circuit safe to ground and VP
QUICK REFERENCE DATA
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN.
TYP. MAX. UNIT
VP
6
12
−
18
V
IORM
Iq(tot)
Istb
repetitive peak output current
total quiescent current
standby current
−
−
−
2.5
80
A
40
0.1
mA
µA
100
SE application
Po
output power
THD = 10%; RL = 4 Ω
RS = 0 Ω
−
4
−
−
−
−
−
W
SVRR
αcs
supply voltage ripple rejection
channel separation
noise output voltage
input impedance
46
40
−
−
dB
dB
µV
kΩ
RS = 10 kΩ
55
50
−
Vn(o)
Zi
RS = 0 Ω
50
BTL application
Po
output power
THD = 10%; RL = 8 Ω
RS = 0 Ω
−
8
−
W
SVRR
∆VOO
Vn(o)(offset)
Zi
supply voltage ripple rejection
output offset voltage
noise output offset voltage
input impedance
50
−
−
−
dB
mV
µV
kΩ
−
150
−
RS = 0 Ω
−
70
−
25
−
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
TDA1517ATW
HTSSOP20
plastic, heatsink thin shrink small outline package; 20 leads; body
width 4.4 mm
SOT527-1
2001 Apr 17
2
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
BLOCK DIAGRAM
V
V
P1
15
P2
16
3
non-inverting
input 1
mute switch
C
m
+
−
60
kΩ
8
9
OUT1a
VA
+
−
OUT1b
2
kΩ
power stage
18 kΩ
V
P
TDA1517ATW
17
1
MODE
not
standby
switch
2
6
7
14
19
20
VA
mute
switch
connected
15 kΩ
x 1
+
+
−
standby
reference
voltage
5
SVRR
15 kΩ
mute
reference
voltage
18 kΩ
−
+
2
kΩ
12
OUT2a
OUT2b
VA
inverting
input 2
18
13
−
+
60
kΩ
C
m
mute switch
input
reference
voltage
power stage
4
10
11
MGU303
SGND
PGND1 PGND2
Fig.1 Block diagram.
3
2001 Apr 17
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
PINNING
SYMBOL
PIN
DESCRIPTION
not connected
n.c.
1
2
n.c.
not connected
non-inverting input 1
signal ground
handbook, halfpage
IN1+
3
n.c.
n.c.
1
2
3
4
5
6
7
8
9
20 n.c.
SGND
SVRR
n.c.
4
19 n.c.
5
supply voltage ripple rejection
not connected
not connected
output 1a
IN1+
18 IN2−
17 MODE
6
SGND
SVRR
n.c.
n.c.
7
16
15
V
V
OUT1a
OUT1b
PGND1
PGND2
OUT2a
OUT2b
n.c.
8
P2
P1
TDA1517ATW
9
output 1b
10
11
12
13
14
15
16
17
18
19
20
power ground 1
power ground 2
output 2a
n.c.
14 n.c.
OUT1a
OUT1b
13 OUT2b
12 OUT2a
11 PGND2
output 2b
PGND1 10
not connected
supply voltage 1
supply voltage 2
mode select switch
inverting input 2
not connected
not connected
MGU302
VP1
VP2
MODE
IN2−
n.c.
Fig.2 Pin configuration.
n.c.
FUNCTIONAL DESCRIPTION
The TDA1517ATW contains two identical amplifiers with differential input stages. This device can be used for
Bridge-Tied Load (BTL) or Single-Ended (SE) applications. The gain of each amplifier is fixed at 20 dB. A special feature
of this device is the mode select switch. Since this pin has a very low input current (<40 µA), a low cost supply switch
can be used. With this switch the TDA1517ATW can be switched into three modes:
• Standby: low supply current
• Mute: input signal suppressed
• Operating: normal on condition.
2001 Apr 17
4
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
VP
PARAMETER
supply voltage
CONDITIONS
MIN.
MAX.
UNIT.
−
−
−
−
−
−
−
−
18
18
6
V
VPSC
Vrp
AC and DC short-circuit-safe voltage
reverse polarity voltage
V
V
ERGo
IOSM
IORM
Ptot
energy handling capability at outputs VP = 0 V
non-repetitive peak output current
repetitive peak output current
total power dissipation
200
4
mJ
A
2.5
5
A
W
°C
°C
°C
Tvj
virtual junction temperature
storage temperature
150
+150
+85
Tstg
−55
−40
Tamb
ambient temperature
THERMAL CHARACTERISTICS
SYMBOL
tbf
PARAMETER
CONDITIONS
VALUE
UNIT
−
−
DC CHARACTERISTICS
VP = 12 V; Tamb = 25 °C; measured in Fig.3; unless otherwise specified.
SYMBOL
Supply
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VP
Iq
supply voltage
quiescent current
note 1
6.0
12
40
18
80
V
RL = ∞
−
mA
Operating condition
VMODE(oper) mode switch voltage level
IMODE(oper) mode switch current
8.5
−
−
VP
40
−
V
VMODE = 12 V
15
5.7
−
µA
V
VO
∆VOO
DC output voltage
−
DC output offset voltage
−
150
mV
Mute condition
VMODE(mute) mode switch voltage level
3.3
−
−
6.4
−
V
VO
∆VOO
DC output voltage
5.7
−
V
DC output offset voltage
−
150
mV
Standby condition
VMODE(stb) mode switch voltage level
Istb standby current
0
−
2
V
−
0.1
100
µA
Note
1. The circuit is DC adjusted at VP = 6 to 18 V and AC operating at VP = 8.5 to 18 V.
2001 Apr 17
5
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
AC CHARACTERISTICS
VP = 12 V; f = 1 kHz; Tamb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
SE application; note 1
Po
output power
note 2
THD = 1%
THD = 10%
Po = 1 W
2.5
3.3
−
W
3
4
−
W
THD
fro(L)
fro(H)
GV
total harmonic distortion
low frequency roll-off
high frequency roll off
voltage gain
−
0.1
25
−
−
%
−1 dB; note 3
−1 dB
−
−
Hz
kHz
dB
dB
20
19
−
−
20
−
21
1
∆GV
SVRR
channel balance
supply voltage ripple rejection
note 4
on
46
46
80
50
−
−
dB
dB
dB
kΩ
mute
standby
−
−
−
−
Zi
input impedance
60
75
Vn(o)(rms)
noise output voltage (RMS value)
note 5
on; RS = 0 Ω
on; RS = 10 kΩ
mute; note 6
RS = 10 kΩ
note 7
−
50
70
50
55
−
−
µV
µV
µV
dB
mV
−
100
−
−
αcs
channel separation
40
−
−
Vo(mote)
output voltage in mute
2
BTL application; note 8
PO
output power
note 2
THD = 1%
THD = 10%
Po = 1 W
−1 dB; note 3
−1 dB
5
6.6
8.0
0.03
25
−
W
6.5
−
−
W
THD
fro(L)
fro(H)
GV
total harmonic distortion
low frequency roll-off
high frequency roll off
voltage gain
−
%
−
−
Hz
kHz
dB
20
25
−
−
26
27
SVRR
supply voltage ripple rejection
note 4
on
50
50
80
25
−
−
dB
dB
dB
kΩ
mute
standby
−
−
−
−
Zi
input impedance
30
38
Vn(o)(rms)
noise output voltage (RMS value)
note 5
on; RS = 0 Ω
on; RS = 10 kΩ
mute; note 6
note 7
−
−
−
−
70
100
60
−
−
µV
µV
µV
mV
200
−
Vo(mute)
output voltage in mute
2
2001 Apr 17
6
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
Notes to the characteristics
1. RL = 4 Ω, measured in Fig.4.
2. Output power is measured directly at the output pins of the IC.
3. Frequency response externally fixed.
4. Vripple = Vripple(max) = 2 V (p-p); RS = 0 Ω.
5. Noise voltage measured in a bandwidth of 20 Hz to 20 kHz.
6. Noise output voltage independent of RS.
7. Vi = Vi(max) = 1 V (RMS).
8. RL = 8 Ω, measured in Fig.3.
APPLICATION INFORMATION
V
1000
CC
100
nF
µF
15
16
TDA1517ATW
3
8
9
R
i
60 kΩ
+OUT
A
B
470 nF
R
L
+IN1
8 Ω
12
13
R
−OUT
V
i
CC
60 kΩ
18
17
10 kΩ
STANDBY/
MODE
MUTE LOGIC
V
CC
SHORT CIRCUIT
AND
TEMPERATURE
PROTECTION
8.2
kΩ
15 kΩ
5
µc1
MICRO-
CONTROLLER
input
reference
voltage
µc2
15 kΩ
µc1 µc2
4
10
11
On
Mute
0
0
0
1
0
Standby 1
MGU304
PGND
SGND
Fig.3 BTL application block diagram.
2001 Apr 17
7
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
V
CC
100
nF
1000
µF
15
16
TDA1517ATW
3
220 nF
8
9
1000 µF
R
i
IN1+
A
B
60 kΩ
+OUT
R
L
4 Ω
220 nF
18
IN2−
12
13
1000 µF
−OUT
R
i
60 kΩ
V
CC
R
L
4 Ω
10 kΩ
17
5
STANDBY/
MUTE LOGIC
MODE
V
CC
SHORT CIRCUIT
AND
TEMPERATURE
PROTECTION
8.2
kΩ
15 kΩ
µc1
MICRO-
CONTROLLER
input
reference
voltage
100
µF
µc2
15 kΩ
µc1 µc2
4
10
11
On
Mute
0
0
0
1
0
Standby 1
MGU305
PGND
SGND
Fig.4 SE application block diagram.
Test conditions
Proper supply bypassing is critical for low noise
performance and high power supply rejection. The
respective capacitor locations should be as close as
possible to the device and grounded to the power ground.
Decoupling the power supply also prevents unwanted
oscillations. For suppressing higher frequency transients
(spikes) on the supply line a capacitor with low ESR
(typical 0.1 µF) has to be placed as close as possible to the
device. For suppressing lower frequency noise and ripple
signals, a large electrolytic capacitor (e.g. 1000 µF or
greater) must be placed close to the IC.
Tamb = 25 °C; unless otherwise specified: VP = 12 V, BTL
application, f = 1 kHz, RL = 8 Ω, fixed gain = 26 dB, audio
band-pass: 22 Hz to 22 kHz. In the figures as a function of
frequency a band-pass of 10 Hz to 80 kHz was applied.
The BTL application block diagram is shown in Fig.3. The
PCB layout [which accommodates both the mono (BTL)
and stereo (single-ended) application] is shown in Fig.6.
Printed-Circuit Board (PCB) layout and grounding
For high system performance levels certain grounding
techniques are imperative. The input reference grounds
have to be tied to their respective source grounds and
must have separate traces from the power ground traces;
this will separate the large (output) signal currents from
interfering with the small AC input signals. The small
signal ground traces should be located physically as far as
possible from the power ground traces. Supply and output
traces should be as wide as possible for delivering
maximum output power.
In single-ended (stereo) application a bypass capacitor
connected to pin SVR reduces the noise and ripple on the
midrail voltage. For good THD and noise performance a
low ESR capacitor is recommended.
Input configuration
It should be noted that the DC level of the input pins is
approximately 2.1 V; a coupling capacitor is therefore
necessary.
2001 Apr 17
8
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
The formula for the cut-off frequency at the input is as
1
Average listening level without any distortion yields:
Ptot
5
follows: fIC
=
------------------------------
2 × π × RiCi
PALL
=
=
= 315 mW
----------------
factor
--------------
15.85
The power dissipation can be derived from Fig.11 for 0 dB
and 12 dB headroom.
1
thus f IC
=
= 11 Hz
-----------------------------------------------------------------------------
2 × π × 30 × 10–3 × 470 × 10–9
Table 1 Power rating
As can be seen it is not necessary to use high capacitor
values for the input; so the delay during switch-on, which
is necessary for charging the input capacitors, can be
minimized. This results in a good low frequency response
and good switch-on behaviour.
POWER
DISSIPATION
RATING
HEADROOM
Po = 5 W
(THD = 0.1%)
0 dB
3.5 W
2.0 W
12 dB
In stereo applications (single-ended) coupling capacitors
on both input and output are necessary. It should be noted
that the outputs of both amplifiers are in opposite phase.
Thus for the average listening level (music power) a power
dissipation of 2.0 W can be used for the thermal PCB
calculation; see Section “Thermal behaviour (PCB design
considerations)”.
Built-in protection circuits
The IC contains two types of protection circuits:
• Short-circuits the outputs to ground, the supply to
ground and across the load: short-circuit is detected and
controlled by a SOAR protection circuit
Mode pin
For the 3 functional modes: standby, mute and operate,
the MODE pin can be driven by a 3-state logic output
stage, e.g. a microcontroller with some extra components
for DC-level shifting; see Fig.10 for the respective
DC levels.
• Thermal shut-down protection: the junction temperature
is measured by a temperature sensor. Thermal foldback
is activated at a junction temperature of >150 °C.
• Standby mode is activated by a low DC level between
0 and 2 V. The power consumption of the IC will be
reduced to <0.12 mW.
Output power
The output power as a function of supply voltage has been
measured on the output pins and at THD = 10%. The
maximum output power is limited by the maximum
allowable power dissipation and the maximum available
output current, 2.5 A repetitive peak current.
• Mute mode is activated by a DC level between
3.3 and 6.4 V. The outputs of the amplifier will be muted
(no audio output); however the amplifier is DC biased
and the DC level of the output pins stays at half the
supply voltage. The input coupling capacitors are
charged when in mute mode to avoid pop-noise.
Supply voltage ripple rejection
The SVRR has been measured without an electrolytic
capacitor on pin 5 and at a bandwidth of 10 Hz to 80 kHz.
The curves for operating and mute condition (respectively)
were measured with Rsource = 0 Ω. Only in single-ended
applications is an electrolytic capacitor (e.g. 100 µF) on
pin 5 necessary to improve the SVRR behaviour.
• The IC will be in the operating condition when the
voltage at pin MODE is between 8.5 V and VCC
.
Switch-on/switch-off
To avoid audible plops during switch-on and switch-off of
the supply voltage, the MODE pin has to be set in standby
condition (VCC level) before the voltage is applied
(switch-on) or removed (switch-off). The input and SVRR
capacitors are smoothly charged during mute mode.
Headroom
A typical music CD requires at least 12 dB (is factor 15.85)
dynamic headroom (compared with the average power
output) for passing the loudest portions without distortion.
The following calculation can be made for this application
at VP = 12 V and RL = 8 Ω: Po at THD = 0.1% is
approximately 5 W (see Fig.7).
The turn-on and turn-off time can be influenced by an
RC-circuit connected to the MODE pin. Switching the
device or the MODE pin rapidly on and off may cause ‘click
and pop’ noise. This can be prevented by proper timing on
the MODE pin. Further improvement in the BTL application
can be obtained by connecting an electrolytic capacitor
(e.g. 100 µF) between the SVRR pin and signal ground.
2001 Apr 17
9
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
Thermal behaviour (PCB design considerations)
The thermal vias (0.3 mm ) in the ‘thermal land’ should
not use web construction techniques, because those will
have high thermal resistance; continuous connection
completely around the via-hole is recommended.
The typical thermal resistance [Rth(j-a)] of the IC in the
HTSSOP20 package is 37 K/W if the IC is soldered on a
printed-circuit board with double sided 35 µm copper with
a minimum area of approximately 30 cm2. The actual
usable thermal resistance depends strongly on the
mounting method of the device on the printed-circuit
board, the soldering method and the area and thickness of
the copper on the printed-circuit board.
For a maximum ambient temperature of 60 °C the
following calculation can be made: for the application at
VP = 12 V and RL = 8 Ω the (ALL-) music power
dissipation approximately 2.0 W;
Tj(max) = Tamb + P × Rth(j-a) = 60 °C + 2.0 × 37 = 134 °C.
The bottom ‘heat-spreader’ of the IC has to be soldered
efficiently on the ‘thermal land’ of the copper area of the
printed-circuit board using the re-flow solder technique.
Note: the above calculation holds for application at
‘average listening level’ music output signals. Applying (or
testing) with sine wave signals will produce approximately
twice the music power dissipation; at worst case condition
this can activate the maximum temperature protection.
A number of thermal vias in the ‘thermal land’ provide a
thermal path to the opposite copper site of the
printed-circuit board. The size of the surface layers should
be as large as needed to dissipate the heat.
60
K/W
50
ON-BOARD-COOLING
COPPER DESIGN
CU-LAYER 1
40
L
L
R
th(j-a)
30
20
R
CU-LAYER 2-4
th(j-p)
10
0
0
1
2
3
4
number of 35 µm copper layers
MGU306
Rth(j-p) curve is given for practical calculation purpose.
L = 30 mm plus vias
Fig.5 Thermal resistance of the HTSSOP20 mounted on printed-circuit board.
2001 Apr 17
10
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
top view
top copper layout
top view
bottom copper layout
+
V
P
TDA
1517ATW
1000 µF
25 V
100 nF
220 nF
IN1
IN2
Std By
On
100 µF/16 V
1000 µF
16 V
sept −2000
−
+
OUT1
OUT2
MGU312
top view
component layout
For BTL applications the two 1000 µF/16 V capacitors must be replaced by 0 Ω jumpers.
Fig.6 Printed-circuit board layout for BTL and SE application.
11
2001 Apr 17
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
Typical performance characteristics for BTL
application at VP = 12 V and RL = 8 Ω
MGU307
MGU308
10
10
handbook, halfpage
handbook, halfpage
THD
(%)
THD
(%)
1
1
P
= 1 W
o
−1
−1
10
10
−2
−2
10
10
−2
−1
−2
−1
2
10
10
1
10
10
10
1
10
10
P
(W)
f (kHz)
o
Fig.7 THD as a function of Po.
Fig.8 THD as a function of frequency.
MGU310
MGU309
10
0
handbook, halfpage
handbook, halfpage
V
o
SVRR
(dB)
(V)
1
−20
−40
−60
−80
−1
10
−2
10
−3
10
mute
−4
10
−2
−1
2
0
2
4
6
8
10
V
12
(V)
10
10
1
10
10
f (kHz)
MODE
Fig.9 SVRR as a function of frequency.
Fig.10 Vo as a function of VMODE.
2001 Apr 17
12
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
MGU311
MGU323
6
12
handbook, halfpage
handbook, halfpage
P
o
P
(W)
(W)
10
5
V
= 12 V
4
3
2
1
0
8
P
R
= 8 Ω
L
R
6
= 4 Ω
8 Ω
16 Ω
L
V
R
= 15 V
P
L
4
2
= 16 Ω
0
6
0
2
4
6
8
10
8
10
12
14
16
V
18
(V)
P
(W)
o
P
Fig.11 Power dissipation as a function of Po.
Fig.12 Po as a function of VP.
2001 Apr 17
13
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
PACKAGE OUTLINE
HTSSOP20: plastic, heatsink thin shrink small outline package; 20 leads; body width 4.4 mm
SOT527-1
D
E
A
X
c
y
H
v
M
A
heathsink side
E
D
h
Z
11
20
(A )
3
A
2
A
E
h
A
1
pin 1 index
θ
L
p
L
1
10
detail X
w
M
b
p
e
0
2.5
scale
5 mm
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
D
E
E
e
H
L
L
p
v
w
y
Z
θ
1
2
3
p
h
h
E
max.
8o
0o
0.15 0.95
0.05 0.80
0.30 0.20 6.6
0.19 0.09 6.4
4.3
4.1
4.5
4.3
3.1
2.9
6.6
6.2
0.75
0.50
0.5
0.2
mm
1.10
0.65
0.25
1.0
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
99-11-12
00-07-12
SOT527-1
2001 Apr 17
14
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
SOLDERING
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 220 °C for
thick/large packages, and below 235 °C for small/thin
packages.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
2001 Apr 17
15
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
WAVE
not suitable
REFLOW(1)
BGA, HBGA, LFBGA, SQFP, TFBGA
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, SMS
PLCC(3), SO, SOJ
suitable
suitable
suitable
not suitable(2)
suitable
LQFP, QFP, TQFP
not recommended(3)(4) suitable
not recommended(5)
suitable
SSOP, TSSOP, VSO
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2001 Apr 17
16
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
DATA SHEET STATUS
PRODUCT
DATA SHEET STATUS(1)
STATUS(2)
DEFINITIONS
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data
Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information
Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2001 Apr 17
17
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
NOTES
2001 Apr 17
18
Philips Semiconductors
Product specification
8 W BTL or 2 × 4 W SE power amplifier
TDA1517ATW
NOTES
2001 Apr 17
19
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Internet: http://www.semiconductors.philips.com
72
SCA
© Philips Electronics N.V. 2001
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
753503/02/pp20
Date of release: 2001 Apr 17
Document order number: 9397 750 08264
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