TDA4680 [NXP]

Video processor with automatic cut-off and white level control; 具有自动切断和白电平控制视频处理器
TDA4680
型号: TDA4680
厂家: NXP    NXP
描述:

Video processor with automatic cut-off and white level control
具有自动切断和白电平控制视频处理器

商用集成电路 光电二极管
文件: 总28页 (文件大小:246K)
中文:  中文翻译
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INTEGRATED CIRCUITS  
DATA SHEET  
TDA4680  
Video processor with automatic  
cut-off and white level control  
1996 Oct 25  
Product specification  
Supersedes data of April 1993  
File under Integrated Circuits, IC02  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
FEATURES  
Operates from an 8 V DC supply  
Black level clamping of the colour difference, luminance  
and RGB input signals with coupling-capacitor DC level  
storage  
Two fully-controlled, analog RGB inputs, selected either  
by fast switch signals or via I2C-bus  
GENERAL DESCRIPTION  
Saturation, contrast and brightness adjustment via  
The TDA4680 is a monolithic integrated circuit with a  
colour difference interface for video processing in TV  
receivers. Its primary function is to process the luminance  
and colour difference signals from multistandard colour  
decoders, TDA4555, TDA4650/T, TDA4655/T or  
TDA4657, Colour Transient Improvement (CTI) IC,  
TDA4565, Picture Signal Improvement (PSI) IC,  
TDA4670, or from a feature module.  
I2C-bus  
Same RGB output black levels for Y/CD and RGB input  
signals  
Timing pulse generation from either a 2 or 3-level  
sandcastle pulse for clamping, horizontal and vertical  
synchronization, cut-off and white level timing pulses  
Automatic cut-off control with picture tube leakage  
The required input signals are:  
current compensation  
Luminance and negative colour difference signals  
Software-based automatic white level control or fixed  
white levels via I2C-bus  
2 or 3-level sandcastle pulse for internal timing pulse  
generation  
Cut-off and white level measurement pulses in the last  
4 lines of the vertical blanking interval (I2C-bus selection  
for PAL, SECAM, or NTSC, PAL-M)  
I2C-bus data and clock signals for microcontroller  
control.  
Increased RGB signal bandwidths for progressive scan  
Two sets of analog RGB colour signals can also be  
inserted, e.g. one from a peritelevision connector and the  
other from an on-screen display generator; both inputs are  
fully-controlled internally. The TDA4680 includes full  
I2C-bus control of all parameters and functions with  
automatic cut-off and white level control of the picture tube  
cathode currents. It provides RGB output signals for the  
video output stages.  
and 100 Hz operation (selected via I2C-bus)  
Two switch-on delays to prevent discolouration before  
steady-state operation  
Average beam current and peak drive limiting  
PAL/SECAM or NTSC matrix selection via I2C-bus  
Three adjustable reference voltage levels (via I2C-bus)  
for automatic cut-off and white level control  
There is a very similar IC TDA4681 available. The only  
differences are in the NTSC matrix.  
Emitter-follower RGB output stages to drive the video  
output stages  
Hue control output for the TDA4555, TDA4650/T,  
TDA4655/T or TDA4657.  
ORDERING INFORMATION  
PACKAGE  
TYPE NUMBER  
NAME  
DESCRIPTION  
VERSION  
TDA4680  
DIP28  
plastic dual in-line package; 28 leads (600 mil)  
plastic leaded chip carrier; 28 leads  
SOT117-1  
SOT261-2  
TDA4680WP  
PLCC28  
1996 Oct 25  
2
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
QUICK REFERENCE DATA  
SYMBOL  
PARAMETER  
MIN.  
7.2  
TYP.  
8.0  
MAX.  
8.8  
UNIT  
VP  
supply voltage (pin 5)  
supply current (pin 5)  
V
IP  
85  
mA  
V
V8(p-p)  
V6(p-p)  
V7(p-p)  
V14  
luminance input (peak-to-peak value)  
0.45  
1.33  
1.05  
(B Y) input (peak-to-peak value)  
V
(R Y) input (peak-to-peak value)  
V
3-level sandcastle pulse  
H + V  
2.5  
4.5  
8.0  
V
V
V
H
BK  
2-level sandcastle pulse  
H + V  
0
2.5  
4.5  
0.7  
2.0  
V
BK  
V
Vi(p-p)  
Vo(b-w)  
Tamb  
RGB input signals at pins 2, 3, 4, 10, 11 and 12 (peak-to-peak value)  
RGB outputs at pins 24, 22 and 20 (black-to-white value)  
operating ambient temperature  
V
V
70  
°C  
1996 Oct 25  
3
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off and  
white level control  
TDA4680  
BLOCK DIAGRAM  
EM6D93  
a n d b o o k , f u l l p a g e w  
1996 Oct 25  
4
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
PINNING  
SYMBOL PIN  
DESCRIPTION  
SYMBOL PIN  
DESCRIPTION  
fast switch 2 input  
CPDL  
storage capacitor for peak drive  
limiting  
FSW2  
R2  
1
2
3
4
5
6
7
8
9
16  
red input 2  
CL  
17 storage capacitor for leakage current  
18 white level measurement input  
19 cut-off measurement input  
20 blue output  
G2  
green input 2  
WI  
B2  
blue input 2  
CI  
VP  
supply voltage  
BO  
(B Y)  
(R Y)  
Y
colour difference input (B Y)  
colour difference input (R Y)  
luminance input  
ground  
CB  
21 blue cut-off storage capacitor  
22 green output  
GO  
CG  
RO  
CR  
23 green cut-off storage capacitor  
24 red output  
GND  
R1  
10 red input 1  
25 red cut-off storage capacitor  
G1  
11 green input 1  
HUE  
SDA  
SCL  
26 hue control output  
B1  
12 blue input 1  
27 I2C-bus serial data input/output  
28 I2C-bus serial clock input  
FSW1  
SC  
13 fast switch 1 input  
14 sandcastle pulse input  
15 average beam current limiting input  
BCL  
handbook, halfpage  
FSW  
R
1
2
28 SCL  
27 SDA  
26 HUE  
2
2
2
2
G
3
V
5
6
25 C  
R
P
B
4
25  
24  
23  
22  
21  
20  
C
R
C
R
O
G
(B Y)  
(R Y)  
Y
24 R  
O
V
5
P
7
23 C  
G
(B Y)  
6
8
22 G  
21 C  
TDA4680WP  
O
(R Y)  
Y
7
G
C
O
TDA4680  
GND  
9
B
8
B
R
1
10  
11  
20 B  
O
GND  
9
B
O
G
1
19 CI  
R
1
10  
11  
12  
19 CI  
18 WI  
G
1
MED695  
B
1
17  
16  
C
C
L
FSW 13  
1
PDL  
SC 14  
15 BCL  
MED694  
Fig.2 Pin configuration for DIP-version.  
Fig.3 Pin configuration for PLCC-version.  
1996 Oct 25  
5
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
I2C-BUS  
Control  
I2C-BUS RECEIVER (MICROCONTROLLER WRITE MODE)  
Each transmission to/from the I2C-bus transceiver  
consists of at least three bytes following the START bit.  
Each byte is acknowledged by an acknowledge bit  
immediately following each byte. The first byte is the  
Module Address (MAD) byte, also called slave address  
byte. This consists of the module address, 1000100 for the  
TDA4680, plus the R/W bit (see Fig.4). When the  
TDA4680 is a slave receiver (R/W = 0) the module  
address byte is 10001000 (88H). When the TDA4680 is a  
slave transmitter (R/W = 1) the module address byte is  
10001001 (89H).  
The I2C-bus transmitter/receiver provides the data bytes to  
select and adjust the following functions and parameters:  
Brightness adjust  
Saturation adjust  
Contrast adjust  
Hue control voltage  
RGB gain adjust  
RGB reference voltage levels  
Peak drive limiting  
The length of a data transmission is unrestricted, but the  
module address and the correct sub-address must be  
transmitted before the data byte(s). The order of data  
transmission is shown in Figs 5 and 6.  
Without auto-increment (BREN = 0 or 1) the module  
address (MAD) byte is followed by a Sub-Address (SAD)  
byte and one data byte only (see Fig.5).  
Selection of the vertical blanking interval and  
measurement lines for cut-off and white level control  
according to transmission standard  
Selects either 3-level or 2-level (5 V) sandcastle pulse  
Enables/disables input clamping pulse delay  
Enables/disables white level control  
Enables cut-off control; enables output clamping  
Enables/disables full screen white level  
Enables/disables full screen black level  
Selects either PAL/SECAM or NTSC matrix  
Enables saturation adjust; enables nominal saturation  
Enables/disables synchronization of the execution of  
I2C-bus commands with the vertical blanking interval  
Reads the result of the comparison of the nominal and  
actual RGB signal levels for automatic white level  
control.  
I2C-bustransmitter/receiver and data transfer  
I2C-BUS SPECIFICATION  
The I2C-bus is a bidirectional, two-wire, serial data bus for  
intercommunication between ICs in a system.  
The microcontroller transmits/receives data from the  
I2C-bus transceiver in the TDA4680 over the serial data  
line SDA (pin 27) synchronized by the serial clock line SCL  
(pin 28). Both lines are normally connected to a positive  
voltage supply through pull-up resistors. Data is  
transferred when the SCL line is LOW. When SCL is HIGH  
the serial data line SDA must be stable. A HIGH-to-LOW  
transition of the SDA line when SCL is HIGH is defined as  
a START bit. A LOW-to-HIGH transition of the SDA line  
when SCL is HIGH is defined as a STOP bit.  
Each transmission must start with a START bit and end  
with a STOP bit. The bus is busy after a START bit and is  
only free again after a STOP bit has been transmitted.  
1996 Oct 25  
6
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
MSB  
LSB  
0
1
0
0
0
1
0
X
ACK  
module address  
R/W  
MED696  
Fig.4 The module address byte.  
STA MAD SAD  
START  
STO  
MED697  
STOP  
condition  
condition  
data byte  
Fig.5 Data transmission without auto-increment (BREN = 0 or 1).  
STA MAD SAD  
START  
STO  
MED698  
STOP  
condition  
condition  
data byte  
data bytes  
Fig.6 Data transmission with auto-increment (BREN = 0).  
7
1996 Oct 25  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
WPEN (White Pulse Enable):  
AUTO-INCREMENT  
0 = white measuring pulse disabled  
The auto-increment format enables quick slave receiver  
initialization by one transmission, when the I2C-bus control  
bit BREN = 0 (see control register bits of Table 1).  
If BREN = 1 auto-increment is not possible.  
1 = white measuring pulse enabled.  
BREN (Buffer Register Enable):  
0 = new data is executed as soon as it is received  
If the auto-increment format is selected, the MAD byte is  
followed by a SAD byte and by the data bytes of  
consecutive sub-addresses (Fig.6).  
1 = data is stored in buffer registers and is transferred to  
the data registers during the next vertical blanking  
interval.  
All sub-addresses from 00H to 0FH are automatically  
incremented, the sub-address counter wraps round from  
0FH to 00H. Reserved sub-addresses 0BH, 0EH and 0FH  
are treated as legal but have no effect. Sub-addresses  
outside the range 00H and 0FH are not acknowledged by  
the device and neither auto-increment nor any other  
internal operation takes place (for versions V1 to V5  
sub-addresses outside the range 00H and 0FH are  
acknowledged but neither auto-increment nor any other  
internal operation takes place).  
The I2C-bus transceiver does not accept any new data  
until this data is transferred into the data registers.  
DELOF (Delay Off) delays the leading edge of clamping  
pulses:  
0 = delay enabled  
1 = delay disabled.  
SC5 (SandCastle 5 V):  
0 = 3-level sandcastle pulse  
1 = 2-level (5 V) sandcastle pulse.  
Sub-addresses are stored in the TDA4680 to address the  
following parameters and functions (see Table 1):  
CONTROL REGISTER 2  
Brightness adjust  
Saturation adjust  
FSON2 (Fast Switch 2 ON)  
FSDIS2 (Fast Switch 2 Disable)  
FSON1 (Fast Switch 1 ON)  
FSDIS1 (Fast Switch 1 Disable)  
Contrast adjust  
Hue control voltage  
RGB gain adjust  
RGB reference voltage levels  
Peak drive limiting adjust  
Control register functions.  
The RGB input signals are selected by FSON2 and  
FSON1 or FSW2 and FSW1:  
FSON2 has priority over FSON1  
FSW2 has priority over FSW1  
The data bytes D7 to D0 (see Table 1) provide the data of  
the parameters and functions for video processing.  
FSDIS1 and FSDIS2 disable FSW1 and FSW2  
(see Table 3).  
CONTROL REGISTER 1  
BCOF (Black level Control Off):  
VBWx (Vertical Blanking Window):  
0 = automatic cut-off control enabled  
x = 0, 1 or 2. VBWx selects the vertical blanking interval  
and positions the measurement lines for cut-off and  
white level control.  
1 = automatic cut-off control disabled; RGB outputs are  
clamped to fixed DC levels.  
FSBL (Full Screen Black Level):  
0 = normal mode  
The actual lines in the vertical blanking interval after the  
start of the vertical pulses selected as measurement lines  
for cut-off and white level control are shown in Table 2.  
1 = full screen black level (cut-off measurement level  
during full field).  
The standards marked with (*) are for progressive line  
scan at double line frequency (2fL), i.e. approximately  
31 kHz.  
FSWL (Full Screen White Level):  
0 = normal mode  
NMEN (NTSC Matrix Enable):  
0 = PAL/SECAM matrix  
1 = NTSC matrix.  
1 = full screen white level (white measurement level  
during full field).  
1996 Oct 25  
8
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
SATOF (Saturation control Off):  
0 = saturation control enabled  
2-BIT WHITE LEVEL ERROR SIGNAL (see Table 4)  
CB1, CB0 = 2-bit white level of the blue channel.  
CG1, CG0 = 2-bit white level of the green channel.  
CR1, CR0 = 2-bit white level of the red channel.  
1 = saturation control disabled, nominal saturation  
enabled.  
I2C-BUS TRANSMITTER (MICROCONTROLLER READ MODE)  
As an I2C-bus transmitter, R/W = 1, the TDA4680 sends a  
data byte from the status register to the microcontroller.  
The data byte consists of following bits: PONRES, CB1,  
CB0, CG1, CG0, CR1, CR0 and 0, where PONRES is the  
most significant bit.  
PONRES (Power On Reset) monitors the state of  
TDA4680’s supply voltage:  
0 = normal operation  
1 = supply voltage has dropped below approximately  
6.0 V (usually occurs when the TV receiver is switched  
on or the supply voltage was interrupted).  
When PONRES changes state from a logic LOW to a logic  
HIGH all data and function bits are set to logic LOW.  
Table 1 Sub-address (SAD) and data bytes; note 1  
MSB  
SAD  
LSB  
D0  
FUNCTION  
(HEX)  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
Brightness  
00  
01  
02  
03  
04  
05  
06  
07  
08  
09  
0A  
0B  
0C  
0D  
0E  
0F  
0
0
0
0
0
0
0
0
0
0
0
0
X
A05  
A15  
A25  
A35  
A45  
A55  
A65  
A75  
A85  
A95  
AA5  
X
A04  
A14  
A24  
A34  
A44  
A54  
A64  
A74  
A84  
A94  
AA4  
X
A03  
A13  
A23  
A33  
A43  
A53  
A63  
A73  
A83  
A93  
AA3  
X
A02  
A12  
A22  
A32  
A42  
A52  
A62  
A72  
A82  
A92  
AA2  
X
A01  
A11  
A21  
A31  
A41  
A51  
A61  
A71  
A81  
A91  
AA1  
X
A00  
A10  
A20  
A30  
A40  
A50  
A60  
A70  
A80  
A90  
AA0  
X
Saturation  
0
Contrast  
0
Hue control voltage  
Red gain  
0
0
Green gain  
0
Blue gain  
0
Red level reference  
Green level reference  
Blue level reference  
Peak drive limit  
Reserved  
0
0
0
0
X
Control register 1  
Control register 2  
Reserved  
SC5  
DELOF BREN WPEN NMEN VBW2  
VBW1  
VBW0  
SATOF FSWL  
FSBL  
BCOF FSDIS2 FSON2 FSDIS1 FSON1  
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Reserved  
Note  
1. X = don’t care.  
1996 Oct 25  
9
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
Table 2 Cut-off and white level measurement lines; notes 1 to 3  
VBW2  
VBW1  
VBW0  
R
G
B
WHITE  
STANDARD  
0
0
0
1
1
1
0
0
1
0
0
1
0
1
0
0
1
0
19  
16  
20  
17  
21  
18  
22  
19  
PAL/SECAM  
NTSC/PAL M  
22  
23  
24  
25  
PAL/SECAM (EB)  
PAL*/SECAM*  
38, 39  
32, 33  
44, 45  
40, 41  
34, 35  
46, 47  
42, 43  
36, 37  
48, 49  
44, 45  
38, 39  
50, 51  
NTSC*/PAL M*  
PAL*/SECAM* (EB)  
Notes  
1. The line numbers given are those of the horizontal pulse counts after the start of the vertical component of the  
sandcastle pulse.  
2. * line frequency of approximately 31 kHz.  
3. (EB) is extended blanking.  
Table 3 Signal input selection by the fast source switches; notes 1 to 4  
I2C-BUS CONTROL BITS  
ANALOG SWITCH SIGNALS  
INPUT SELECTED  
RGB1  
FSW2  
FSW1  
FSON2 FSDIS2 FSON1 FSDIS1  
RGB2  
Y/CD  
(PIN 1)  
(PIN 13)  
L
L
L
L
L
L
L
H
X
X
X
X
X
L
ON  
ON  
ON  
H
L
ON  
ON  
ON  
L
L
L
L
L
L
H
L
H
X
L
ON  
H
L
H
X
X
X
X
X
H
ON  
ON  
H
X
X
X
ON  
ON  
L
L
H
H
X
L
H
X
H
X
X
H
ON  
Notes  
1. H: logical HIGH implies that the voltage >0.9 V.  
2. L: logical LOW implies that the voltage <0.4 V.  
3. X = don’t care.  
4. ON indicates the selected input signal.  
1996 Oct 25  
10  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
Table 4 2-bit white level error signals; bits CX1 and CX0  
CX1  
CX0  
INTERPRETATION  
0
1
1
0
0
0
1
1
RAR (Reset-After-Read): no new measurements since last read  
actual (measured) white level less than the tolerance range  
actual (measured) white level within the tolerance range  
actual (measured) white level greater than the tolerance range  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 134).  
SYMBOL  
PARAMETER  
MIN.  
MAX.  
8.8  
UNIT  
VP  
Vi  
supply voltage (pin 5)  
V
V
V
V
input voltage (pins 1 to 8, 10 to 13, 16, 21, 23 and 25)  
input voltage (pins 14, 15, 18 and 19)  
input voltage (pins 27 and 28)  
average current (pins 20, 22 and 24)  
peak current (pins 20, 22 and 24)  
input current  
0.1  
0.7  
0.1  
+4  
+VP  
VP + 0.7  
+8.8  
10  
20  
2
Iav  
IM  
mA  
mA  
mA  
mA  
°C  
+4  
I18  
I26  
0
output current  
+0.5  
20  
0
8  
Tstg  
Tamb  
Ptot  
storage temperature  
+150  
70  
operating ambient temperature  
total power dissipation  
°C  
SOT117-1  
1.2  
1.0  
W
W
SOT261-2  
1996 Oct 25  
11  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
CHARACTERISTICS  
All voltages are measured in test circuit of Fig.10 with respect to GND (pin 9); VP = 8.0 V; Tamb = 25 °C; nominal signal  
amplitudes (black-to-white) at output pins 24, 22 and 20; nominal settings of brightness, contrast, saturation and white  
level control; without beam current or peak drive limiting; unless otherwise specified.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
Supply (pin 5)  
VP  
IP  
supply voltage  
supply current  
7.2  
8.0  
8.8  
V
85  
110  
mA  
Colour difference inputs [(B Y): pin 6; (R Y): pin 7]  
V6(p-p)  
V7(p-p)  
V6,7  
(B Y) input (peak-to-peak value)  
(R Y) signal (peak-to-peak value)  
internal DC bias voltage  
notes 1 and 2  
1.33  
1.05  
3.1  
V
notes 1 and 2  
V
at black level clamping  
during line scan  
V
I6,7  
input current  
0.15  
µA  
µA  
MΩ  
at black level clamping  
100  
10  
R6,7  
AC input resistance  
Luminance/sync (VBS; Y: pin 8)  
Vi(p-p)  
luminance input voltage at pin 8  
note 2  
0.45  
V
(peak-to-peak value)  
internal DC bias voltage  
input current  
V8(bias)  
I8  
at black level clamping  
during line scan  
3.1  
V
0.15  
µA  
µA  
MΩ  
at black level clamping  
100  
10  
R8  
AC input resistance  
RGB input 1 (R1: pin 10; G1: pin 11; B1: pin 12)  
Vi(p-p)  
input voltage at pins 10, 11 and 12  
(peak-to-peak value)  
note 2  
0.7  
V
V10/11/12(bias) internal DC bias voltage  
at black level clamping  
during line scan  
5.4  
V
I10/11/12  
input current  
0.15  
µA  
µA  
MΩ  
at black level clamping  
100  
10  
R10/11/12  
AC input resistance  
RGB input 2 (R2: pin 2, G2: pin 3, B2: pin 4)  
Vi(p-p)  
input voltage at pins 2, 3 and 4  
(peak-to-peak value)  
note 2  
0.7  
V
V2/3/4  
I2/3/4  
internal DC bias voltage  
input current  
at black level clamping  
during line scan  
5.4  
V
0.15  
µA  
µA  
MΩ  
at black level clamping  
100  
10  
R2/3/4  
AC input resistance  
1996 Oct 25  
12  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
Fast signal switch FSW1 (pin 13) to select Y, CD or R1, G1, B1 inputs (control bits: see Table 3)  
V13  
voltage to select Y and CD  
0.4  
V
voltage range to select R1, G1, B1  
internal resistance to ground  
0.9  
5.0  
V
R13  
4.0  
kΩ  
ns  
t  
difference between transit times for  
signal switching and signal insertion  
10  
Fast signal switch FSW2 (pin 1) to select Y, CD/R1, G1, B1 or R2, G2, B2 inputs (control bits: see Table 3)  
V1  
voltage to select Y, CD/R1, G1, B1  
voltage to select R2, G2, B2  
internal resistance to ground  
0.4  
5.0  
V
0.9  
V
R1  
4.0  
kΩ  
ns  
t  
difference between transit times for  
signal switching and signal insertion  
10  
Saturation adjust [acts on internal RGB signals under I2C-bus control; sub-address 01H (bit resolution 1.5%  
of maximum saturation); data byte 3FH for maximum saturation, data byte 23H for nominal saturation and  
data byte 00H for minimum saturation]  
ds  
saturation below maximum  
at 23H  
5
dB  
dB  
at 00H; f = 100 kHz  
50  
Contrast adjust [acts on internal RGB signals under I2C-bus control; sub-address 02H (bit resolution 1.5% of  
maximum contrast); data byte 3FH for maximum contrast, data byte 2CH for nominal contrast and data byte  
00H for minimum contrast]  
dc  
contrast below maximum  
at 2CH  
at 00H  
3
dB  
dB  
22  
Brightness adjust [acts on internal RGB signals under I2C-bus control; sub-address 00H (bit resolution 1.5%  
of brightness range); data byte 3FH for maximum brightness, data byte 27H for nominal brightness and data  
byte 00H for minimum brightness]  
dbr  
black level shift of nominal signal  
amplitude referred to cut-off  
measurement level  
at 3FH  
at 00H  
30  
%
%
50  
White potentiometers [under I2C-bus control; sub-addresses 04H (red), 05H (green) and 06H (blue); data byte  
3FH for maximum gain; data byte 22H for nominal gain and data byte 00H for minimum gain]; note 3  
Gv  
relative to nominal gain  
increase of AC gain  
decrease of AC gain  
at 3FH  
at 00H  
60  
60  
%
%
1996 Oct 25  
13  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
RGB outputs (pins 24, 22 and 20; positive going output signals and no peak drive limitation;  
sub-address 0AH = 3FH); note 4  
Vo(b-w)  
nominal output signals  
(black-to-white value)  
2.0  
V
maximum output signals  
(black-to-white value)  
3.2  
V
Vo  
spread between RGB output signals  
output voltages  
10  
%
V
Vo  
6.8  
2.3  
0.8  
2.7  
V24,22,20  
voltage of cut-off measurement line  
output clamping  
(BCOF = 1)  
2.5  
V
Iint  
Ro  
internal current sources  
output resistance  
5.0  
65  
mA  
110  
Frequency response  
frequency response of Y path  
d
f = 10 MHz  
f = 8 MHz  
f = 10 MHz  
3
3
3
dB  
dB  
dB  
(from pin 8 to pins 24, 22, 20)  
frequency response of CD path  
(from pins 7 to 24 and 6 to 20)  
frequency response of RGB1 path  
(from pins 10 to 24, 11 to 22 and  
12 to 20)  
frequency response of RGB2 path  
f = 10 MHz  
3
dB  
(from pins 2 to 24, 3 to 22 and 4 to 20)  
Sandcastle pulse detector (pin 14)  
CONTROL BIT SC5 = 0; 3-LEVEL; notes 5 and 6  
V14  
sandcastle pulse voltage  
for horizontal and vertical blanking  
pulses  
2.0  
2.5  
3.0  
5.0  
V
V
for horizontal pulses (line count)  
for burst key pulses  
4.0  
6.3  
4.5  
VP + 0.7 V  
CONTROL BIT SC5 = 1; 2-LEVEL; note 5  
V14  
sandcastle pulse voltage  
for horizontal and vertical blanking  
pulses  
2.0  
4.0  
2.5  
4.5  
3.0  
V
for burst key pulses  
VP + 0.7 V  
1996 Oct 25  
14  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
GENERAL  
I14  
td  
input current  
V14 < 0.5 V  
100  
µA  
µs  
µs  
µs  
leading edge delay of the clamping  
pulse  
control bit DELOF = 0  
control bit DELOF = 1  
3
1.5  
0
tBK  
required burst key pulse time  
control bit DELOF = 0;  
normally used with fL  
control bit DELOF = 1;  
normally used with 2fL  
1.5  
4
µs  
npulse  
required horizontal or burst key pulses e.g. at interlace scan  
29  
57  
during vertical blanking interval  
(VBW2 = 0)  
e.g. at progressive line  
scan (VBW2 = 1)  
8
Average beam current limiting (pin 15); note 7  
Vc(15)  
contrast reduction starting voltage  
4.0  
V
V
Vc(15)  
voltage difference for full contrast  
reduction  
2.0  
Vbr(15)  
brightness reduction starting voltage  
2.5  
V
V
Vbr(15)  
voltage difference for full brightness  
reduction  
1.6  
Peak drive limiting voltage [pin 16; internal peak drive limiting level (Vpdl) acts on RGB outputs under I2C-bus  
control; sub-address 0AH]; note 8  
V20/22/24  
RGB output voltages  
at 00H  
at 3FH  
3.0  
V
6.5  
V
I16  
charge current  
1  
5
µA  
mA  
V
discharge current  
during peak white  
V16  
internal voltage limitation  
contrast reduction starting voltage  
4.5  
Vc(16)  
Vc(16)  
4.0  
2.0  
V
voltage difference for full contrast  
reduction  
V
Vbr(16)  
brightness reduction starting voltage  
2.5  
V
V
Vbr(16)  
voltage difference for full brightness  
reduction  
1.6  
1996 Oct 25  
15  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
Automatic cut-off and white level control (pins 19 and 18); notes 9 to 11; see Fig.8  
V19  
I19  
permissible voltage (also during  
scanning period)  
VP 1.4 V  
output current  
140  
µA  
input current  
150  
µA  
mA  
V
additional input current  
warming up amplitude (under I2C-bus switch-on delay 1  
control; sub-address 0AH)  
only during warming up  
0.5  
V24,22,20  
V19(th)  
Vref  
V
pdl 0.7  
voltage threshold for picture tube  
cathode warming up  
switch-on delay 1  
5.0  
3.0  
V
V
internally controlled voltage  
during leakage  
measurement period  
DATA BYTE 07H FOR RED REFERENCE LEVEL, DATA BYTE 08H FOR GREEN REFERENCE LEVEL AND DATA BYTE 09H FOR BLUE  
REFERENCE LEVEL  
V19  
difference between VMEAS (cut-off or  
white level measurement voltage) and  
Vref  
3FH (maximum VMEAS  
20H (nominal VMEAS  
00H (minimum VMEAS  
)
1.5  
V
)
1.0  
V
)
0.5  
800  
V
I18  
input current  
white level measurement −  
to Vref; I18 800 µA  
white level measurement −  
µA  
R18  
V19  
internal resistance  
100  
250  
white level register (measured value  
within tolerance range)  
mV  
Storage of cut-off control voltage/output clamping voltage (pins 25, 23 and 21)  
I21/23/25  
charge and discharge currents  
during cut-off  
0.3  
mA  
measurement lines  
input currents of storage inputs  
outside measurement  
time  
0.1  
µA  
Storage of leakage information (pin 17)  
I17  
charge and discharge currents  
during leakage  
0.4  
mA  
measurement period  
leakage current  
outside time LM  
0.1  
3.0  
µA  
V17  
voltage for reset to switch-on below  
V
Hue control (under I2C-bus control; sub-address 03H; data byte 3FH for maximum voltage; data byte 20H for  
nominal voltage and data byte 00H for minimum voltage); note 12  
V26  
output voltage  
at 3FH  
at 20H  
at 00H  
4.8  
V
3.0  
V
1.0  
V
Iint  
current of the internal current source  
at pin 26  
500  
µA  
1996 Oct 25  
16  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
I2C-bus transceiver clock SCL (pin 28)  
fSCL  
VIL  
VIH  
IIL  
IIH  
tL  
input frequency range  
LOW level input voltage  
HIGH level input voltage  
LOW level input current  
HIGH level input current  
clock pulse LOW  
0
100  
kHz  
V
1.5  
6.0  
3.0  
10  
V
V28 = 0.4 V  
µA  
µA  
µs  
µs  
µs  
µs  
10  
4.7  
4.0  
tH  
clock pulse HIGH  
rise time  
tr  
1.0  
0.3  
tf  
fall time  
I2C-bus transceiver data input/output SDA (pin 27)  
VIL  
VIH  
IIL  
LOW level input voltage  
HIGH level input voltage  
LOW level input current  
HIGH level input current  
LOW level output current  
rise time  
1.5  
6.0  
V
3.0  
10  
V
V27 = 0.4 V  
V27 = 0.4 V  
µA  
µA  
mA  
µs  
µs  
µs  
IIH  
10  
IOL  
tr  
3.0  
1.0  
0.3  
tf  
fall time  
tSU;DAT  
data set-up time  
0.25  
Notes to the characteristics  
1. The values of the (B Y) and (R Y) colour difference input signals are for a 75% colour-bar signal.  
2. The pins are capacitively coupled to a low ohmic source, with a recommended maximum output impedance of 600 .  
3. The white potentiometers affect the amplitudes of the RGB output signals including the white measurement pulses.  
4. The RGB outputs at pins 24, 22 and 20 are emitter followers with current sources.  
5. Sandcastle pulses are compared with internal threshold voltages independent of VP. The threshold voltages  
separate the components of the sandcastle pulse. The particular component is generated when the voltage on pin 14  
exceeds the defined internal threshold voltage.  
The internal threshold voltages (control bit SC5 = 0) are:  
1.5 V for horizontal and vertical blanking pulses  
3.5 V for horizontal pulses  
6.0 V for the burst key pulse.  
The internal threshold voltages (control bit SC5 = 1) are:  
1.5 V for horizontal and vertical blanking pulses  
3.5 V for the burst key pulse.  
6. A sandcastle pulse with a maximum voltage equal to (VP + 0.7 V) is obtained by limiting a 12 V sandcastle pulse.  
7. Average beam current limiting reduces the contrast, at minimum contrast it reduces the brightness.  
8. Peak drive limiting reduces the RGB outputs by reducing the contrast, at minimum contrast it reduces the brightness.  
The maximum RGB outputs are determined via the I2C-bus under sub-address 0AH. When an RGB output exceeds  
the maximum voltage, peak drive limiting is delayed by one horizontal line.  
1996 Oct 25  
17  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off and  
white level control  
TDA4680  
9. The vertical blanking interval is defined by a vertical pulse which contains 4 (8) or more horizontal pulses; it begins  
with the start of the vertical pulse and ends with the end of the white measuring line. If the vertical pulse is longer  
than the selected vertical blanking window the blanking period ends with the end of the complete line after the end  
of the vertical pulse. The counter cycle time is 31 (63) horizontal pulses. If the vertical pulse contains more than  
29 (57) horizontal pulses, the black level storage capacitors will be discharged while all signals are blanked.  
During leakage current measurement, the RGB channels are blanked to ultra-black level. During cut-off  
measurement one channel is set to the measurement pulse level, the other channels are blanked to ultra-black.  
Since the brightness adjust shifts the colour signal relative to the black level, the brightness adjust is disabled during  
the vertical blanking interval (see Figs 7 and 8).  
10. During picture cathode warming up (first switch-on delay) the RGB outputs (pins 24, 22 and 20) are blanked to the  
ultra-black level during line scan. During the vertical blanking interval a white-level monitor pulse is fed out on the  
RGB outputs and the cathode currents are measured. When the voltage threshold on pin 19 is greater than 5.0 V,  
the monitor pulse is switched off and cut-off and white level control are activated (second switch-on delay). As soon  
as cut-off control stabilizes, RGB output blanking is removed.  
11. Range of cut-off measurement level at the RGB outputs is 1 to 5 V. The recommended value is 3 V.  
12. The hue control output at pin 26 is an emitter follower with current source.  
Table 5 Demodulator axes and amplification factors  
PARAMETER  
(B Y)* demodulator axis  
NTSC  
0°  
PAL  
0°  
(R Y)* demodulator axis  
(R Y)* amplification factor  
(B Y)* amplification factor  
115°  
1.97  
2.03  
90°  
1.14  
2.03  
Table 6 PAL/SECAM and NTSC matrix; notes 1 and 2  
MATRIX  
PAL/SECAM  
NTSC  
NMEN  
0
1
Notes  
1. PAL/SECAM signals are matrixed by the equation: VG Y = 0.51VR Y 0.19VB Y  
NTSC signals are matrixed by the equations (hue phase shift of 5 degrees):  
VR Y* = 1.57VR Y 0.41VB Y; VG Y* = 0.43VR Y 0.11VB Y; VB Y* = VB Y  
In the matrix equations: VR Y and VB Y are conventional PAL demodulation axes and amplitudes at the output of  
the NTSC demodulator. VG Y*, VR Y* and VB Y* are the NTSC-modified colour difference signals; this is equivalent  
to the demodulator axes and amplification factors shown in Table 5. VG Y* = 0.27VR Y* 0.22VB Y*  
.
2. The vertical blanking interval is selected via the I2C-bus (see Table 2 and Fig.8). Vertical blanking is determined by  
the vertical component of the sandcastle pulse; this vertical component has priority when it is longer than the vertical  
blanking interval of the transmission standard.  
1996 Oct 25  
18  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
MED701  
(1)  
(2)  
white measurement level  
for green signal  
cut-off measurement level  
for green signal  
ultra-black level  
(2) Nominal brightness.  
(1) Maximum brightness.  
Fig.7 Cut-off and white level measurement pulses.  
621 622 623 624 625 1  
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28  
vertical flyback 850 µs  
V component of the sandcastle pulse  
LM  
(leakage current measurement time)  
PAL,  
SECAM  
vertical blanking interval, 22 complete lines  
MR MG MB WR  
WG  
WB  
V component of the sandcastle pulse  
LM  
NTSC,  
PAL M  
cut-off and  
white level  
measurement  
pulses  
vertical blanking interval, 19 complete lines  
MR MG MB WR  
WG  
WB  
V component of the sandcastle pulse  
PAL,  
SECAM  
(with  
increased  
vertical  
blanking  
interval)  
LM  
vertical blanking interval, 25 complete lines  
MR MG MB WR  
MED702  
WG  
WB  
Fig.8 Leakage current, cut-off and white level current measurement timing diagram.  
bnok,lfuapgedwith  
1996 Oct 25  
19  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off and  
white level control  
TDA4680  
INTERNAL PIN CONFIGURATION  
EM6D9  
a n d b o o k , f u l l p a g e w  
1996 Oct 25  
20  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off and  
white level control  
TDA4680  
TEST AND APPLICATION INFORMATION  
EM7D0  
bnok,lfuapgedwith  
1996 Oct 25  
21  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
PACKAGE OUTLINES  
handbook, full pagewidth  
DIP28: plastic dual in-line package; 28 leads (600 mil)  
SOT117-1  
D
M
E
A
2
A
L
A
1
c
e
w M  
Z
b
1
(e )  
1
b
M
H
28  
15  
pin 1 index  
E
1
14  
0
5
10 mm  
scale  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
(1)  
A
max.  
A
A
Z
(1)  
(1)  
1
2
UNIT  
mm  
b
b
c
D
E
e
e
L
M
M
w
1
1
E
H
min.  
max.  
max.  
1.7  
1.3  
0.53  
0.38  
0.32  
0.23  
36.0  
35.0  
14.1  
13.7  
3.9  
3.4  
15.80  
15.24  
17.15  
15.90  
5.1  
0.51  
4.0  
2.54  
0.10  
15.24  
0.60  
0.25  
0.01  
1.7  
0.013  
0.009  
0.066  
0.051  
0.020  
0.014  
1.41  
1.34  
0.56  
0.54  
0.15  
0.13  
0.62  
0.60  
0.68  
0.63  
inches  
0.20  
0.020  
0.16  
0.067  
Note  
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
92-11-17  
95-01-14  
SOT117-1  
051G05  
MO-015AH  
1996 Oct 25  
22  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
PLCC28: plastic leaded chip carrier; 28 leads  
SOT261-2  
e
e
E
E
y
X
A
E
b
p
25  
19  
b
1
Z
E
18  
26  
w
M
28  
1
H
E
pin 1 index  
e
A
A
1
A
4
12  
4
k
1
β
(A )  
3
k
5
11  
L
p
v
M
A
Z
e
D
detail X  
D
H
B
v
M
B
D
0
5
10 mm  
scale  
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)  
(1)  
(1)  
A
min.  
A
max.  
k
1
max.  
Z
Z
E
(1)  
(1)  
1
4
D
UNIT  
mm  
A
A
b
D
E
e
e
e
H
H
k
L
p
v
w
y
β
b
D
E
D
E
3
p
1
max. max.  
4.57  
4.19  
0.81 11.58 11.58  
0.66 11.43 11.43  
10.92 10.92 12.57 12.57 1.22  
9.91 9.91 12.32 12.32 1.07  
1.44  
1.02  
0.53  
0.33  
0.51  
0.51 0.25 3.05  
0.020 0.01 0.12  
1.27  
0.05  
0.18 0.18 0.10 2.16 2.16  
0.007 0.007 0.004 0.085 0.085  
o
45  
0.180  
0.165  
0.032 0.456 0.456  
0.026 0.450 0.450  
0.430 0.430 0.495 0.495 0.048  
0.390 0.390 0.485 0.485 0.042  
0.057  
0.040  
0.021  
0.013  
inches  
0.020  
Note  
1. Plastic or metal protrusions of 0.01 inches maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
92-11-17  
95-02-25  
SOT261-2  
1996 Oct 25  
23  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
Reflow soldering requires solder paste (a suspension of  
fine solder particles, flux and binding agent) to be applied  
to the printed-circuit board by screen printing, stencilling or  
pressure-syringe dispensing before package placement.  
SOLDERING  
Introduction  
There is no soldering method that is ideal for all IC  
packages. Wave soldering is often preferred when  
through-hole and surface mounted components are mixed  
on one printed-circuit board. However, wave soldering is  
not always suitable for surface mounted ICs, or for  
printed-circuits with high population densities. In these  
situations reflow soldering is often used.  
Several techniques exist for reflowing; for example,  
thermal conduction by heated belt. Dwell times vary  
between 50 and 300 seconds depending on heating  
method. Typical reflow temperatures range from  
215 to 250 °C.  
Preheating is necessary to dry the paste and evaporate  
the binding agent. Preheating duration: 45 minutes at  
45 °C.  
This text gives a very brief insight to a complex technology.  
A more in-depth account of soldering ICs can be found in  
our “IC Package Databook” (order code 9398 652 90011).  
WAVE SOLDERING  
DIP  
Wave soldering techniques can be used for all PLCC  
packages if the following conditions are observed:  
SOLDERING BY DIPPING OR BY WAVE  
The maximum permissible temperature of the solder is  
260 °C; solder at this temperature must not be in contact  
with the joint for more than 5 seconds. The total contact  
time of successive solder waves must not exceed  
5 seconds.  
A double-wave (a turbulent wave with high upward  
pressure followed by a smooth laminar wave) soldering  
technique should be used.  
The longitudinal axis of the package footprint must be  
parallel to the solder flow.  
The device may be mounted up to the seating plane, but  
the temperature of the plastic body must not exceed the  
specified maximum storage temperature (Tstg max). If the  
printed-circuit board has been pre-heated, forced cooling  
may be necessary immediately after soldering to keep the  
temperature within the permissible limit.  
The package footprint must incorporate solder thieves at  
the downstream corners.  
During placement and before soldering, the package must  
be fixed with a droplet of adhesive. The adhesive can be  
applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the  
adhesive is cured.  
REPAIRING SOLDERED JOINTS  
Maximum permissible solder temperature is 260 °C, and  
maximum duration of package immersion in solder is  
10 seconds, if cooled to less than 150 °C within  
Apply a low voltage soldering iron (less than 24 V) to the  
lead(s) of the package, below the seating plane or not  
more than 2 mm above it. If the temperature of the  
soldering iron bit is less than 300 °C it may remain in  
contact for up to 10 seconds. If the bit temperature is  
between 300 and 400 °C, contact may be up to 5 seconds.  
6 seconds. Typical dwell time is 4 seconds at 250 °C.  
A mildly-activated flux will eliminate the need for removal  
of corrosive residues in most applications.  
PLCC  
REPAIRING SOLDERED JOINTS  
REFLOW SOLDERING  
Fix the component by first soldering two diagonally-  
opposite end leads. Use only a low voltage soldering iron  
(less than 24 V) applied to the flat part of the lead. Contact  
time must be limited to 10 seconds at up to 300 °C.  
When using a dedicated tool, all other leads can be  
soldered in one operation within 2 to 5 seconds between  
270 and 320 °C.  
Reflow soldering techniques are suitable for all PLCC  
packages.  
The choice of heating method may be influenced by larger  
PLCC packages (44 leads, or more). If infrared or vapour  
phase heating is used and the large packages are not  
absolutely dry (less than 0.1% moisture content by  
weight), vaporization of the small amount of moisture in  
them can cause cracking of the plastic body. For more  
information, refer to the Drypack chapter in our “Quality  
Reference Handbook” (order code 9397 750 00192).  
1996 Oct 25  
24  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off  
and white level control  
TDA4680  
DEFINITIONS  
Data sheet status  
Objective specification  
Preliminary specification  
Product specification  
This data sheet contains target or goal specifications for product development.  
This data sheet contains preliminary data; supplementary data may be published later.  
This data sheet contains final product specifications.  
Limiting values  
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or  
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation  
of the device at these or at any other conditions above those given in the Characteristics sections of the specification  
is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices, or systems where malfunction of these  
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for  
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such  
improper use or sale.  
PURCHASE OF PHILIPS I2C COMPONENTS  
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the  
components in the I2C system provided the system conforms to the I2C specification defined by  
Philips. This specification can be ordered using the code 9398 393 40011.  
1996 Oct 25  
25  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off and  
white level control  
TDA4680  
NOTES  
1996 Oct 25  
26  
Philips Semiconductors  
Product specification  
Video processor with automatic cut-off and  
white level control  
TDA4680  
NOTES  
1996 Oct 25  
27  
Philips Semiconductors – a worldwide company  
Argentina: see South America  
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,  
Tel. +31 40 27 82785, Fax. +31 40 27 88399  
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Tel. +61 2 9805 4455, Fax. +61 2 9805 4466  
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Tel. +64 9 849 4160, Fax. +64 9 849 7811  
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,  
Tel. +43 1 60 101, Fax. +43 1 60 101 1210  
Norway: Box 1, Manglerud 0612, OSLO,  
Tel. +47 22 74 8000, Fax. +47 22 74 8341  
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,  
220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773  
Philippines: Philips Semiconductors Philippines Inc.,  
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Belgium: see The Netherlands  
Brazil: see South America  
Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,  
Tel. +48 22 612 2831, Fax. +48 22 612 2327  
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,  
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Tel. +359 2 689 211, Fax. +359 2 689 102  
Portugal: see Spain  
Romania: see Italy  
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,  
Tel. +1 800 234 7381  
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,  
Tel. +7 095 247 9145, Fax. +7 095 247 9144  
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Tel. +852 2319 7888, Fax. +852 2319 7700  
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,  
Tel. +65 350 2538, Fax. +65 251 6500  
Colombia: see South America  
Czech Republic: see Austria  
Slovakia: see Austria  
Slovenia: see Italy  
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,  
Tel. +45 32 88 2636, Fax. +45 31 57 1949  
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Tel. +55 11 821 2333, Fax. +55 11 829 1849  
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Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427  
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Tel. +34 3 301 6312, Fax. +34 3 301 4107  
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,  
Tel. +49 40 23 53 60, Fax. +49 40 23 536 300  
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,  
Tel. +46 8 632 2000, Fax. +46 8 632 2745  
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,  
Tel. +30 1 4894 339/239, Fax. +30 1 4814 240  
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,  
Tel. +41 1 488 2686, Fax. +41 1 481 7730  
Hungary: see Austria  
India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd.  
Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722  
Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66,  
Chung Hsiao West Road, Sec. 1, P.O. Box 22978,  
TAIPEI 100, Tel. +886 2 382 4443, Fax. +886 2 382 4444  
Indonesia: see Singapore  
Ireland: Newstead, Clonskeagh, DUBLIN 14,  
Tel. +353 1 7640 000, Fax. +353 1 7640 200  
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,  
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,  
Tel. +66 2 745 4090, Fax. +66 2 398 0793  
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180,  
Tel. +972 3 645 0444, Fax. +972 3 649 1007  
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,  
Tel. +90 212 279 2770, Fax. +90 212 282 6707  
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,  
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557  
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,  
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461  
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,  
Tel. +81 3 3740 5130, Fax. +81 3 3740 5077  
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,  
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421  
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,  
Tel. +82 2 709 1412, Fax. +82 2 709 1415  
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,  
Tel. +1 800 234 7381  
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,  
Tel. +60 3 750 5214, Fax. +60 3 757 4880  
Uruguay: see South America  
Vietnam: see Singapore  
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,  
Tel. +9-5 800 234 7381  
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,  
Tel. +381 11 625 344, Fax.+381 11 635 777  
Middle East: see Italy  
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,  
Internet: http://www.semiconductors.philips.com  
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825  
© Philips Electronics N.V. 1996  
SCA52  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
537021/1200/02/pp28  
Date of release: 1996 Oct 25  
Document order number: 9397 750 00946  

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