TDA8443A [NXP]
I2C-bus controlled YUV/RGB switch; I2C总线控制的YUV / RGB开关
| 型号： | TDA8443A |
| 厂家： | 
NXP |
| 描述： | I2C-bus controlled YUV/RGB switch |
| 文件： | 总20页 (文件大小：127K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8443A
I2C-bus controlled YUV/RGB switch
1995 Mar 07
Product specification
Supersedes data of November 1992
File under Integrated Circuits, IC02
Philips Semiconductors
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
FEATURES
• Two RGB/YUV selectable clamped inputs with
associated synchronization
• RGB/YUV matrix
• 3-state switching with an OFF-state
• Selectable gain
• I2C-bus or non-I2C-bus mode
• Address selection for 7 devices
• Fast switching.
GENERAL DESCRIPTION
The TDA8443A is a general purpose two-channel switch
for YUV or RGB signals. One channel provides matrixing
from RGB to YUV, which can be bypassed.
The IC is controlled via I2C-bus by seven different
addresses or can be used in a non-I2C-bus mode. In the
non-I2C-bus mode, control of the circuit is achieved by DC
voltages.
QUICK REFERENCE DATA
SYMBOL
VP
IP
RGB/YUV channels
PARAMETER
supply voltage (pin 18)
supply current
CONDITIONS
MIN.
10.8
TYP.
12.0
MAX.
13.2
UNIT
V
−
65
90
mA
Z19-22
Z20-22
Z21-22
B
output impedance (pin 19)
−
7
30
30
30
−
Ω
output impedance (pin 20)
output impedance (pin 21)
bandwidth
−
7
Ω
−
7
Ω
−3 dB; mode 0 or 2
+3 dB; mode 0 or 2
±3 dB; mode 1
gain × 1
−
25
12
10
−
MHz
MHz
MHz
V
−
−
−
−
VO(p−p)
maximum output amplitude of YUV
signals (peak-to-peak value)
2.1
4.2
0
−
gain × 2
−
−
V
Tamb
operating ambient temperature
−
+70
°C
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
TDA8443A
DIP24
plastic dual in-line package; 24 leads (600 mil)
SOT101-1
1995 Mar 07
2
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
BLOCK DIAGRAM
outputs
B/ (B Y)
input
G/Y
input
R/ (R Y)
GND
SYNC
output
clamp pulse
generator
V
SDA SCL S0 S1 S2
13 14 15 16 17
P
input
18
19
20
21
22
23
24
2
I C-BUS INTERFACE/
DECODER
TDA8443A
A4
A3
A2
A1
FAST
SWITCHING
B3
B2
B1
MATRIX
RGB/YUV
CLAMP PULSE
GENERATOR
CLAMP
CLAMP CLAMP
CLAMP CLAMP
CLAMP
4
9
8
12
11
10
7
6
5
2
3
1
ON
input
B/ (B Y)
input
G/Y
input
R/ (R Y) internal B/ (B Y)
input voltage input
G/Y
input
R/ (R Y)
input
SYNC2
fast
switching
SEL
SYNC1
MLD003
channel 1
channel 2
Fig.1 Block diagram.
3
1995 Mar 07
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
PINNING
SYMBOL
SEL
PIN
DESCRIPTION
1
select input
(non-I2C-bus mode only)
SYNC2
2
synchronization input for
Channel 2
FS
3
4
5
6
7
8
fast switching input
handbook, halfpage
SEL
SYNC2
FS
1
2
3
4
5
6
7
8
9
24 CLAMP
R/±(R−Y)IN
G/Y IN
R or (R−Y) signal input
G or Y signal input
23 SYNC
B/±(B−Y)IN
VINT
B or (B−Y) signal input
internal voltage supply
22 GND
R/ (R Y) IN
G/Y IN
21 R/ (R Y) OUT
20 G/Y OUT
19 B/ (B Y) OUT
SYNC1
synchronization input for
Channel 1
B/ (B Y) IN
V INT
ON
9
ON input
TDA8443A
V
P
18
R/−(R−Y)IN
G/Y IN
B/−(B−Y)IN
SDA
10 R or −(R−Y) signal input
11 G or Y signal input
SYNC1
17 S2
16 S1
15 S0
14 SCL
13 SDA
12 B or −(B−Y) signal input
13 serial data input/output; I2C-bus
14 serial clock input; I2C-bus
15 address selection input 0
16 address selection input 1
17 address selection input 2
18 supply voltage
ON
R/ (R Y) IN 10
G/Y IN 11
SCL
S0
B/ (B Y) IN 12
S1
MLD004
S2
VP
B/−(B−Y)OUT
G/Y OUT
R/−(R−Y)OUT
GND
19 B or −(B−Y) signal output
20 G or Y signal output
21 R or −(R−Y) signal output
22 ground
SYNC
CLAMP
23 synchronization output
24 clamping pulse generator
input/output
Fig.2 Pin configuration.
1995 Mar 07
4
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
I2C-bus mode
FUNCTIONAL DESCRIPTION
The protocol for the devices in I2C-bus mode is shown
in Fig.3.
The circuit contains two sets of inputs (see Fig.1). Both
channels can receive RGB or YUV signals. Each set of
inputs has its own synchronization input, which internally
generates a pulse to clamp the inputs. The internal
clamping pulse can also be controlled by a signal (e.g. a
sandcastle pulse) applied to pin 24. The pulse will occur
during the time that the signal at pin 24 is between
5.5 and 6.5 V. If both a sync signal and a pin 24 signal are
used the signal should be applied to pin 24 via a 1 kΩ
resistor.
Table 1 Protocol bit description
BIT
DESCRIPTION
start condition
MA2 to MA0 address selection bits; see Table 2
STA
ACK
acknowledge bit
D7
channel selection bit; see Table 3
matrix selection bit; see Table 3
gain control bits; see Table 4
fast switching priority bit; see Table 5
output state control bits; see Table 6
stop condition
RGB signals of Channel 2 can be matrixed to YUV signals.
D6
The outputs can be set in a high impedance OFF state,
which allows the use of seven devices in parallel
(I2C-bus mode).
D5 to D3
D2
D1 and D0
STO
The circuit can be controlled by an I2C-bus compatible
microcontroller or directly by DC voltages. The fast
switching input can be operated via pin 16 of the
peritelevision connector.
STA
1
1
0
1
MA2 MA1 MA0
0
ACK D7
D6
D5 D4
D3 D2
D1 D0 ACK STO
MSA003
See Table 1.
Fig.3 I2C-bus protocol.
1995 Mar 07
5
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
Table 2 Address selection
ADDRESS SELECT PINS(1)(2)
ADDRESS SELECT BITS
S2 (PIN 17)
S1 (PIN 16)
S0 (PIN 15)
MA2
MA1
MA0
(3)
(3)
(3)
L
L
L
L
L
H
L
0
0
0
1
1
1
1
0
1
1
0
0
1
1
1
0
1
0
1
0
1
L
H
H
L
L
H
L
H
H
H
H
L
H
L
H
H
H
Notes
1. L = LOW level input voltage.
2. H = HIGH level input voltage.
3.
= non-I2C-bus operation.
Table 3 Mode control bits D7 and D6
MODE
D7
0
D6
0
FUNCTION
0
1
2
−
Channel 2 selected, no matrix
Channel 2 selected, matrix active
Channel 1 selected
0
1
1
0
1
1
not allowed
Table 4 Gain setting (see also Table 9)
D5
0
D4
0
D3
A1
A2, A3, A4
B1, B3
B2
0.45
1
0
1
0
1
0
1
0
1
1
1
1
1
−1
1
0
0
0
1
not allowed
−
−
0
1
1
2
2
2
2
1
2
1
2
1
−1
−1
1
0.45
0.45
1
1
0
1
0
1
1
1
1
1
1
−1
0.45
Matrix equations
The relationship between output and input signals of the matrix is as follows:
Y = 0.3R + 0.59G + 0.11B
R−Y = 0.7R − 0.59G − 0.11B
B−Y = −0.3R − 0.59G + 0.89B
1995 Mar 07
6
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
Table 5 Priority/fast switching bit D2
Table 6 Output state control bits
FAST SWITCHING
D1
D0
PIN 9
X(1)
L
FUNCTION
D2
MODE
(PIN 3)
0
1
1
1
X(1)
0
OFF
OFF
ON
0
X(1)
0 to 2, depending on
D7, D6
0
H
X(1)
1
0.4 V
2
1
ON
Note
Note
1. X = don't care.
1. X = don't care.
Power-on reset
If the circuit is switched on in the I2C-bus mode, all bits of D0 to D7 are set to zero.
Table 7 Non-I2C-bus mode (S2 = S1 = S0 = L)
CONTROL
GAIN SETTINGS
A1 A4, A3, A2
MODE SWITCHED BY
FS (PIN 3)
B1, B3
B2
PIN 13
PIN 14
PIN 1
L
L
L
L
L
H
L
2 or 0
2 or 0
2 or 1
2 or 0
2 or 0
2 or 0
2 or 1
2 or 0
1
1
1
1
2
2
2
2
1
2
1
1
1
2
1
1
1
1
1
1
L
H
H
L
−1
−1
1
0.45
0.45
1
L
H
L
H
H
H
H
L
H
L
1
1
H
H
−1
−1
0.45
0.45
H
Table 8 Fast switching input (pin 3)
Table 9 ON input (pin 9)
FS
MODE SELECTED
ON
FUNCTION
≤0.4 V mode 2
L
OFF; no output signal; high impedance
OFF-state
1 to 3 V mode 0 or mode 1 as set by control
H
function is determined in Table 7
1995 Mar 07
7
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
SYMBOL
VP
PARAMETER
MIN.
MAX.
14
UNIT
supply voltage (pin 18)
input voltage (pin 13)
input voltage (pin 14)
input voltage any other pin
maximum output current
−
V
V
V
V
VI(SDA)
VI(SCL)
Vn
−0.3
−0.3
−0.3
−
14
14
VP + 0.3
20
IO(max)
Tamb
Tstg
mA
°C
°C
°C
operating ambient temperature
IC storage temperature range
maximum junction temperature
0
+70
−55
−
+125
+125
Tj
CHARACTERISTICS
VP = 12 V; Tamb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Supply
VP
supply voltage (pin 18)
supply current
10.8
12.0
13.2
90
V
IP
−
65
mA
RGB/YUV channels
Gabs
absolute gain difference
(programmed value)
−
−
0
0
10
10
%
%
Grel
relative gain difference
between Y output and the
(R−Y) and (B−Y) channel
outputs
between any other two
channels
−
0
5
%
II
input current
−
−
−
−
−
−
−
−
0.5
7
1.0
30
30
30
−
µA
Ω
|Z19-22
|Z20-22
|Z21-22
B
|
|
|
output impedance (pin 19)
output impedance (pin 20)
output impedance (pin 21)
bandwidth
7
Ω
7
Ω
−3 dB; mode 0 or 2
+3 dB; mode 0 or 2
±3 dB; mode 1
25
12
10
−
MHz
MHz
MHz
ns
−
−
tdiff
mutual time difference at output
all inputs of one source
connected together
25
Vo(p-p)
maximum output amplitude of YUV gain × 1
2.1
4.2
−
−
−
−
−
V
signals (peak-to-peak value)
gain × 2
−
V
αct
crosstalk
note 1; fi = 5 MHz; between
−30
dB
inputs of same source
note 1; between same source
fi = 10 MHz
−
−
−
−40
dB
dB
αoff
isolation (OFF state)
50
−
1995 Mar 07
8
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
SYMBOL
PARAMETER
CONDITIONS
R−Y = 1.05 V (p-p)
B−Y = 1.33 V (p-p)
Y = 0.34 V (p-p)
MIN.
TYP.
MAX. UNIT
Gdiff(p-p)
differential gain at nominal output
signals (peak-to-peak value)
−
−
−
−
−
−
−
10
%
%
%
dB
10
10
−
S/N
signal-to-noise ratio
nominal input; B = 5 MHz;
note 2
50
SVRR
VO
supply voltage ripple rejection
note 3
30
−
−
−
dB
V
DC output levels during clamping
−
5.3
Synchronization channels
Gdiff
B
gain difference (programmed value)
−
−
10
−
%
bandwidth
−3 dB
−
50
20
13
−
MHz
MHz
MHz
V
+3 dB; gain × 1
±3 dB; gain × 2
−
−
−
−
Vi(p-p)
input amplitude of sync signal for
correct operation of clamp pulse
generator (peak-to-peak value)
0.2
2.5
|Z23-22
|
output impedance (pin 23)
−
20
30
Ω
Vo(p-p)
maximum undistorted output
amplitude (pin 23)
2.5
−
−
V
(peak-to-peak value)
VO
DC output level on top of sync pulse
1.5
1.9
2.4
V
I2C-bus inputs for SDA, SCL
VIH
VIL
IIH
HIGH level input voltage
3
−
−
−
−
VP
1.5
10
10
V
LOW level input voltage
HIGH level input current
LOW level input current
−0.3
−
V
µA
µA
IIL
−
I2C-bus output for SDA (open collector)
VOL LOW level output voltage
Address selection inputs for S0, S1, S2
IOL = 3 mA
−
−
0.4
V
VIH
VIL
IIH
HIGH level input voltage
LOW level input voltage
HIGH level input current
LOW level input current
3
−
VP
0.4
10
0
V
−0.3
−
−
V
0
µA
µA
IIL
−50
−10
Fast switching input
VIH
VIL
IIH
IIL
HIGH level input voltage
1
−
3
V
LOW level input voltage
HIGH level input current
LOW level input current
switching time
−0.3
−
−
0.4
500
−
V
0
µA
µA
ns
ns
−100
−
−
tsw
td
see Fig.5
see Fig.5
10
20
−
switching delay
−
−
1995 Mar 07
9
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Select input
VIH
VIL
IIH
HIGH level input voltage
LOW level input voltage
HIGH level input current
LOW level input current
3
−
VP
V
−0.3
−
−
0.4
10
0
V
0
µA
µA
IIL
−50
−10
ON input
VIH
VIL
IIH
HIGH level input voltage
LOW level input voltage
HIGH level input current
LOW level input current
3
−
−
−
−
VP
1.5
10
10
V
−0.3
−
V
µA
µA
IIL
−
Notes
1. Crosstalk is defined as the unwanted data transfer from an output, driven at nominal level, to other inputs and outputs
on the IC and is expressed as a ratio in dBs.
Vo (p – p)
2. Signal-to-noise ratio = 20log
(B = 5 MHz)
----------------------
Vno (rms)
VRR (supply)
3. Supply voltage ripple rejection = 20log
-----------------------------------------
VRR (at the output)
1995 Mar 07
10
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
TIMING CHARACTERISTICS
I2C-bus load conditions: 4 kΩ pull-up resistor to +5 V; 200 pF capacitor to GND;
all values are referenced to VIH = 3 V and VIL = 1.5 V; see Fig.4.
SYMBOL
tBUF
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
time bus must be free before start
set-up time for start condition
hold time for start condition
SCL and SDA LOW time
SCL HIGH time
4.7
4.7
4.0
4.7
4.0
−
−
µs
µs
µs
µs
µs
µs
µs
ns
µs
µs
µs
µs
tSU;STA
tHD;STA
tLOW
−
−
−
tHIGH
−
tr
SCL and SDA rise time
SCL and SDA fall time
1.0
0.3
−
tf
−
tSU;DAT
tHD;DAT
tSU;ACK
tHD;ACK
tSU;STO
data set-up time (write)
data hold time (write)
250
1.0
−
note 1
−
acknowledge set-up time
acknowledge hold time
set-up time for stop condition
2
0
−
4.7
−
Note
1. Timing tHD;DAT deviates from the I2C-bus specification. After reset has been activated, a delay of 50 µs must occur
before transmission may be resumed.
SDA
(WRITE)
t
t
t
LOW
BUF
HD; DAT
t
t
HD; ACK
SU; ACK
t
t
f
r
SCL
t
t
t
HIGH
SU; STA
LOW
t
SU; STO
t
t
SU; DAT
HD; STA
MLD005
Fig.4 I2C-bus timing diagram.
1995 Mar 07
11
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
fast switching
switching
delay
input signal
90 %
output signal
50 %
(YUV)
10 %
MLD006
switching time
Fig.5 Fast switching signal diagram.
1995 Mar 07
12
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
APPLICATION INFORMATION
Table 10 Channel input/output information
INPUT 1
Y = 0.34 V
U = −1.33 V
V = −1.05 V
S = 0.3 V
INPUT 2
OUTPUT
MODE
D5
D4
D3
Y = 0.34 V
U = −1.33 V
V = −1.05 V
S = 0.6 V
−
2
1
1
1
0
0
0
0
1
1
1
R = 0.75 V
G = 0.75 V
B = 0.75 V
S = 0.3 V
Y = 0.34 V
U = −1.33 V
V = −1.05 V
S = 0.6 V
−
1
2
1
2
0
2
0
1
1
1
1
1
1
1
1
0
0
1
1
0
0
Y = 0.34 V
U = −1.33 V
V = −1.05 V
S = 0.3 V
Y = 0.68 V
U = −2.66 V
V = −2.10 V
S = 0.6 V
−
R = 0.75 V
G = 0.75 V
B = 0.75 V
S = 0.3 V
Y = 0.68 V
U = −2.66 V
V = −2.10 V
S = 0.6 V
−
Y = 0.34 V
U = −1.33 V
V = −1.05 V
S = 0.3 V
Y = 0.34 V
U = −1.33 V
V = −1.05 V
S = 0.6 V
−
Y = 0.34 V
U = −1.33 V
V = −1.05 V
S = 0.3 V
Y = 0.34 V
U = −1.33 V
V = −1.05 V
S = 0.6 V
−
Y = 0.34 V
U = −1.33 V
V = −1.05 V
S = 0.3 V
Y = 0.68 V
U = −2.66 V
V = −2.10 V
S = 0.6 V
−
Y = 0.34 V
U = −1.33 V
V = −1.05 V
S = 0.3 V
Y = 0.68 V
U = −2.66 V
V = −2.10 V
S = 0.6 V
−
1995 Mar 07
13
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
outputs
Y
outputs
SYNC CLAMP
V
V
SDA
SCL
S0
15
S1
16
S2
17
P
(B Y)
(R Y)
GND
P
4.7
kΩ
1 nF
13
14
18
19
20
21
22
23
24
TDA8443A
12
11
10
9
8
7
6
5
4
3
2
1
4.7
µF
4.7
µF
47
nF
47
nF
47
nF
47
nF
47
nF
47
nF
22
nF
(B Y)
Y
(R Y)
ON
SYNC1 internal
voltage
SEL
B
G
R
FS
17
SYNC2
7
9
11 13
15
19
channel 1
(colour decoder)
8
10 12 14 16 18 20
MLD007
channel 2
(peritelevision connector)
Fig.6 Application diagram (example).
1995 Mar 07
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Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
When the synchronization pulse is over, the current
source is switched off and the voltage at pin 24 will rise
to its higher level. Because of the time constant at
pin 24, the restoration will take some microseconds.
The voltage at pin 24 is also sensed internally and at
the time it is between 0.456VP and 0.544VP, a time
pulse is generated and used for the clamping action.
Input clamps
The R, G, B respectively (R−Y), Y and (B−Y) video signals
are AC-coupled to the IC where they are clamped on the
black level. The timing information for this clamping action
is derived from the associated synchronization signal
SYNC, which could also consist of the composite video
information signal CVBS. The syncsignal is AC-coupled to
the IC where it is clamped on top-sync level, information
obtained from this action is used to generate the clamp
pulses.
2. Using a sandcastle pulse (external clamping)
If an associated sandcastle pulse is available, it can
also be used as a clamping pulse. In this event the
sandcastle pulse should be connected to pin 24, the
top of the clamping pulse should be between 0.544VP
and 0.456VP. The timing of the internal clamping pulse
will be equal to the timing of the higher part of the
sandcastle pulse. If the sync signal is also connected,
the current sink will also become active during the
synchronization pulses. This means that the
sandcastle pulse should be connected to pin 24 via a
1 kΩ dropping resistor. In this event only the
sandcastle pulse at pin 24 will be influenced during
sync pulses, but the sandcastle pulse at the
The clamp pulses can be generated in two ways:
1. Using the sync information (internal clamping)
The sync information is clamped on top-sync and the
information obtained from this action is used to switch
an internal current source at pin 24.
Pin 24 should be connected to VP via a 4.7 kΩ resistor,
and a 1 nF capacitor to ground. During video scan the
voltage at pin 24 will be HIGH (equals positive supply
voltage). During the synchronization pulses the
voltage at pin 24 will drop to zero because of the
current sink (2.5 mA).
sandcastle source will be unchanged.
V
V1 = 0.544 V
P
handbook, halfpage
P
V2 = 0.456 V
P
9.4 kΩ
V1
V2
clamp pulse
signal
1.8 kΩ
9.4 kΩ
pin 24
ON when current sync = 2.5 mA
OFF when current sync = 0 mA
MEA623
Tolerance on V1 and V2 is given by ∆R/R and ∆VP/VP. The diffusion process gives ∆R/R (max) = 1.5%.
Fig.7 Clamping circuit.
1995 Mar 07
15
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
PACKAGE OUTLINE
DIP24: plastic dual in-line package; 24 leads (600 mil)
SOT101-1
D
M
E
A
2
A
L
A
1
c
e
w
M
Z
b
1
(e )
1
b
M
H
24
13
pin 1 index
E
1
12
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
Z
A
A
A
2
(1)
(1)
1
UNIT
mm
b
b
c
D
E
e
e
L
M
M
H
w
1
1
E
max.
min.
max.
max.
1.7
1.3
0.53
0.38
0.32
0.23
32.0
31.4
14.1
13.7
3.9
3.4
15.80
15.24
17.15
15.90
5.1
0.51
4.0
2.54
0.10
15.24
0.60
0.25
0.01
2.2
0.066
0.051
0.021
0.015
0.013
0.009
1.26
1.24
0.56
0.54
0.15
0.13
0.62
0.60
0.68
0.63
inches
0.20
0.020
0.16
0.087
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-01-23
SOT101-1
051G02
MO-015AD
1995 Mar 07
16
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
SOLDERING
REPAIRING SOLDERED JOINTS
Apply a low voltage soldering iron below the seating plane
(or not more than 2 mm above it). If its temperature is
below 300 °C, it must not be in contact for more than 10 s;
if between 300 and 400 °C, for not more than 5 s.
Plastic dual in-line packages
BY DIP OR WAVE
The maximum permissible temperature of the solder is
260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1995 Mar 07
17
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
NOTES
1995 Mar 07
18
Philips Semiconductors
Product specification
I2C-bus controlled YUV/RGB switch
TDA8443A
NOTES
1995 Mar 07
19
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Date of release: 1995 Mar 07
9397 750 00021
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Philips Semiconductors
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