TDA8512 [NXP]
26 W BTL and 2 x 13 W SE or 4 x 13 W SE power amplifier; 26 W¯¯ BTL和2个为13W SE或4 ×13 W¯¯ SE功率放大器型号: | TDA8512 |
厂家: | NXP |
描述: | 26 W BTL and 2 x 13 W SE or 4 x 13 W SE power amplifier |
文件: | 总24页 (文件大小:166K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8512J
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
Preliminary specification
2001 Nov 16
File under Integrated Circuits, IC01
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
CONTENTS
15
PACKAGE OUTLINE
16
SOLDERING
1
2
3
4
5
6
7
8
FEATURES
16.1
Introduction to soldering through-hole mount
packages
Soldering by dipping or by solder wave
Manual soldering
Suitability of through-hole mount IC packages
for dipping and wave soldering methods
APPLICATIONS
GENERAL DESCRIPTION
QUICK REFERENCE DATA
ORDERING INFORMATION
BLOCK DIAGRAM
16.2
16.3
16.4
17
18
19
DATA SHEET STATUS
DEFINITIONS
PINNING
FUNCTIONAL DESCRIPTION
DISCLAIMERS
8.1
8.2
8.3
8.4
Mode select switch
Mode select
Built-in protection circuits
Short-circuit protection
9
LIMITING VALUES
10
11
12
13
14
HANDLING
THERMAL CHARACTERISTICS
DC CHARACTERISTICS
AC CHARACTERISTICS
APPLICATION INFORMATION
14.1
14.2
14.3
14.4
14.5
14.6
14.7
Input configuration
Output power
Power dissipation
Supply Voltage Ripple Rejection (SVRR)
Switch-on and switch-off
PCB layout and grounding
Typical performance characteristics
2001 Nov 16
2
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
1
FEATURES
• Flexible leads
• Low thermal resistance
• Requires very few external components
• High output power
• Identical inputs: inverting and non-inverting.
• Low output offset voltage Bridge-Tied Load (BTL)
channel
2
APPLICATIONS
• Fixed gain
• Multimedia systems
• Good ripple rejection
• Active speaker systems (stereo with sub woofer or
QUAD).
• Mode select switch: operating, mute and standby
• Short-circuit safe to ground and across load
• Low power dissipation in any short-circuit condition
• Thermally protected
3
GENERAL DESCRIPTION
The TDA8512J is an integrated class-B output amplifier in
a 17-lead Single-In-Line (SIL) power package. It contains
4 × 13 W Single Ended (SE) amplifiers of which two can be
used to configure a 26 W BTL amplifier.
• Reverse polarity safe
• Electrostatic discharge protection
• No switch-on and switch-off plops
4
QUICK REFERENCE DATA
SYMBOL
General
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
VP
supply voltage
6
15
−
18
4
V
IORM
Iq(tot)
Istb
repetitive peak output current
total quiescent current
standby current
−
−
−
A
80
0.1
mA
100.0 µA
BTL channel
Po
output power
RL = 4 Ω; THD = 10%
Rs = 0 Ω
−
26
−
−
W
SVRR
Vn(o)
Zi
supply voltage ripple rejection
noise output voltage
input impedance
46
−
−
dB
µV
kΩ
mV
70
−
−
25
−
−
∆VOO
DC output offset voltage
−
150
SE channels
Po
output power
THD = 10%
RL = 4 Ω
−
7.0
13.0
−
−
−
−
−
−
W
RL = 2 Ω
−
W
SVRR
Vn(o)
Zi
supply voltage ripple rejection
noise output voltage
input impedance
46
−
dB
µV
kΩ
Rs = 0 Ω
50
−
50
5
ORDERING INFORMATION
PACKAGE
TYPE
NUMBER
NAME
DESCRIPTION
VERSION
TDA8512J
DBS17P
plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm)
SOT243-1
2001 Nov 16
3
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
6
BLOCK DIAGRAM
V
V
P1
5
P2
13
1
mute switch
INV1
C
m
60
kΩ
6
VA
OUT1
2
kΩ
power stage
18 kΩ
3
mute switch
C
INV2
m
60
kΩ
8
VA
OUT2
2
kΩ
power stage
18 kΩ
V
P
TDA8512J
14
MODE
standby
switch
standby
reference
voltage
VA
PROTECTIONS
thermal
short-circuit
mute
switch
15 kΩ
x1
4
RR
mute
15 kΩ
reference
voltage
16
15
mute switch
C
m
INV3
INV3
60
kΩ
10
VA
OUT3
2
kΩ
power stage
18 kΩ
17
mute switch
C
INV4
REF
m
60
kΩ
12
VA
OUT4
9
2
kΩ
input
reference
voltage
power stage
18 kΩ
2
7
11
MGW426
SGND
GND1
GND2
Fig.1 Block diagram.
4
2001 Nov 16
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
7
PINNING
SYMBOL
PIN
DESCRIPTION
non-inverting input 1
INV1
SGND
INV2
RR
1
2
INV1
1
2
3
4
5
6
7
8
9
signal ground
SGND
3
non-inverting input 2
supply voltage ripple rejection
supply voltage 1
output 1
INV2
RR
4
VP1
5
V
P1
OUT1
GND1
OUT2
REF
6
OUT1
GND1
OUT2
7
power ground 1
output 2
8
9
reference voltage input
output 3
OUT3
GND2
OUT4
VP2
10
11
12
13
14
15
16
17
REF
TDA8512J
power ground 2
output 4
OUT3 10
11
12
13
14
15
16
17
GND2
OUT4
supply voltage 2
mode select switch input
inverting input 3
non-inverting input 3
non-inverting input 4
MODE
INV3
INV3
INV4
V
P2
MODE
INV3
INV3
INV4
MGW427
Fig.2 Pin configuration.
2001 Nov 16
5
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
8
FUNCTIONAL DESCRIPTION
8.2
Mode select
The TDA8512J contains four identical amplifiers and can
be used in the configurations:
For the 3 functional modes; standby, mute and operate,
the pin MODE can be driven by a 3-state logic output
stage: e.g. microcontroller with some extra components for
DC level shifting. (see Fig.10).
• Two SE channels (fixed gain 20 dB) and one BTL
channel (fixed gain 26 dB)
Standby mode will be activated by a applying a low
DC level between 0 and 2 V. The power consumption of
the device will be reduced to less than 1.5 mW. The input
and output pins are floating: high impedance condition.
• Four SE channels.
(RL depends on the application).
8.1
Mode select switch
Mute mode will be activated by a applying a DC level
between 3.3 and 6.4 V. The outputs of the amplifier will be
muted (no audio output); however, the amplifier is
DC biased and the DC level of the input and output pins
stays on half the supply voltage.
A special feature of the TDA8512J device is the mode
select switch (pin MODE), offering:
• Low standby current (<100 µA)
• Low switching current (low cost supply switch)
• Mute facility.
Operating mode is obtained at a DC level between 8.5 V
and VP.
To avoid switch-on plops, it is advised to keep the amplifier
in the mute mode for longer than 100 ms to allow charging
of the input capacitors at pins INV1, INV2, INV3, INV3
and INV4. This can be achieved by:
8.3
Built-in protection circuits
The device contains both a thermal protection, and a
short-circuit protection.
• Control via a microcontroller
Thermal protection:
• An external timing circuit (see Fig.3).
The junction temperature is measured by a temperature
sensor; at a junction temperature of about 160 °C this
detection circuit switches off the power stages.
The circuit slowly ramps up the voltage at the pin MODE
when switching on, and results in fast muting when
switching off.
Short-circuit protection (outputs to ground, supply and
across the load):
V
P
handbook, halfpage
Short-circuit is detected by a so called Maximum Current
Detection circuit, which measures the current in the
positive, respectively negative supply line of each power
stage. At currents exceeding (typical) 6 A, the power
stages are switched off during some ms.
10 kΩ
47 µF
100 Ω
mode
select
switch
8.4
Short-circuit protection
100 kΩ
When a short-circuit during operation to either GND or
across the load of one or more channels occurs, the output
stages are switched off for approximately 20 ms. After that
time, it is checked during approximately 50 µs to see
whether the short-circuit is still present. Due to this duty
factor of 50 µs per 20 ms, the average supply current is
very low during this short-circuit (approximately 40 mA,
see Fig.4).
MGA708
Fig.3 Mode select switch circuitry.
2001 Nov 16
6
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
I(A)
20 ms
MGW430
current
in
output
stage
t (s)
short-circuit
50 µs
Fig.4 Short-circuit wave form.
9
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL PARAMETER CONDITIONS
supply voltage
MIN. MAX. UNIT
VP
operating
no signal
−
18
21
6
V
V
A
A
V
V
W
−
IOSM
IORM
Vsc
non-repetitive peak output current
repetitive peak output current
short-circuit safe voltage
reverse polarity voltage
total power dissipation
−
−
4
operating; note 1
−
18
6
Vrp
−
Ptot
Tstg
Tamb
Tvj
−
60
storage temperature
−55
−40
−
+150 °C
ambient temperature
+85
150
°C
°C
virtual junction temperature
Note
1. To ground and across load.
10 HANDLING
ESD protection of this device complies with the Philips’ General Quality Specification (GQS).
2001 Nov 16
7
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
11 THERMAL CHARACTERISTICS
In accordance with IEC 60747-1.
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
Rth(j-a)
Rth(j-c)
thermal resistance from junction to ambient
thermal resistance from junction to case
in free air
see Fig.5
40.0
1.3
K/W
K/W
The measured thermal resistance of the IC-package (Rth(j-c)) is maximum 1.3 K/W if all four channels are driven. For a
maximum ambient temperature of 60 °C and VP = 15 V, the following calculation for the heatsink can be made:
For the application two SE outputs with 2 Ω load, the measured worst-case sine-wave dissipation is 2 × 7 W
For the application BTL output with 4 Ω load, the worst-case sine-wave dissipation is 12.5 W.
So the total power dissipation is Pd(tot) = 2 × 7 + 12.5 W = 26.5 W.
At Tj(max) = 150 °C the temperature increase, caused by the power dissipation, is: ∆T = 150 °C − 60 °C = 90 °C.
90
26.5
So Pd(tot) × Rth(tot) = ∆T = 90 K. As a result: Rth(tot)
th(hs) = Rth(tot) − Rth(j-c) = 3.4 − 1.3 = 2.1 K/W.
=
= 3.4 K/W which means:
-----------
R
The above calculation is for application at worst-case (stereo) sine-wave output signals. In practice, music signals will be
applied. In that case the maximum power dissipation will be about the half the sine-wave power dissipation, which allows
the use of a smaller heatsink.
90
13.25
So Pd(tot) × Rth(tot) = ∆T = 90 K. As a result: Rth(tot)
=
= 6.8 K/W which means:
--------------
Rth(hs) = Rth(tot) − Rth(j-c) = 6.8 − 1.3 = 5.5 K/W.
virtual junction
output 3 output 4
handbook, halfpage
output 1 output 2
3.0 K/W
3.0 K/W
3.0 K/W
3.0 K/W
0.7 K/W
0.7 K/W
MEA860 - 2
0.2 K/W
case
Fig.5 Equivalent thermal resistance network.
2001 Nov 16
8
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
12 DC CHARACTERISTICS
VP = 15 V; Tamb = 25 °C; measured according to Figs 6 and 7; unless otherwise specified.
SYMBOL
Supply
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VP
supply voltage
note 1
6
−
−
−
15
18
V
Iq(tot)
VO
total quiescent current
DC output voltage
80
6.9
−
160
−
mA
V
∆VOO
DC output offset voltage
note 2
150
mV
Mode select switch
Vsw(on)
switch-on voltage
8.5
−
−
V
Mute condition
V
mute voltage
3.3
−
−
−
−
6.4
2
V
VO
output voltage
Vi(max) = 1 V; fi = 1 kHz
note 2
mV
mV
∆VOO
DC output offset voltage
−
150
Standby condition
Vstb
Istb
standby voltage
0
−
−
−
2
V
standby current
−
100
40
µA
µA
Isw(on)
switch-on current
12
Notes
1. The circuit is DC adjusted at VP = 6 to 18 V and AC operating at VP = 8.5 to 18 V.
2. Only for BTL channel (VOUT4 − VOUT3).
13 AC CHARACTERISTICS
VP = 15 V; fi = 1 kHz; Tamb = 25 °C; bandpass 22 Hz to 22 kHz; measured according to Figs 6 and 7; unless otherwise
specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
BTL channel
Po
output power
RL2 = 4 Ω (see Fig.7); note 1
THD = 0.5%
16
20
26
−
W
W
%
THD = 10%
22
−
−
−
THD
BP
total harmonic distortion
power bandwidth
Po = 1 W
0.06
THD = 0.5%; Po = −1 dB with
−
20 to 15000 −
Hz
respect to 17 W
fro(l)
low frequency roll-off
at −1 dB; note 2
at −1 dB
−
25
−
−
Hz
fro(h)
GV
high frequency roll-off
20
25
−
kHz
dB
closed loop voltage gain
supply voltage ripple rejection
26
27
SVRR
note 3;
operating
mute
48
46
80
−
−
−
−
−
−
dB
dB
dB
standby
2001 Nov 16
9
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
SYMBOL
Zi
PARAMETER
input impedance
noise output voltage
CONDITIONS
MIN.
25
TYP.
MAX. UNIT
30
38
kΩ
µV
µV
µV
Vn(o)
operating; Rs = 0 Ω; note 4
operating; Rs = 10 kΩ; note 4
mute; notes 4 and 5
−
−
−
70
−
100
60
200
−
SE channels
Po
output power
RL1 = 2 Ω (see Fig.7); note 1
THD = 0.5%
8.0
10.0
13.0
−
−
W
W
THD = 10%
11.0
R
L1 = 4 Ω (see Fig.7); note 1
THD = 0.5%
−
5.5
7.0
0.06
25
−
W
THD = 10%
−
−
W
THD
fro(l)
total harmonic distortion
low frequency roll-off
Po = 1 W
−
−
%
at −1 dB; note 2
at −1 dB
−
−
Hz
kHz
dB
fro(h)
Gv
high frequency roll-off
20
19
−
−
closed loop voltage gain
supply voltage ripple rejection
20
21
SVRR
note 3;
operating
mute
48
46
80
50
−
−
−
dB
dB
dB
kΩ
µV
µV
µV
dB
dB
−
−
standby
−
−
Zi
input impedance
60
50
70
50
60
−
75
−
Vn(o)
noise output voltage
operating; Rs = 0 Ω; note 4
operating; Rs = 10 kΩ; note 4
mute; notes 4 and 5
Rs = 10 kΩ
−
100
−
−
αcs
channel separation
channel unbalance
40
−
−
∆GV
1
Notes
1. Output power is measured directly at the output pins of the device.
2. Frequency response externally fixed.
3. Ripple rejection measured at the output with a source impedance of 0 Ω; maximum ripple of 2 V (p-p) and at a
frequency between 100 Hz to 10 kHz.
4. Noise measured in a bandwidth of 20 Hz to 20 kHz.
5. Noise output voltage independant of Rs (Vi = 0 V).
2001 Nov 16
10
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
14 APPLICATION INFORMATION
14.1 Input configuration
For suppressing higher frequency transients (spikes) on
the supply line a capacitor with low ESR (typical 0.1 µF)
has to be placed as close as possible to the device. For
suppressing lower frequency noise and ripple signals, a
large electrolytic capacitor (e.g.1000 µF or more) must be
placed close to the device.
• Inputs 1 and 2 are used for SE application on pin OUT1,
respectively pin OUT2
• Input 3 can be configured for both SE and BTL
application
The bypass capacitor on the pin RR reduces the noise and
ripple on the mid rail voltage. For good THD and noise
performance, a low ESR capacitor is recommended.
• Input 4 can be used for SE application of pin OUT4, or
for BTL application together with input 3. See
Figs 6 and 7.
14.5 Switch-on and switch-off
Note that the DC level of all input pins is half the supply
voltage VP, so coupling capacitors for the input pins are
necessary!
To avoid audible plops during switching on and switching
off the supply voltage, the pin MODE has to be set in
standby condition (<2V) before the voltage is applied
(switch-on) or removed (switch-off). Via the mute mode,
the input- and SVRR-capacitors are smoothly charged.
Cut-off frequency for the input is: fi(co) = 12 Hz. Therefore
it is not necessary to use high capacitor values on the
input; so the delay during switch-on, which is necessary for
charging the input capacitors, can be minimised. This
results in a good low frequency response and good
switch-on behaviour.
The turn-on and turn-off time can be influenced by an
RC-circuit on the pin MODE (see Fig.3). Rapidly switching
on and off of the device or the pin MODE, may cause “click
and pop” noise. This can be prevented by a proper timing
on the pin MODE.
14.2 Output power
The output power versus supply voltage has been
measured on the output pins of one channel, and at
THD = 10%. The maximum output power is limited by the
maximum supply voltage of 18 V and the maximum
available output current: 4 A repetitive peak current.
14.6 PCB layout and grounding
For high system performance level certain grounding
techniques are imperative. The input reference grounds
have to be tied with their respective source grounds, and
must have separate traces from the power ground traces;
this will separate the large (output) signal currents from
interfering with the small AC input signals. The
small-signal ground traces should be physically located as
far as possible from the power ground traces. Supply- and
output-traces should be as wide as practical for delivering
maximum output power. The PCB layout, which
accommodates the TDA8510, TDA8511, and TDA8512
products, is shown in Fig.8.
14.3 Power dissipation
The power dissipation graphs are given for one output
channel in SE, respectively BTL application. So for total
worst-case power dissipation the Pd of each channel must
be added up.
14.4 Supply Voltage Ripple Rejection (SVRR)
The SVRR is measured with an electrolytic capacitor of
100 µF on pin RR and at a bandwidth of 10 Hz to 80 kHz,
whereas the lowest frequencies can be lower than 10 Hz.
Proper supply bypassing is critical for low noise
performance and high power supply rejection. The
respective capacitor locations should be as close to the
device as possible, and grounded to the power ground. A
proper power supply decoupling also prevents oscillations.
2001 Nov 16
11
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
V
P
2200
µF
100
nF
V
5
V
MODE
14
P1
P2
13
TDA8512J
(1)
1 kΩ
INV1
1
input 1
6
8
OUT1
OUT2
220
nF
(2)
C
out
60
kΩ
R
L
(1)
1 kΩ
INV2
3
2
input 2
(2)
C
out
220
nF
60
kΩ
R
SGND
L
reference
voltage
REF
9
INV3
15
60
kΩ
10
OUT3
(1)
(1)
1 kΩ
1 kΩ
16
INV3
input 3
input 4
(2)
C
C
out
220
nF
R
L
60
kΩ
12 OUT4
17
4
INV4
RR
(2)
out
220
nF
supply voltage
ripple rejection
R
L
1/2V
P
7
11
100
µF
GND1 GND2
MGW429
(1) Advised when driven with hard clipping input signals.
(2) For frequencies down to 20 Hz:
Cout = 4700 µF at RL = 2 Ω.
Cout = 2200 µF at RL = 4 Ω.
Fig.6 Application diagram for four SE amplifiers.
12
2001 Nov 16
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
V
P
2200
µF
100
nF
V
5
V
MODE
14
P1
P2
13
TDA8512J
(1)
1 kΩ
INV1
1
input 1
6
8
OUT1
OUT2
220
nF
(2)
C
out
60
kΩ
R
L1
(1)
1 kΩ
INV2
3
input 2
(2)
C
out
220
nF
60
kΩ
R
2
9
SGND
L1
reference
voltage
REF
INV3 16
INV3 15
60
kΩ
10
OUT3
R
(1)
L2
4 Ω
1 kΩ
60
kΩ
inputs
3 and 4
470
nF
12 OUT4
17
4
INV4
RR
1/2V
P
7
11
100
µF
GND1 GND2
MGW428
(1) Advised when driven with hard clipping input signals.
(2) For frequencies down to 20 Hz:
Cout = 4700 µF at RL1 = 2 Ω.
Cout = 2200 µF at RL1 = 4 Ω.
Fig.7 Application diagram for one BTL amplifier and two SE amplifiers.
13
2001 Nov 16
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
78 mm
55
mm
a. Top view copper layout.
TDA8510
TDA8511
TDA8512
Diag
100 µF
220 nF
4700 µF
100 nF
470 nF
out 2
out 1
out 3
out 4
2200 µF
47 µF
4700 µF
10
kΩ
off on
S-Gnd
1 IN 2
Gnd
V
4 IN 3
mode
P
MGW520
b. Top view component layout.
Fig.8 Printed-circuit board layout.
14
2001 Nov 16
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
14.7 Typical performance characteristics
MGW431
MGW432
4
10
120
V
handbook, halfpage
handbook, halfpage
o
I
q
(mV)
(mA)
3
10
100
2
10
80
60
40
20
0
10
1
(1)
(2)
−1
10
−2
10
−3
10
0
2
4
6
8
10
7
9
11
13
15
17
(V)
19
V
(V)
MODE
V
P
(1) BTL mode.
(2) SE mode.
Fig.9 Quiescent current as a function of supply
voltage; measured without load.
Fig.10 Output voltage as a function of mode select
voltage.
MGW434
MGW433
10
10
handbook, halfpage
handbook, halfpage
THD
(%)
THD
(%)
1
1
(1)
(1)
−1
−1
10
10
(2)
(3)
(2)
(3)
−2
−2
10
10
−2
−1
2
−2
−1
2
10
10
1
10
10
10
10
1
10
10
P
(W)
P
(W)
o
o
SE mode.
(2) fi = 1 kHz.
(3) fi = 100 Hz.
SE mode.
(2) fi = 1 kHz.
(3) fi = 100 Hz.
(1) fi = 10 kHz.
(1) fi = 10 kHz.
Fig.11 THD as a function of output power at
Fig.12 THD as a function of output power at
RL = 2 Ω.
RL = 4 Ω.
2001 Nov 16
15
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
MGW436
MGW435
0
10
handbook, halfpage
handbook, halfpage
SVRR
(dB)
THD
(%)
−20
−40
1
(1)
(2)
−1
10
(1)
(2)
−60
(3)
(4)
−2
−80
10
10
−2
−1
2
−2
−1
2
10
1
10
10
10
10
1
10
10
f (kHz)
f (kHz)
i
i
SE mode.
(3) Operating mode channel 2.
(4) Operating mode channel 1.
SE mode.
(1) Mute mode channel 2.
(2) Mute mode channel 1.
(1) RL = 4 Ω.
(2) RL = 2 Ω.
Fig.13 SVRR as a function of frequency at
VREF = 1 V; no bandpass applied.
Fig.14 THD as a function of frequency at Po = 1 W;
no bandpass applied.
MGW443
MGW444
0
20
handbook, halfpage
handbook, halfpage
P
α
(dB)
o
cs
(1)
(2)
(W)
16
−20
12
8
−40
−60
−80
(3)
(4)
4
0
−2
−1
2
5
10
15
20
10
10
1
10
10
V
(V)
f (kHz)
P
i
SE mode.
(3) RL = 4 Ω; THD = 10%.
(4) RL = 4 Ω; THD = 0.5%.
(1) RL = 2 Ω; THD = 10%.
(2) RL = 2 Ω; THD = 0.5%.
SE mode.
Fig.15 Channel separation as a function of
frequency; no bandpass applied.
Fig.16 Output power as a function of supply
voltage.
2001 Nov 16
16
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
MGW446
(1)
MGW445
12
10
handbook, halfpage
handbook, halfpage
P
d
P
d
(W)
10
(W)
8
8
6
4
2
6
(1)
(2)
4
(2)
2
0
0
5
10
15
20
0
4
8
12
16
V
(V)
Po (W)
P
SE mode.
SE mode.
(1) RL = 2 Ω.
(2) RL = 4 Ω.
(1) RL = 2 Ω.
(2) RL = 4 Ω.
Fig.17 Power dissipation as a function of output
power at VP = 15 V.
Fig.18 Power dissipation as a function of supply
voltage.
MGW448
MGW447
4
4
handbook, halfpage
handbook, halfpage
B
P
B
P
(dB)
(dB)
2
2
0
−2
−4
0
−2
−4
−2
−1
2
−2
−1
2
10
10
1
10
10
10
10
1
10
10
f (kHz)
f (kHz)
i
i
SE mode.
VP = 15 V; RL = 2 Ω.
Po = 8.5 W; THD = 0.5%.
BTL mode.
VP = 15 V; RL = 4 Ω.
Po = 17 W; THD = 0.5%.
Fig.19 Power bandwidth as a function of
frequency; no bandpass applied.
Fig.20 Power bandwidth as a function of
frequency; no bandpass applied.
2001 Nov 16
17
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
MGW438
MGW437
10
10
handbook, halfpage
handbook, halfpage
THD
(%)
THD
(%)
1
1
(1)
−1
−1
10
10
(2)
(3)
−2
−2
10
10
−2
−1
2
−2
−1
2
10
10
1
10
10
10
10
1
10
10
P
(W)
f (kHz)
i
o
BTL mode.
(2) fi = 1 kHz.
(3) fi = 100 Hz.
BTL mode.
(1) fi = 10 kHz.
Po = 1 W; RL = 4 Ω.
Fig.21 THD as a function of output power at
Fig.22 THD as a function of frequency; no
bandpass applied.
RL = 4 Ω.
MGW440
MGW439
0
40
handbook, halfpage
handbook, halfpage
(1)
P
o
(W)
SVRR
(dB)
−20
−40
30
(2)
(3)
(4)
20
10
−60
(1)
(2)
0
5
−80
10
−2
−1
2
10
15
20
10
1
10
10
V
(V)
f (kHz)
P
i
BTL mode.
(1) Operating.
(2) Mute.
BTL mode.
(3) RL = 8 Ω; THD = 10%.
(4) RL = 8 Ω; THD = 0.5%.
(1) RL = 4 Ω; THD = 10%.
(2) RL = 4 Ω; THD = 0.5%.
Fig.23 SVRR as a function of frequency at
VREF = 1 V; no bandpass applied.
Fig.24 Output power as a function of supply
voltage.
2001 Nov 16
18
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
MGW441
MGW442
(1)
20
16
handbook, halfpage
handbook, halfpage
P
d
P
d
(W)
(W)
16
12
(1)
12
8
(2)
8
(2)
4
4
0
0
5
0
10
20
30
10
15
20
P
(W)
V
(V)
o
P
BTL mode.
BTL mode.
(1) RL = 4 Ω.
(2) RL = 8 Ω.
(1) RL = 4 Ω.
(2) RL = 8 Ω.
Fig.25 Power dissipation as a function of output
power at VP = 15 V.
Fig.26 Power dissipation as a function of supply
voltage.
2001 Nov 16
19
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
15 PACKAGE OUTLINE
DBS17P: plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm)
SOT243-1
non-concave
D
h
x
D
E
h
view B: mounting base side
d
A
2
B
j
E
A
L
3
L
Q
c
2
v
M
1
17
e
e
m
w
M
1
Z
b
p
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
(1)
(1)
UNIT
A
A
b
c
D
d
D
E
e
e
e
E
j
L
L
3
m
Q
v
w
x
Z
2
p
h
1
2
h
17.0 4.6 0.75 0.48 24.0 20.0
15.5 4.4 0.60 0.38 23.6 19.6
12.2
11.8
3.4 12.4 2.4
3.1 11.0 1.6
2.00
1.45
2.1
1.8
6
mm
10
2.54 1.27 5.08
0.8
4.3
0.4 0.03
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
97-12-16
99-12-17
SOT243-1
2001 Nov 16
20
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
16 SOLDERING
The total contact time of successive solder waves must not
exceed 5 seconds.
16.1 Introduction to soldering through-hole mount
packages
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
This text gives a brief insight to wave, dip and manual
soldering. A more in-depth account of soldering ICs can be
found in our “Data Handbook IC26; Integrated Circuit
Packages” (document order number 9398 652 90011).
Wave soldering is the preferred method for mounting of
through-hole mount IC packages on a printed-circuit
board.
16.3 Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
16.2 Soldering by dipping or by solder wave
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds.
300 and 400 °C, contact may be up to 5 seconds.
16.4 Suitability of through-hole mount IC packages for dipping and wave soldering methods
SOLDERING METHOD
PACKAGE
DIPPING
WAVE
DBS, DIP, HDIP, SDIP, SIL
suitable
suitable(1)
Note
1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
2001 Nov 16
21
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
17 DATA SHEET STATUS
PRODUCT
DATA SHEET STATUS(1)
STATUS(2)
DEFINITIONS
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data
Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
18 DEFINITIONS
19 DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information
Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2001 Nov 16
22
Philips Semiconductors
Preliminary specification
26 W BTL and 2 × 13 W SE or
4 × 13 W SE power amplifier
TDA8512J
NOTES
2001 Nov 16
23
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2001
SCA73
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
753503/01/pp24
Date of release: 2001 Nov 16
Document order number: 9397 750 08677
相关型号:
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NXP
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