TDA8592J_技术文档

TDA8592J

I²C-bus controlled 4 × 50 W power ampliﬁer

Rev. 02 — 3 June 2005

Product data sheet

1. General description

The TDA8592J is a complementary quad BTL audio power ampliﬁer made in BCDMOS

technology. It contains four independent ampliﬁers in Bridge Tied Load (BTL)

conﬁguration. Through the I²C-bus, the diagnostic information of each ampliﬁer and

speaker can be read separately.

Both front and both rear channel ampliﬁers can be conﬁgured independently in line driver

mode with a gain of 20 dB.

2. Features

■ I²C-bus control

■ Hardware programmable I²C-bus address

■ Can drive a 2 Ω load with a battery voltage of up to 16 V and a 4 Ω load with a battery

voltage of up to 18 V

■ DC-load detection: open, short and present

■ AC-load (tweeter) detection

■ Programmable clip detection: 1 % or 3 %

■ Programmable thermal protection pre-warning

■ Independent short-circuit protection per channel

■ Low gain line driver mode (20 dB)

■ Loss-of-ground and open V_Psafe

■ All outputs protected from short-circuit to ground, to V_P, or across the load

■ All pins protected from short-circuit to ground

■ Soft thermal clipping to prevent audio holes

■ Low battery detection.

3. Quick reference data

Table 1:

Quick reference data

V_P= V_P1= V_P2= 14.4 V; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

14.4 18

280 400

Max Unit

V_P

I_q

operating supply voltage

quiescent current

R_L= 4 Ω

8

-

V

mA

TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

Table 1:

Quick reference data …continued

V_P= V_P1= V_P2= 14.4 V; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max Unit

P_o(max)

maximum output power

R_L= 4 Ω;

V_P= 14.4 V;

44

46

-

W

V_IN= 2 V (RMS)

square wave

R_L= 4 Ω;

V_P= 15.2 V;

49

83

52

87

V_IN= 2 V (RMS)

square wave

R_L= 2 Ω;

V_P= 14.4 V;

V_IN= 2 V (RMS)

square wave

THD

total harmonic distortion

-

0.01 0.1

%

V_n(o)(amp)

noise output voltage in

ampliﬁer mode

50

70

µV

V_n(o)(LN)

noise output voltage in line

driver mode

-

25

35

µV

4. Ordering information

Table 2:

Ordering information

Type number

Package

Name

Description

Version

TDA8592J

DBS27P

plastic DIL-bent-SIL (special bent) power package;

27 leads (lead length 7.7 mm)

SOT767-1

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Product data sheet

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TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

5. Block diagram

ADSEL SDA SCL

V

P1

21

P2

1

2

5

7

26

DIAG

23

2

I C-BUS

STB

STANDBY/ MUTE

CLIP DETECT/ DIAGNOSTIC

INTERFACE

10

8

12

16

13

15

MUTE

OUTRF+

OUTRF−

INRF

INLF

INRR

INLR

26 dB/

20 dB

PROTECTION/

DIAGNOSTIC

18

20

OUTLF+

OUTLF−

26 dB/

20 dB

PROTECTION/

DIAGNOSTIC

6

4

OUTRR+

OUTRR−

26 dB/

20 dB

PROTECTION/

DIAGNOSTIC

22

24

OUTLR+

OUTLR−

26 dB/

20 dB

V

P

PROTECTION/

DIAGNOSTIC

27

TAB

TEMPERATURE AND LOAD

DUMP PROTECTION

AMPLIFIER

TDA8592J

11

SVR

14

17

9

3

19

25

PGND4

coa036

SGND

ACGND

PGND1 PGND2 PGND3

Fig 1. Block diagram

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TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

6. Pinning information

6.1 Pinning

ADSEL

SDA

1

2

3

4

5

6

7

8

9

PGND2

OUTRR−

SCL

OUTRR+

V

P2

OUTRF−

PGND1

OUTRF+ 10

SVR 11

INRF 12

INRR 13

SGND 14

INLR 15

TDA8592J

INLF 16

ACGND 17

OUTLF+ 18

PGND3 19

OUTLF− 20

V

P1

21

OUTLR+ 22

STB 23

OUTLR− 24

PGND4 25

DIAG 26

TAB 27

001aac643

Fig 2. Pin conﬁguration

6.2 Pin description

Table 3:

Symbol

ADSEL

SDA

Pin description

1

Description

I²C-bus address selection

I²C-bus data input and output

power ground 2

2

PGND2

OUTRR−

SCL

3

4

channel right rear negative output

I²C-bus clock input

5

OUTRR+

V_P2

6

channel right rear positive output

power supply voltage 2

7

OUTRF−

PGND1

8

channel right front negative output

power ground 1

9

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TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

Table 3:

Symbol

OUTRF+

SVR

Pin description …continued

Description

channel right front positive output

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

half supply voltage ﬁlter capacitor

channel right front input

INRF

INRR

channel right rear input

SGND

INLR

signal ground

channel left rear input

INLF

channel left front input

ACGND

OUTLF+

PGND3

OUTLF−

V_P1

AC ground

channel left front positive output

power ground 3

channel left front negative output

power supply voltage 1

OUTLR+

STB

channel left rear positive output

standby or operating or mute mode select input

channel left rear negative output

power ground 4

OUTLR−

PGND4

DIAG

diagnostic and clip detection output; active LOW

heatsink connection, must be connected to ground

TAB

To keep the output pins on the front side, shift bending is applied.

7. Functional description

The TDA8592J is an audio power ampliﬁer with four independent ampliﬁers conﬁgured in

Bridge Tied Load (BTL) with diagnostic capability. The ampliﬁer diagnostic functions give

information about output offset, load, or short-circuit. Diagnostic functions are controlled

via the I²C-bus. The TDA8592J is protected against short-circuit, over-temperature, open

ground and open V_Pconnections. If a short-circuit occurs at the input or output of a single

ampliﬁer, that channel shuts down, and the other channels continue to operate normally.

The channel that has a short-circuit can be disabled by the microcontroller via the

appropriate enable bit of the I²C-bus to prevent any noise generated by the fault condition

from being heard.

7.1 Start-up

When pin STB is LOW, the total quiescent current is low and the I²C-bus lines are

high-impedance.

When pin STB is HIGH, the I²C-bus is biased and then the TDA8592J performs a

power-on reset. When bit D0 of instruction byte IB1 is set, the ampliﬁer is activated, bit D7

of data byte 2 (power-on reset occurred) is reset, and pin DIAG is no longer held LOW.

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Product data sheet

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TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

7.2 Start-up and shut-down timing

A capacitor connected to pin SVR enables smooth start-up and shut-down, preventing the

ampliﬁer from producing audible clicks at switch-on or switch-off. The start-up and

shut-down times can be extended by increasing the capacitor value.

If the ampliﬁer is shut-down using pin STB, the ampliﬁer is muted, and the capacitor

connected to pin SVR discharges. The low current standby mode is activated 2 seconds

after pin STB goes LOW; see Figure 8.

7.3 Power-on reset and supply voltage spikes

If the supply voltage drops too low to guarantee the integrity of the data in the I²C-bus

latches, the power-on reset cycle will start. All latches will be set to a pre-deﬁned state, pin

DIAG will be pulled LOW to indicate that a power-on reset has occurred, and bit D7 of

data byte 2 is also set for the same reason. When D0 of instruction byte 1 is set, the

power-on ﬂag resets, pin DIAG is released and the ampliﬁer will then enter its start-up

cycle; see Figure 9 and see Figure 10.

7.4 Diagnostic output

Pin DIAG indicates clipping, thermal protection pre-warning, short-circuit protection, low

and high battery voltage. Pin DIAG is an open-drain output, is active LOW, and must be

connected to an external voltage via an external pull-up resistor. If a failure occurs, pin

DIAG remains LOW during the failure and no clipping information is available. The

microcontroller can read the failure information via the I²C-bus.

7.5 Muting

A hard mute and a soft mute can both be performed via the I²C-bus. A hard mute mutes

the ampliﬁer within 0.5 ms. A soft mute mutes the ampliﬁer within 20 ms and is less

audible. A hard mute is also activated if a voltage of 8 V is applied to pin STB.

7.6 Temperature protection

If the average junction temperature rises to a temperature value that has been set via the

I²C-bus, a thermal protection pre-warning is activated making pin DIAG LOW. If the

temperature continues to rise, all four channels will be muted to reduce the output power

(soft thermal clipping). The value at which the temperature mute control activates is ﬁxed:

only the temperature at which the thermal protection pre-warning signal occurs can be

speciﬁed by bit D4 in instruction byte 3. If the temperature mute control does not reduce

the average junction temperature, all the power stages will be switched off (muted) at the

absolute maximum temperature T_j(max)

.

7.7 Offset detection

Offset detection can only be performed when there is no input signal to the ampliﬁers, for

instance when the external digital signal processor is muted after a start-up. The output

voltage of each channel is measured and compared with a reference voltage. If the output

voltage of a channel is greater than the reference voltage, bit D2 of the associated data

byte is set and read by the microcontroller during a read instruction. Note that the value of

this bit is only meaningful when there is no input signal and the ampliﬁer is not muted.

Offset detection is always enabled.

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TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

7.8 Speaker protection

If one side of a speaker is connected to ground, a missing current protection is

implemented to prevent damage to the speaker. A fault condition is detected in a channel

when there is a mismatch between the power current in the high side and the power

current in the low side; during a fault condition the channel will be switched off.

The load status of each channel can be read via the I²C-bus: short to ground (one side of

the speaker connected to ground), short to V_P(one side of the speaker connected to V_P),

and shorted load.

7.9 Line driver mode

An ampliﬁer can be used as a line driver by switching it to low gain mode. In normal mode,

the gain between single-ended input and differential output (across the load) is 26 dB. In

low gain mode the gain between single-ended input and differential output is 20 dB.

7.10 Input and AC ground capacitor values

The negative inputs to all four ampliﬁer channels are combined at pin ACGND. To obtain

the best performance for supply voltage ripple rejection and unwanted audible noise, the

value of the capacitor connected to pin ACGND must be as close as possible to 4 times

the value of the input capacitor connected to the positive input of each channel.

7.11 DC-load detection

When DC-load detection is enabled, during the start-up cycle, a DC offset is applied

slowly to the ampliﬁer outputs, and the output currents are measured. If the output current

of an ampliﬁer rises above a certain level, it is assumed that there is a load of less than

6 Ω and bit D5 is reset in the associated data byte register to indicate that a load is

detected.

Because the offset is measured during the ampliﬁer start-up cycle, detection is inaudible

and can be performed every time the ampliﬁer is switched on.

7.12 I²C-bus address selection

If in the application more ampliﬁers are used, the I²C-bus address of the TDA8592J can

be changed with an external resistor: see Section 8.

7.13 AC-load detection

AC-load detection can be used to detect that AC-coupled speakers are connected

correctly during assembly. This requires at least 3 periods of a 19 kHz sine wave to be

applied to the ampliﬁer inputs. The ampliﬁer produces a peak output voltage which also

generates a peak output current through the AC-coupled speaker. The 19 kHz sine wave

is also audible during the test. If the ampliﬁer detects three current peaks that are greater

than 550 mA, the AC-load detection bit D1 of instruction byte IB1 is set to logic 1. Three

current peaks are counted to avoid false AC-load detection which can occur if the input

signal is switched on and off. The peak current counter can be reset by setting bit D1 of

instruction byte IB1 to logic 0. To guarantee AC-load detection, an ampliﬁer current of

more than 550 mA is required. AC-load detection will never occur with a current of less

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Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

than 150 mA. Figure 3 shows which AC-loads are detected at different output voltages.

For example, if a load is detected at an output voltage of 2 V (peak), the load is less than

3.5 Ω. If no load is detected, the output impedance is more than 13 Ω.

001aaa587

2

10

no load present

(1)

Z

o(load)

(Ω)

undefined

(2)

10

load present

1

0

2

4

6

V

8

(V)

o(peak)

(1) I_o(peak)< 150 mA.

(2) I_o(peak)> 550 mA.

Fig 3. Tolerance of AC detected load as a function of output voltage

7.14 Load detection procedure

Procedure:

1. At start-up, enable the AC or DC-load detection by setting D1 of instruction byte IB1 to

logic 1.

2. After 250 ms the DC-load is detected and the mute is released. This is inaudible and

can be implemented each time the IC is powered on.

3. When the ampliﬁer start-up cycle is completed (after 1.5 s), apply an AC signal to the

input, and DC-load bits D5 of each data byte should be read and stored by the

microcontroller.

4. After at least 3 periods of the input signal, the load status can be checked by reading

AC-detect bits D4 of each data byte.

The AC-load peak current counter can be reset by setting bit D1 of instruction byte IB1 to

logic 0 and then to logic 1. Note that this will also reset the DC-load detection bits D5 in

each data byte.

7.15 Low headroom protection

The normal DC output voltage of the ampliﬁer is set to half the supply voltage and is

related to the voltage on pin SVR. An external capacitor is connected to pin SVR to

suppress power supply ripple. If the supply voltage drops (at vehicle engine start), the DC

output voltage will follow slowly due to the affect of the SVR capacitor.

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TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

The headroom voltage is the voltage required for correct operation of the ampliﬁer and is

deﬁned as the voltage difference between the level of the DC output voltage before the V_P

voltage drop and the level of V_Pafter the voltage drop; see Figure 4.

At a certain supply voltage drop, the headroom voltage will be insufﬁcient for correct

operation of the ampliﬁer. To prevent unwanted audible noises at the output, the

headroom protection mode will be activated; see Figure 9. This protection discharges the

capacitors connected to pins SVR and ACGND to increase the headroom voltage.

V

(V)

V

P

14

headroom voltage

SVR voltage

8.4

7

output voltage

steady state: 0.5V

P

t (s)

001aaa588

Fig 4. Ampliﬁer output during supply voltage

8. I²C-bus speciﬁcation

Table 4:

Device address with hardware address selection; see Figure 23

R_ADSELA6

A5

A4

A3

A2

A1

A0

R/W

300 kΩ

27 kΩ

1 kΩ

1

0

1

0

0 = write to device

1 = read from device

0 = write to device

1 = read from device

0 = write to device

1 = read from device

1

0

1

0

1

SDA

SCL

S

P

STOP condition

START condition

mba608

Fig 5. Deﬁnition of start and stop conditions

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Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

SDA

SCL

data line

stable;

data valid

change

of data

allowed

mba607

Fig 6. Bit transfer

2

I C-WRITE

SCL

SDA

1

2

7

8

9

1

2

7

8

9

MSB − 1

MSB MSB − 1

LSB + 1

LSB

MSB

LSB + 1

ACK

S

A

P

ADDRESS

WRITE DATA

W

To stop the transfer, after the last acknowledge (A)

a stop condition (P) must be generated

2

I C-READ

SCL

SDA

1

2

7

8

9

1

2

7

8

9

MSB MSB − 1

LSB + 1

MSB MSB − 1

LSB + 1

LSB

ACK

A

ACK

A

P

S

R

READ DATA

ADDRESS

To stop the transfer, the last byte must not be acknowledged

and a stop condition (P) must be generated

: generated by master (microcontroller)

: generated by slave

: start

001aac644

S

P

A

: stop

: acknowledge

R/W : read / write

Fig 7. I²C-bus read and write modes

8.1 Instruction bytes

If bit R/W = 0, the TDA8592J expects 3 instruction bytes: IB1, IB2 and IB3.

After a power-on reset, all instruction bits are set to zero.

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I²C-bus controlled 4 × 50 W power ampliﬁer

Table 5:

Bit

Instruction byte IB1

Description

D7 to D2

D1

-

AC or DC-load detection switch

0 = AC or DC-load detection off; resets DC-load detection bits and AC-load

detection peak current counter

1 = AC or DC-load detection on

D0

ampliﬁer start enable (clear power-on reset ﬂag, D7 of DB2)

0 = ampliﬁer off; pin DIAG remains LOW

1 = ampliﬁer on; when power-on occurs, bit D7 of DB2 is reset and pin DIAG is

released

Table 6:

Bit

Instruction byte IB2

Description

D7 to D2

D1

-

soft mute all ampliﬁer channels (mute delay 20 ms)

0 = no mute

1 = mute

D0

hard mute all ampliﬁer channels (mute delay 0.4 ms)

0 = no mute

1 = mute

Table 7:

Bit

Instruction byte IB3

Description

D7

clip detection level

0 = 4 % detection level

1 = 1 % detection level

D6

D5

D4

D3

D2

ampliﬁer front channels gain select

0 = 26 dB (normal mode)

1 = 20 dB (line driver mode)

ampliﬁer rear channels gain select

0 = 26 dB (normal mode)

1 = 20 dB (line driver mode)

ampliﬁer thermal protection pre-warning

0 = warning level on 145 °C

1 = warning level on 122 °C

disable RF channel

0 = RF channel enabled

1 = RF channel disabled

disable LF channel

0 = LF channel enabled

1 = LF channel disabled

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Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

Table 7:

Bit

Instruction byte IB3 …continued

Description

D1

disable RR channel

0 = RR channel enabled

1 = RR channel disabled

disable LR channel

D0

0 = LR channel enabled

1 = LR channel disabled

8.2 Data bytes

If bit R/W = 1, the TDA8592J will send 4 data bytes to the microcontroller: DB1, DB2, DB3

and DB4.

Table 8:

Bit

Data byte DB1

Description

D7

ampliﬁer thermal protection pre-warning

0 = no warning

1 = junction temperature above pre-warning level

ampliﬁer maximum thermal protection

0 = junction temperature below 175 °C

1 = junction temperature above 175 °C

channel LR DC-load detection

0 = DC-load detected

D6

D5

D4

D3

D2

D1

D0

1 = no DC-load detected

channel LR AC-load detection

0 = no AC-load detected

1 = AC-load detected

channel LR load short-circuit

0 = normal load

1 = short-circuit load

channel LR output offset

0 = no output offset

1 = output offset

channel LR V_Pshort-circuit

0 = no short-circuit to V_P

1 = short-circuit to V_P

channel LR ground short-circuit

0 = no short-circuit to ground

1 = short-circuit to ground

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I²C-bus controlled 4 × 50 W power ampliﬁer

Table 9:

Bit

Data byte DB2

Description

D7

power-on reset occurred or ampliﬁer status

0 = ampliﬁer on

1 = POR has occurred; ampliﬁer off

-

D6

D5

channel RR DC-load detection

0 = DC-load detected

1 = no DC-load detected

channel RR AC-load detection

0 = no AC-load detected

1 = AC-load detected

D4

D3

D2

D1

D0

channel RR load short-circuit

0 = normal load

1 = short-circuit load

channel RR output offset

0 = no output offset

1 = output offset

channel RR V_Pshort-circuit

0 = no short-circuit to V_P

1 = short-circuit to V_P

channel RR ground short-circuit

0 = no short-circuit to ground

1 = short-circuit to ground

Table 10: Data byte DB3

Bit

Description

D7 to D6

D5

-

channel LF DC-load detection

0 = DC-load detected

1 = no DC-load detected

channel LF AC-load detection

0 = no AC-load detected

1 = AC-load detected

channel LF load short-circuit

0 = normal load

D4

D3

D2

D1

1 = short-circuit load

channel LF output offset

0 = no output offset

1 = output offset

channel LF V_Pshort-circuit

0 = no short-circuit to V_P

1 = short-circuit to V_P

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I²C-bus controlled 4 × 50 W power ampliﬁer

Table 10: Data byte DB3 …continued

Bit

Description

D0

channel LF ground short-circuit

0 = no short-circuit to ground

1 = short-circuit to ground

Table 11: Data byte DB4

Bit

Description

D7 to D6

D5

-

channel RF DC-load detection

0 = DC-load detected

1 = no DC-load detected

channel RF AC-load detection

0 = no AC-load detected

1 = AC-load detected

channel RF load short-circuit

0 = normal load

D4

D3

D2

D1

D0

1 = short-circuit load

channel RF output offset

0 = no output offset

1 = output offset

channel RF V_Pshort-circuit

0 = no short-circuit to V_P

1 = short-circuit to V_P

channel RF ground short-circuit

0 = no short-circuit to ground

1 = short-circuit to ground

9. Limiting values

Table 12: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

-

Max

18

Unit

V

V_P

supply voltage

operating

non operating

load dump protection

−1

0

+50

50

V

V_SDA, V_SCLvoltage on pins SDA and SCL operating

0

7

V

V_INn, V_SVR

V_ACGND

V_DIAG

,

voltage on pins INLF, INLR,

INRF, INRR, SVR, ACGND and

DIAG

operating

0

13

V

,

V_STB

I_OSM

voltage on pin STB

operating

0

-

24

10

V

A

non-repetitive peak output

current

I_ORM

repetitive peak output current

-

6

A

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I²C-bus controlled 4 × 50 W power ampliﬁer

Table 12: Limiting values …continued

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

T_j

Parameter

Conditions

Min

-

Max

Unit

junction temperature

storage temperature

ambient temperature

supply voltage for protections

150

°C

T_stg

−55

−40

-

+150 °C

T_amb

V_P(prot)

+85

18

°C

AC and DC

V

short-circuit voltage of

output pins and

across the load

P_tot

total power dissipation

T_case= 70 °C

-

80

W

V

[1]

[2]

V_esd

electrostatic discharge voltage human body model

machine model

2000

200

V

[1] Human body model: R_s= 1.5 kΩ; C = 100 pF; all pins have passed all tests to 2500 V to guarantee 2000 V,

according to class II.

[2] Machine model: R_s= 10 Ω; C = 200 pF; L = 0.75 mH; all pins have passed all tests to 250 V to guarantee

200 V, according to class II.

10. Thermal characteristics

Table 13: Thermal characteristics

Symbol

R_th(j-c)

Parameter

Conditions

Typ

1

Unit

K/W

thermal resistance from junction to case

R_th(j-a)

thermal resistance from junction to

ambient

in free air

40

11. Characteristics

Table 14: Characteristics

T_amb= 25 °C; V_P= V_P1= V_P2= 14.4 V, R_L= 4 Ω; measured in test circuit Figure 23; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Supply voltage behavior

V_P

operating supply voltage

R_L= 4 Ω

R_L= 2 Ω

no load

8

14.4

280

10

18

16

400

50

-

V

8

V

I_q

quiescent current

standby current

-

mA

µA

V

I_stb

-

V_O

DC output voltage

low supply voltage mute

headroom voltage

-

7.2

7

V_P(mute)

V_hr

6.5

-

8

V

when headroom protection activated;

see Figure 4

1.4

-

V

V_POR

V_OO

power-on reset voltage

output offset voltage

see Figure 10

-

5.5

0

-

V

mute mode and power on

−100

+100 mV

Mode select (pin STB)

V_stb

standby mode voltage

operating mode voltage

-

1.3

5.5

V

V_oper

2.5

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Product data sheet

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TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

Table 14: Characteristics …continued

T_amb= 25 °C; V_P= V_P1= V_P2= 14.4 V, R_L= 4 Ω; measured in test circuit Figure 23; unless otherwise speciﬁed.

Symbol

V_mute

I_I

Parameter

Conditions

Min

Typ

Max

V_P

Unit

V

mute mode voltage

input current

8

-

V_STB= 5 V

4

25

µA

Start-up, shut-down and mute timing

t_wake

wake-up time from standby

before ﬁrst I²C-bus transmission

is recognized

via pin STB; see Figure 8

-

300

250

500

-

µs

t_mute(off)

time from ampliﬁer switch-on to

mute release

via I²C-bus D0(IB1) = 1; C_SVR= 22 µF;

see Figure 8

ms

t_d(mute-on)

delay from mute to on (soft mute) D1(IB2) = 1 → 0

delay from mute to on (fast mute) D0(IB2) = 1 → 0

10

25

40

ms

delay from mute to on via

pin STB

V_STBfrom 8 V to 4 V

t_d(on-mute)

delay from on to mute (soft mute) D1(IB2) = 0 → 1

delay from on to mute (fast mute) D0(IB2) = 0 → 1

10

-

25

40

1

ms

0.4

delay from on to mute via

pin STB

V_STBfrom 4 V to 8 V

-

1

I²C-bus interface

V_IL

LOW-level input voltage on pins

SCL and SDA

-

1.5

5.5

0.4

V

V_IH

V_OL

HIGH-level input voltage on pins

SCL and SDA

2.3

-

LOW-level output voltage on

pin SDA

I_L= 3 mA

f_SCL

clock frequency

-

400

∞

kHz

kΩ

R_ADSEL

resistor value for address

selection

I²C-bus address D8/D9h

I²C-bus address DA/DBh

I²C-bus address DE/DFh

200

15

0

300

27

1

36

1.6

Diagnostic

V_DIAG(L)

LOW-level output voltage on

pin DIAG

fault condition; I_DIAG= 200 µA

-

0.8

V

V_o(offset)

THD_clip

output voltage when offset is

detected

±1.5

±2

± 2.5

THD clip detection level

D7(IB3) = 0

D7(IB3) = 1

-

3.7

1

-

%

°C

-

T_j(warn1)

T_j(warn2)

T_j(mute)

T_j(off)

average junction temperature for D4(IB3) = 0

pre-warning 1

135

145

155

average junction temperature for D4(IB3) = 1

pre-warning 2

112

150

165

-

122

160

175

-

132

170

185

6

°C

Ω

average junction temperature for V_IN= 0.05 V

3 dB muting

average junction temperature

when all outputs are switched off

Z_o(load)

impedance when a DC-load is

detected

9397 750 14846

Product data sheet

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TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

Table 14: Characteristics …continued

T_amb= 25 °C; V_P= V_P1= V_P2= 14.4 V, R_L= 4 Ω; measured in test circuit Figure 23; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Z_o(open)

impedance when an open

DC-load is detected

500

-

Ω

I_o(load)

I_o(open)

ampliﬁer current when the

AC-load bit is set

550

-

mA

ampliﬁer current when the

AC-load bit is not set

150

Ampliﬁer

P_o

output power

R_L= 4 Ω; V_P= 14.4 V; THD = 0.5 %

R_L= 4 Ω; V_P= 14.4 V; THD = 10 %

20

27

44

21

28

46

-

W

R_L= 4 Ω; V_P= 14.4 V; V_IN= 2 V

(RMS) square wave (maximum power)

R_L= 4 Ω; V_P= 15.2 V; V_IN= 2 V

49

52

-

W

(RMS) square wave (maximum power)

R_L= 2 Ω; V_P= 14.4 V; THD = 0.5 %

R_L= 2 Ω; V_P= 14.4 V; THD = 10 %

37

51

83

41

55

87

-

W

R_L= 2 Ω; V_P= 14.4 V; V_IN= 2 V

(RMS) square wave (maximum power)

THD

total harmonic distortion

P_o= 1 W to 12 W; f = 1 kHz; R_L= 4 Ω

P_o= 1 W to 12 W; f = 10 kHz

P_o= 4 W; f = 1 kHz

-

0.01

0.2

0.1

%

0.5

0.01

0.03

line driver mode; V_o= 2 V (RMS);

f = 1 kHz; R_L= 600 Ω

α_CS

channel separation (crosstalk)

1 kHz to 10 kHz; R_source= 600 Ω

P_o= 4 W; f = 1 kHz

50

-

60

80

70

-

dB

SVRR

CMRR

supply voltage ripple rejection

common mode ripple rejection

100 Hz to 10 kHz; R_source= 600 Ω

55

40

ampliﬁer mode; V_cm= 0.3 V (p-p);

f = 1 kHz to 3 kHz; R_source= 0 Ω

V_cm(max)(rms)maximum common mode voltage f = 1 kHz

level (RMS value)

-

0.6

35

70

V

V_n(o)(LN)

noise output voltage in line driver ﬁlter: 20 Hz to 22 kHz; R_source= 600 Ω

25

50

mV

mode

V_n(o)(amp)

noise output voltage in ampliﬁer ﬁlter: 20 Hz to 22 kHz; R_source= 600 Ω

mode

G_v(amp)

G_v(LN)

Z_i

voltage gain in ampliﬁer mode

voltage gain in line driver mode

input impedance

single-ended input to differential output

C_IN= 220 nF

25

19

55

80

-

26

20

70

90

70

20

27

21

-

dB

kΩ

dB

α_mute

V_o(mute)

B_p

mute attenuation

V_o(on)/V_o(mute)

-

mute output voltage

V_IN= 1 V (RMS)

-

mV

kHz

power bandwidth

−1 dB; THD = 1 %

-

9397 750 14846

Product data sheet

Rev. 02 — 3 June 2005

17 of 32

TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

V

P

DIAG

DB2 bit D7

POR

IB1 bit D0

start enable

t

wake

STB

SVR

soft

t

mute

mute(off)

amplifier

output

soft

mute

001aaa589

Fig 8. Start-up and shut-down timing

9397 750 14846

Product data sheet

Rev. 02 — 3 June 2005

18 of 32

TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

headroom protection activated:

1) fast mute

2) discharge of SVR

V

(V)

O

V

P

14.4

low V mute activated

P

8.8

output

voltage

headroom voltage

SVR voltage

8.6

7.2

low V mute released

P

3.5

t (s)

DIAG

DB2 bit D7

001aaa590

Fig 9. Low V_Pbehavior (V_P> 5.5 V)

V

O

(V)

V

P

14.4

low V mute activated

P

POR activated

8.8

8.6

7.2

5.5

3.5

SVR voltage

output voltage

t (s)

DIAG

POR has occurred

DB2 bit D7

001aaa591

Fig 10. Low V_Pbehavior (V_P< 5.5 V)

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Product data sheet

Rev. 02 — 3 June 2005

19 of 32

TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

11.1 Performance diagrams

11.1.1 THD as function of output power P_ofor different frequencies.

001aaa761

2

10

THD

(%)

10

1

(1)

−1

10

−2

10

(2)

(3)

−3

−2

−1

2

10

1

10

P

(W)

o

(1) V_P= 14.4 V; R_L= 4 Ω; f = 10 kHz.

(2) V_P= 14.4 V; R_L= 4 Ω; f = 1 kHz.

(3) V_P= 14.4 V; R_L= 4 Ω; f = 100 Hz.

Fig 11. THD as function of output power

11.1.2 THD as function of frequency for different output powers

001aaa762

10

THD

(%)

1

−1

10

−2

10

(1)

(2)

−3

10

−2

−1

2

10

1

10

f (kHz)

(1) V_P= 14.4 V; R_L= 4 Ω; P_o= 1 W.

(2) V_P= 14.4 V; R_L= 4 Ω; P_o= 10 W.

Fig 12. THD as function of frequency

9397 750 14846

Product data sheet

Rev. 02 — 3 June 2005

20 of 32

TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

11.1.3 Line driver mode

001aaa763

1

THD

(%)

−1

−2

−3

10

−1

2

10

1

10

V

(V)

o(rms)

V_P= 14.4 V; R_L= 600 Ω; f = 1 kHz.

Fig 13. THD as function of V_oin balanced line driver mode

11.1.4 Output power as function of frequency for different THD levels

001aaa764

30

P

(W)

o

(1)

(2)

28

26

24

22

20

(3)

−2

−1

2

10

1

10

f (kHz)

(1) V_P= 14.4 V; R_L= 4 Ω; THD = 10 %.

(2) V_P= 14.4 V; R_L= 4 Ω; THD = 5 %.

(3) V_P= 14.4 V; R_L= 4 Ω; THD = 0.5 %.

Fig 14. P_oas function of frequency at 4 Ω load

9397 750 14846

Product data sheet

Rev. 02 — 3 June 2005

21 of 32

TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

001aaa765

60

P

o

(W)

(1)

55

(2)

50

45

40

35

(3)

−2

−1

2

10

1

10

f (kHz)

(1) V_P= 14.4 V; R_L= 2 Ω; THD = 10 %.

(2) V_P= 14.4 V; R_L= 2 Ω; THD = 5 %.

(3) V_P= 14.4 V; R_L= 2 Ω; THD = 0.5 %.

Fig 15. P_oas function of frequency at 2 Ω load

11.1.5 Output power as function of supply voltage

001aaa821

100

P

o

(W)

80

60

40

20

0

(1)

(2)

(3)

8

10

12

14

16

18

20

V

(V)

P

(1) f = 1 kHz; R_L= 4 Ω; maximum P_o.

(2) f = 1 kHz; R_L= 4 Ω; THD = 10 %.

(3) f = 1 kHz; R_L= 4 Ω; THD = 0.5 %.

Fig 16. P_oas function of supply voltage at 4 Ω load

9397 750 14846

Product data sheet

Rev. 02 — 3 June 2005

22 of 32

TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

001aaa766

100

P

o

(W)

(1)

80

60

40

20

0

(2)

(3)

8

10

12

14

16

18

20

V

(V)

P

(1) f = 1 kHz; R_L= 2 Ω; maximum P_o.

(2) f = 1 kHz; R_L= 2 Ω; THD = 10 %.

(3) f = 1 kHz; R_L= 2 Ω; THD = 0.5 %.

Fig 17. P_oas function of supply voltage at 2 Ω load

11.1.6 Supply voltage ripple rejection in operating and mute modes

001aaa767

11

SVRR

(dB)

100

90

80

70

60

(1)

(2)

−1

10

1

10

f (kHz)

(1) V_P= 14.4 V; R_L= 4 Ω; V_ripple= 2 V (p-p); R_in= 600 Ω; operating mode.

(2) V_P= 14.4 V; R_L= 4 Ω; V_ripple= 2 V (p-p); R_in= 600 Ω; mute mode.

Fig 18. SVRR as function of frequency, in operating and mute modes

9397 750 14846

Product data sheet

Rev. 02 — 3 June 2005

23 of 32

TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

11.1.7 Channel separation as function of frequency

001aaa768

100

cs

α

(dB)

90

80

70

60

50

−2

−1

2

10

1

10

f (kHz)

V_P= 14.4 V; R_L= 4 Ω; P_o= 4 W; R_in= 600 Ω.

Fig 19. Channel separation as function of frequency

11.1.8 Power dissipation and efﬁciency

001aaa602

50

P

tot

(W)

40

30

20

10

0

10

20

30

P

(W)

o

V_P= 14.4 V; R_L= 4 Ω; f = 1 kHz.

Fig 20. Power dissipation as function of output power per channel (4 channels driven)

9397 750 14846

Product data sheet

Rev. 02 — 3 June 2005

24 of 32

TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

001aaa603

100

η

(%)

80

60

40

20

0

8

16

24

32

40

P

(W)

o

V_P= 14.4 V; R_L= 4 Ω; f = 1 kHz.

Fig 21. Efﬁciency as function of output power per channel (4 channels driven)

12. Application information

TDA8592J

ACGND

2.2 µF

0.22 µF

1.7 kΩ

from

microcontroller

100 Ω

47 pF

001aac645

Fig 22. Application diagram for beep input

The beep input circuit is to amplify the beep signal from the microcontroller to all

4 ampliﬁers (gain = 0 dB).

Remark: This circuit will not effect the ampliﬁer performance

9397 750 14846

Product data sheet

Rev. 02 — 3 June 2005

25 of 32

TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

12.1 Test and application information

14.4 V

(1)

220

nF

(1)

R

ADSEL

220

nF

2200 µF

(16 V)

+5 V

ADSEL

SCL

SDA

V

P1

P2

10 kΩ

1

5

2

21

7

DIAG

26

2

23

I C-BUS

STB

STANDBY/ MUTE

CLIP DETECT/ DIAGNOSTIC

INTERFACE

(3)

OUTRF+

R

10

8

S

INRF 12

470 nF

MUTE

26 dB/

20 dB

OUTRF−

PROTECTION/

DIAGNOSTIC

18

20

OUTLF+

OUTLF−

INLF 16

26 dB/

20 dB

470 nF

PROTECTION/

DIAGNOSTIC

6

4

OUTRR+

OUTRR−

INRR 13

470 nF

26 dB/

20 dB

PROTECTION/

DIAGNOSTIC

22

24

OUTLR+

OUTLR−

INLR 15

470 nF

26 dB/

20 dB

V

P

PROTECTION/

DIAGNOSTIC

27

TAB

TEMPERATURE AND LOAD

DUMP PROTECTION

AMPLIFIER

TDA8592J

11

14

17

9

3

19

25

SVR

SGND

ACGND PGND1

PGND2

PGND3 PGND4

(2)

2.2 µF

(4 × 470 nF)

22 µF

coa037

(1) Supply decoupling:

The high frequency decoupling capacitors (220 nF) should be connected as close as possible to the supply pins. It is

important that these capacitors are of good quality. When several channels are shorted to the supply simultaneously, high

peak voltages can occur at the supply line due to the activation of the protections. The high frequency decoupling

capacitors should suppress these voltage peaks.

Good results have been achieved with 0805 case size capacitors (X7R material, 220 nF) connected close to each of the

supply pins.

(2) The ACGND capacitor value must be close to four times the input capacitor value.

(3) A capacitor of 10 nF may be added from every ampliﬁer output to ground for EMC reasons.

Fig 23. Test and application information

9397 750 14846

Product data sheet

Rev. 02 — 3 June 2005

26 of 32

TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

12.2 PCB layout

001aaa604

Fig 24. PCB layout of test and application circuit; copper layer top

001aaa605

Fig 25. PCB layout of test and application circuit; copper layer bottom

9397 750 14846

Product data sheet

Rev. 02 — 3 June 2005

27 of 32

TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

address

D8 (00)

sense

V

P

GND

DA (01)

DE (11)

address

GND

DZ 5.6 V

select

22 µF 2.2 µF

D1

on

V

P

2200 µF

2

I C

supply

470 nF

SDA

+ 5 V

GND

SCL

1 µF

off

RR

RF

LF

LR

10 µF

OUT

SGND

DIAG MODE

RF RR

LR

LF

TDA8593J

IN

001aaa606

Fig 26. PCB layout of test and application circuit; components top

47 kΩ

47 kΩ 220 nF

220 nF

33 kΩ

4.7 kΩ

TDA3664

001aaa607

Fig 27. PCB layout of test and application circuit; components bottom

9397 750 14846

Product data sheet

Rev. 02 — 3 June 2005

28 of 32

TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

13. Package outline

DBS27P: plastic DIL-bent-SIL (special bent) power package; 27 leads (lead length 7.7 mm)

SOT767-1

non-concave

D

h

x

D

E

h

view B: mounting base side

A

2

d

A

5

4

β

B

j

E

1

A

L

3

L

Q

c

2

v

M

1

27

e

m

w

M

1

Z

b

p

e

0

5

10 mm

scale

DIMENSIONS (mm are the original dimensions)

(1)

UNIT

A

b

c

D

d

D

E

e

E

j

L

m

Q

v

w

x

β

Z

2

4

5

p

h

1

2

h

1

3

17.0 4.6 1.15 1.65 0.60 0.5 30.4 28.0

15.5 4.3 0.85 1.35 0.45 0.3 29.9 27.5

12.2

11.8

10.15 1.85 8.4 2.4

9.85 1.65 7.0 1.6

2.4

1.8

2.1

1.8

6

mm

12

2

1

4

4.3

0.6 0.25 0.03 45°

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

SOT767-1

02-05-02

Fig 28. Package outline SOT767-1

9397 750 14846

Product data sheet

Rev. 02 — 3 June 2005

29 of 32

TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

14. Revision history

Table 15: Revision history

Document ID

TDA8592_2

Release date Data sheet status

20050603 Product data sheet

• The data sheet status changed to Product data sheet

• Table 2 updated: Type number TDA8592Q has been deleted.

20040608 Preliminary data sheet 9397 750 13007

Change notice Order number

Supersedes

-

9397 750 14846 TDA8592_1

Modiﬁcations:

TDA8592_1

-

9397 750 14846

Product data sheet

Rev. 02 — 3 June 2005

30 of 32

TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

15. Data sheet status

Level Data sheet status^[1]Product status^{[2] [3]}

Deﬁnition

I

Objective data

Development

This data sheet contains data from the objective speciﬁcation for product development. Philips

Semiconductors reserves the right to change the speciﬁcation in any manner without notice.

II

Preliminary data

Qualiﬁcation

This data sheet contains data from the preliminary speciﬁcation. Supplementary data will be published

at a later date. Philips Semiconductors reserves the right to change the speciﬁcation without notice, in

order to improve the design and supply the best possible product.

III

Product data

Production

This data sheet contains data from the product speciﬁcation. Philips Semiconductors reserves the

right to make changes at any time in order to improve the design, manufacturing and supply. Relevant

changes will be communicated via a Customer Product/Process Change Notiﬁcation (CPCN).

[1]

[2]

Please consult the most recently issued data sheet before initiating or completing a design.

The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at

URL http://www.semiconductors.philips.com.

[3]

For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

customers using or selling these products for use in such applications do so

at their own risk and agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

16. Deﬁnitions

Short-form speciﬁcation — The data in a short-form speciﬁcation is

extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.

Right to make changes — Philips Semiconductors reserves the right to

make changes in the products - including circuits, standard cells, and/or

software - described or contained herein in order to improve design and/or

performance. When the product is in full production (status ‘Production’),

relevant changes will be communicated via a Customer Product/Process

Change Notiﬁcation (CPCN). Philips Semiconductors assumes no

responsibility or liability for the use of any of these products, conveys no

license or title under any patent, copyright, or mask work right to these

products, and makes no representations or warranties that these products are

free from patent, copyright, or mask work right infringement, unless otherwise

speciﬁed.

Limiting values deﬁnition — Limiting values given are in accordance with

the Absolute Maximum Rating System (IEC 60134). Stress above one or

more of the limiting values may cause permanent damage to the device.

These are stress ratings only and operation of the device at these or at any

other conditions above those given in the Characteristics sections of the

speciﬁcation is not implied. Exposure to limiting values for extended periods

may affect device reliability.

Application information — Applications that are described herein for any

of these products are for illustrative purposes only. Philips Semiconductors

make no representation or warranty that such applications will be suitable for

the speciﬁed use without further testing or modiﬁcation.

18. Trademarks

Notice — All referenced brands, product names, service names and

trademarks are the property of their respective owners.

I²C-bus — wordmark and logo are trademarks of Koninklijke Philips

Electronics N.V.

17. Disclaimers

Life support — These products are not designed for use in life support

appliances, devices, or systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips Semiconductors

19. Contact information

For additional information, please visit: http://www.semiconductors.philips.com

For sales ofﬁce addresses, send an email to: sales.addresses@www.semiconductors.philips.com

9397 750 14846

Product data sheet

Rev. 02 — 3 June 2005

31 of 32

TDA8592J

Philips Semiconductors

I²C-bus controlled 4 × 50 W power ampliﬁer

20. Contents

1

2

3

4

5

General description . . . . . . . . . . . . . . . . . . . . . . 1

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Quick reference data . . . . . . . . . . . . . . . . . . . . . 1

Ordering information. . . . . . . . . . . . . . . . . . . . . 2

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3

13

14

15

16

17

18

19

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 29

Revision history . . . . . . . . . . . . . . . . . . . . . . . 30

Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 31

Deﬁnitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Contact information . . . . . . . . . . . . . . . . . . . . 31

6

6.1

6.2

Pinning information. . . . . . . . . . . . . . . . . . . . . . 4

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4

7

7.1

7.2

7.3

7.4

7.5

7.6

7.7

Functional description . . . . . . . . . . . . . . . . . . . 5

Start-up. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Start-up and shut-down timing . . . . . . . . . . . . . 6

Power-on reset and supply voltage spikes . . . . 6

Diagnostic output . . . . . . . . . . . . . . . . . . . . . . . 6

Muting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Temperature protection. . . . . . . . . . . . . . . . . . . 6

Offset detection. . . . . . . . . . . . . . . . . . . . . . . . . 6

Speaker protection . . . . . . . . . . . . . . . . . . . . . . 7

Line driver mode. . . . . . . . . . . . . . . . . . . . . . . . 7

Input and AC ground capacitor values . . . . . . . 7

DC-load detection. . . . . . . . . . . . . . . . . . . . . . . 7

I²C-bus address selection. . . . . . . . . . . . . . . . . 7

AC-load detection . . . . . . . . . . . . . . . . . . . . . . . 7

Load detection procedure. . . . . . . . . . . . . . . . . 8

Low headroom protection . . . . . . . . . . . . . . . . . 8

7.8

7.9

7.10

7.11

7.12

7.13

7.14

7.15

8

8.1

8.2

I²C-bus speciﬁcation . . . . . . . . . . . . . . . . . . . . . 9

Instruction bytes . . . . . . . . . . . . . . . . . . . . . . . 10

Data bytes. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

9

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 14

Thermal characteristics. . . . . . . . . . . . . . . . . . 15

10

11

11.1

11.1.1

Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 15

Performance diagrams . . . . . . . . . . . . . . . . . . 20

THD as function of output power P_ofor

different frequencies. . . . . . . . . . . . . . . . . . . . 20

THD as function of frequency for different

11.1.2

output powers . . . . . . . . . . . . . . . . . . . . . . . . . 20

Line driver mode. . . . . . . . . . . . . . . . . . . . . . . 21

Output power as function of frequency for

11.1.3

11.1.4

different THD levels . . . . . . . . . . . . . . . . . . . . 21

Output power as function of supply voltage . . 22

Supply voltage ripple rejection in operating

11.1.5

11.1.6

and mute modes. . . . . . . . . . . . . . . . . . . . . . . 23

Channel separation as function of frequency . 24

Power dissipation and efﬁciency. . . . . . . . . . . 24

11.1.7

11.1.8

12

12.1

12.2

Application information. . . . . . . . . . . . . . . . . . 25

Test and application information . . . . . . . . . . . 26

PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

All rights are reserved. Reproduction in whole or in part is prohibited without the prior

written consent of the copyright owner. The information presented in this document does

not form part of any quotation or contract, is believed to be accurate and reliable and may

be changed without notice. No liability will be accepted by the publisher for any

consequence of its use. Publication thereof does not convey nor imply any license under

patent- or other industrial or intellectual property rights.

Date of release: 3 June 2005

Document number: 9397 750 14846

Published in The Netherlands


型号：	TDA8592J
厂家：	NXP
描述：	IC 87 W, 4 CHANNEL, AUDIO AMPLIFIER, PZFM27, POWER, PLASTIC, SOT-767-1, DIL-BENT-SIL, 27 PIN, Audio/Video Amplifier 局域网放大器 CD 商用集成电路
文件：	总32页 (文件大小：195K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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